From 8865ab607fccfbf15958419c37d3161673eb1639 Mon Sep 17 00:00:00 2001 From: wangyz1997 Date: Sun, 7 Jan 2024 23:34:23 +0800 Subject: [PATCH] stm32f407_lvgl_8080lcd: slightly overclock mcu to 192mhz --- stm32f407_lvgl_8080lcd/Core/Src/main.c | 10 +++++----- .../MDK-ARM/stm32f407_lvgl_8080lcd.uvoptx | 2 +- stm32f407_lvgl_8080lcd/README.md | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/stm32f407_lvgl_8080lcd/Core/Src/main.c b/stm32f407_lvgl_8080lcd/Core/Src/main.c index 2d74414..23263a1 100644 --- a/stm32f407_lvgl_8080lcd/Core/Src/main.c +++ b/stm32f407_lvgl_8080lcd/Core/Src/main.c @@ -135,9 +135,9 @@ void SystemClock_Config(void) RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; - RCC_OscInitStruct.PLL.PLLN = 168; + RCC_OscInitStruct.PLL.PLLN = 192; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - RCC_OscInitStruct.PLL.PLLQ = 7; + RCC_OscInitStruct.PLL.PLLQ = 8; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); @@ -152,7 +152,7 @@ void SystemClock_Config(void) RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { Error_Handler(); } @@ -178,7 +178,7 @@ static void MX_TIM3_Init(void) /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; - htim3.Init.Prescaler = 167; + htim3.Init.Prescaler = SystemCoreClock / 1000000 - 1; htim3.Init.CounterMode = TIM_COUNTERMODE_UP; htim3.Init.Period = 999; htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; @@ -235,7 +235,7 @@ static void MX_TIM6_Init(void) /* USER CODE END TIM6_Init 1 */ htim6.Instance = TIM6; - htim6.Init.Prescaler = 83; + htim6.Init.Prescaler = SystemCoreClock / 1000000 / 2 - 1; htim6.Init.CounterMode = TIM_COUNTERMODE_UP; htim6.Init.Period = 999; htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; diff --git a/stm32f407_lvgl_8080lcd/MDK-ARM/stm32f407_lvgl_8080lcd.uvoptx b/stm32f407_lvgl_8080lcd/MDK-ARM/stm32f407_lvgl_8080lcd.uvoptx index 7adc717..c35ea72 100644 --- a/stm32f407_lvgl_8080lcd/MDK-ARM/stm32f407_lvgl_8080lcd.uvoptx +++ b/stm32f407_lvgl_8080lcd/MDK-ARM/stm32f407_lvgl_8080lcd.uvoptx @@ -120,7 +120,7 @@ 0 CMSIS_AGDI - -X"Any" -UAny -O206 -S8 -C0 -P00000000 -N00("") -D00(00000000) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO11 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407ZGTx$CMSIS\Flash\STM32F4xx_1024.FLM) + -X"Any" -UAny -O206 -S8 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO11 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_1024.FLM -FS08000000 -FL0100000 -FP0($$Device:STM32F407ZGTx$CMSIS\Flash\STM32F4xx_1024.FLM) 0 diff --git a/stm32f407_lvgl_8080lcd/README.md b/stm32f407_lvgl_8080lcd/README.md index 8d2208a..bb3a326 100644 --- a/stm32f407_lvgl_8080lcd/README.md +++ b/stm32f407_lvgl_8080lcd/README.md @@ -1,6 +1,6 @@ # 基于STM32F407ZG与320480 LCD的LVGL例程 - lvgl 8.3.8 -- 裸机，无RTOS +- 裸机，无RTOS，CPU略微超频至192MHz - `ILI9486`主控，320*480分辨率的LCD - lvgl的堆放置于CCM内存中