diff --git a/.gitignore b/.gitignore index 615e6cd..a2a5d3d 100644 --- a/.gitignore +++ b/.gitignore @@ -6,4 +6,4 @@ /*/MDK-ARM/*.uvguix.* /*/MDK-ARM/JLink* # vscode config folder -/.vscode/ +.vscode/ diff --git a/mihome_bridge/.mxproject b/mihome_bridge/.mxproject index 402da76..99f9713 100644 --- a/mihome_bridge/.mxproject +++ b/mihome_bridge/.mxproject @@ -1,8 +1,8 @@ [PreviousLibFiles] -LibFiles=Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_bus.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_crs.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_system.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_utils.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_def.h;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pcd.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pcd_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usb.h;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_ll_usb.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pcd.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pcd_ex.c;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_bus.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_crs.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_system.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_utils.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_def.h;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pcd.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pcd_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usb.h;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_ll_usb.c;Drivers\CMSIS\Device\ST\STM32F0xx\Include\stm32f072xb.h;Dri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+LibFiles=Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_bus.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_crs.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_system.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_utils.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_def.h;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart_ex.h;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_bus.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_crs.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_system.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_utils.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_def.h;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart_ex.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\stm32f072xb.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\stm32f0xx.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\system_stm32f0xx.h;Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core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[PreviousUsedKeilFiles] -SourceFiles=..\Core\Src\main.c;..\Core\Src\stm32f0xx_it.c;..\Core\Src\stm32f0xx_hal_msp.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_ll_usb.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pcd.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pcd_ex.c;..\Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;..\Core\Src\system_stm32f0xx.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_ll_usb.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pcd.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pcd_ex.c;..\Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;..\Core\Src\system_stm32f0xx.c;;; +SourceFiles=..\Core\Src\main.c;..\Core\Src\stm32f0xx_it.c;..\Core\Src\stm32f0xx_hal_msp.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;..\Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;..\Core\Src\system_stm32f0xx.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;..\Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;..\Core\Src\system_stm32f0xx.c;;; HeaderPath=..\Drivers\STM32F0xx_HAL_Driver\Inc;..\Drivers\STM32F0xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F0xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc; CDefines=USE_HAL_DRIVER;STM32F072xB;USE_HAL_DRIVER;USE_HAL_DRIVER; diff --git a/mihome_bridge/Core/Inc/bsp_key_in_out.h b/mihome_bridge/Core/Inc/bsp_key_in_out.h new file mode 100644 index 0000000..794c207 --- /dev/null +++ b/mihome_bridge/Core/Inc/bsp_key_in_out.h @@ -0,0 +1,38 @@ +#ifndef __BSP_KEY_IN_OUT_H +#define __BSP_KEY_IN_OUT_H + +#include "main.h" + +#define BSP_KEY_IN_KEY_COUNT 4 +#define BSP_KEY_IN_PRESSED_GPIO_LEVEL GPIO_PIN_RESET +#define BSP_KEY_IN_LONG_PRESS_THRESHOLD_MS 500 +#define BSP_KEY_OUT_KEY_COUNT 8 +#define BSP_KEY_OUT_PRESSED_GPIO_LEVEL GPIO_PIN_SET +#define BSP_KEY_OUT_SHORT_PRESS_INTERVAL 200 //短按时间 +#define BSP_KEY_OUT_RELEASE_INTERVAL 200 //双击的两次点击间的延时 +#define BSP_KEY_OUT_LONG_PRESS_INTERVAL 1000 //长按时间 + +typedef enum { + bsp_key_none = 0, + bsp_key1 = 0x01, + bsp_key2 = 0x02, + bsp_key3 = 0x04, + bsp_key4 = 0x08, + bsp_key5 = 0x10, + bsp_key6 = 0x20, + bsp_key7 = 0x40, + bsp_key8 = 0x80 +} bsp_key_number_e; + +typedef enum { + bsp_key_event_none = 0, + bsp_key_event_press, + bsp_key_event_long, + bsp_key_event_double, +} bsp_key_event_type_e; + +void bsp_key_in_out_init(void); +void bsp_key_in_get_event(bsp_key_number_e *key, bsp_key_event_type_e *event); +void bsp_key_out_set_event(bsp_key_number_e key, bsp_key_event_type_e event); + +#endif diff --git a/mihome_bridge/Core/Inc/main.h b/mihome_bridge/Core/Inc/main.h index fecdc7d..5f4ea1b 100644 --- a/mihome_bridge/Core/Inc/main.h +++ b/mihome_bridge/Core/Inc/main.h @@ -41,7 +41,7 @@ extern "C" { /* Exported constants --------------------------------------------------------*/ /* USER CODE BEGIN EC */ - +extern TIM_HandleTypeDef htim6; /* USER CODE END EC */ /* Exported macro ------------------------------------------------------------*/ @@ -57,48 +57,34 @@ void Error_Handler(void); /* USER CODE END EFP */ /* Private defines -----------------------------------------------------------*/ -#define KEY8_Pin GPIO_PIN_0 -#define KEY8_GPIO_Port GPIOA -#define KEY7_Pin GPIO_PIN_1 -#define KEY7_GPIO_Port GPIOA -#define KEY6_Pin GPIO_PIN_2 -#define KEY6_GPIO_Port GPIOA -#define KEY5_Pin GPIO_PIN_3 -#define KEY5_GPIO_Port GPIOA -#define KEY1_Pin GPIO_PIN_4 -#define KEY1_GPIO_Port GPIOA -#define KEY2_Pin GPIO_PIN_5 -#define KEY2_GPIO_Port GPIOA -#define KEY3_Pin GPIO_PIN_6 -#define KEY3_GPIO_Port GPIOA -#define KEY4_Pin GPIO_PIN_7 -#define KEY4_GPIO_Port GPIOA -#define LED4_Pin GPIO_PIN_12 -#define LED4_GPIO_Port GPIOB -#define LED3_Pin GPIO_PIN_13 -#define LED3_GPIO_Port GPIOB -#define LED2_Pin GPIO_PIN_14 -#define LED2_GPIO_Port GPIOB -#define LED1_Pin GPIO_PIN_15 -#define LED1_GPIO_Port GPIOB +#define BSP_KEY_IN_OUT_INTERAEL_MS 10 +#define BSP_KEY_IN_OUT_TIM htim6 +#define KEY_IN1_Pin GPIO_PIN_4 +#define KEY_IN1_GPIO_Port GPIOA +#define KEY_IN2_Pin GPIO_PIN_5 +#define KEY_IN2_GPIO_Port GPIOA +#define KEY_IN3_Pin GPIO_PIN_6 +#define KEY_IN3_GPIO_Port GPIOA +#define KEY_IN4_Pin GPIO_PIN_7 +#define KEY_IN4_GPIO_Port GPIOA +#define KEY_OUT4_Pin GPIO_PIN_12 +#define KEY_OUT4_GPIO_Port GPIOB +#define KEY_OUT3_Pin GPIO_PIN_13 +#define KEY_OUT3_GPIO_Port GPIOB +#define KEY_OUT2_Pin GPIO_PIN_14 +#define KEY_OUT2_GPIO_Port GPIOB +#define KEY_OUT1_Pin GPIO_PIN_15 +#define KEY_OUT1_GPIO_Port GPIOB #define PIR_Pin GPIO_PIN_8 #define PIR_GPIO_Port GPIOA -#define RELAY4_Pin GPIO_PIN_15 -#define RELAY4_GPIO_Port GPIOA -#define RELAY3_Pin GPIO_PIN_3 -#define RELAY3_GPIO_Port GPIOB -#define RELAY2_Pin GPIO_PIN_4 -#define RELAY2_GPIO_Port GPIOB -#define RELAY1_Pin GPIO_PIN_5 -#define RELAY1_GPIO_Port GPIOB -#define LED5_Pin GPIO_PIN_6 -#define LED5_GPIO_Port GPIOB -#define LED6_Pin GPIO_PIN_7 -#define LED6_GPIO_Port GPIOB -#define LED7_Pin GPIO_PIN_8 -#define LED7_GPIO_Port GPIOB -#define LED8_Pin GPIO_PIN_9 -#define LED8_GPIO_Port GPIOB +#define KEY_OUT5_Pin GPIO_PIN_6 +#define KEY_OUT5_GPIO_Port GPIOB +#define KEY_OUT6_Pin GPIO_PIN_7 +#define KEY_OUT6_GPIO_Port GPIOB +#define KEY_OUT7_Pin GPIO_PIN_8 +#define KEY_OUT7_GPIO_Port GPIOB +#define KEY_OUT8_Pin GPIO_PIN_9 +#define KEY_OUT8_GPIO_Port GPIOB /* USER CODE BEGIN Private defines */ diff --git a/mihome_bridge/Core/Inc/stm32f0xx_hal_conf.h b/mihome_bridge/Core/Inc/stm32f0xx_hal_conf.h index e936dc9..1ffa392 100644 --- a/mihome_bridge/Core/Inc/stm32f0xx_hal_conf.h +++ b/mihome_bridge/Core/Inc/stm32f0xx_hal_conf.h @@ -49,14 +49,14 @@ /*#define HAL_RNG_MODULE_ENABLED */ /*#define HAL_RTC_MODULE_ENABLED */ /*#define HAL_SPI_MODULE_ENABLED */ -/*#define HAL_TIM_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED /*#define HAL_USART_MODULE_ENABLED */ /*#define HAL_IRDA_MODULE_ENABLED */ /*#define HAL_SMARTCARD_MODULE_ENABLED */ /*#define HAL_SMBUS_MODULE_ENABLED */ /*#define HAL_WWDG_MODULE_ENABLED */ -#define HAL_PCD_MODULE_ENABLED +/*#define HAL_PCD_MODULE_ENABLED */ #define HAL_CORTEX_MODULE_ENABLED #define HAL_DMA_MODULE_ENABLED #define HAL_FLASH_MODULE_ENABLED diff --git a/mihome_bridge/Core/Inc/stm32f0xx_it.h b/mihome_bridge/Core/Inc/stm32f0xx_it.h index 29d1034..109685b 100644 --- a/mihome_bridge/Core/Inc/stm32f0xx_it.h +++ b/mihome_bridge/Core/Inc/stm32f0xx_it.h @@ -51,6 +51,7 @@ void HardFault_Handler(void); void SVC_Handler(void); void PendSV_Handler(void); void SysTick_Handler(void); +void TIM6_DAC_IRQHandler(void); /* USER CODE BEGIN EFP */ /* USER CODE END EFP */ diff --git a/mihome_bridge/Core/Src/bsp_key_in_out.c b/mihome_bridge/Core/Src/bsp_key_in_out.c new file mode 100644 index 0000000..f68b750 --- /dev/null +++ b/mihome_bridge/Core/Src/bsp_key_in_out.c @@ -0,0 +1,231 @@ +#include "bsp_key_in_out.h" + +typedef struct { + volatile uint32_t tick; + volatile bsp_key_event_type_e event; +} bsp_key_out_status_t; + +typedef struct { + uint8_t is_pressed_before; + uint8_t is_long_pressed; + uint32_t long_press_count; + volatile bsp_key_event_type_e event; +} bsp_key_in_status_t; + +static bsp_key_in_status_t key_in_status[BSP_KEY_IN_KEY_COUNT]; +static bsp_key_out_status_t key_out_status[BSP_KEY_OUT_KEY_COUNT]; +static bsp_key_number_e key_out_gpio_value = bsp_key_none; + +static uint8_t bsp_key_number_to_index(bsp_key_number_e key_number) +{ + switch (key_number) { + case bsp_key1: return 0; + case bsp_key2: return 1; + case bsp_key3: return 2; + case bsp_key4: return 3; + case bsp_key5: return 4; + case bsp_key6: return 5; + case bsp_key7: return 6; + case bsp_key8: return 7; + default: return 0xFF; + } +} + +static bsp_key_number_e bsp_key_in_read(void) +{ + bsp_key_number_e key_in = bsp_key_none; + + if (HAL_GPIO_ReadPin(KEY_IN1_GPIO_Port, KEY_IN1_Pin) == BSP_KEY_IN_PRESSED_GPIO_LEVEL) { + key_in |= bsp_key1; + } + + if (HAL_GPIO_ReadPin(KEY_IN2_GPIO_Port, KEY_IN2_Pin) == BSP_KEY_IN_PRESSED_GPIO_LEVEL) { + key_in |= bsp_key2; + } + + if (HAL_GPIO_ReadPin(KEY_IN3_GPIO_Port, KEY_IN3_Pin) == BSP_KEY_IN_PRESSED_GPIO_LEVEL) { + key_in |= bsp_key3; + } + + if (HAL_GPIO_ReadPin(KEY_IN4_GPIO_Port, KEY_IN4_Pin) == BSP_KEY_IN_PRESSED_GPIO_LEVEL) { + key_in |= bsp_key4; + } + + return key_in; +} + +static void bsp_key_out_write(bsp_key_number_e key_out) +{ + if (key_out & bsp_key1) { + HAL_GPIO_WritePin(KEY_OUT1_GPIO_Port, KEY_OUT1_Pin, BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } else { + HAL_GPIO_WritePin(KEY_OUT1_GPIO_Port, KEY_OUT1_Pin, !BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } + + if (key_out & bsp_key2) { + HAL_GPIO_WritePin(KEY_OUT2_GPIO_Port, KEY_OUT2_Pin, BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } else { + HAL_GPIO_WritePin(KEY_OUT2_GPIO_Port, KEY_OUT2_Pin, !BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } + + if (key_out & bsp_key3) { + HAL_GPIO_WritePin(KEY_OUT3_GPIO_Port, KEY_OUT3_Pin, BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } else { + HAL_GPIO_WritePin(KEY_OUT3_GPIO_Port, KEY_OUT3_Pin, !BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } + + if (key_out & bsp_key4) { + HAL_GPIO_WritePin(KEY_OUT4_GPIO_Port, KEY_OUT4_Pin, BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } else { + HAL_GPIO_WritePin(KEY_OUT4_GPIO_Port, KEY_OUT4_Pin, !BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } + + if (key_out & bsp_key5) { + HAL_GPIO_WritePin(KEY_OUT5_GPIO_Port, KEY_OUT5_Pin, BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } else { + HAL_GPIO_WritePin(KEY_OUT5_GPIO_Port, KEY_OUT5_Pin, !BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } + + if (key_out & bsp_key6) { + HAL_GPIO_WritePin(KEY_OUT6_GPIO_Port, KEY_OUT6_Pin, BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } else { + HAL_GPIO_WritePin(KEY_OUT6_GPIO_Port, KEY_OUT6_Pin, !BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } + + if (key_out & bsp_key7) { + HAL_GPIO_WritePin(KEY_OUT7_GPIO_Port, KEY_OUT7_Pin, BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } else { + HAL_GPIO_WritePin(KEY_OUT7_GPIO_Port, KEY_OUT7_Pin, !BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } + + if (key_out & bsp_key8) { + HAL_GPIO_WritePin(KEY_OUT8_GPIO_Port, KEY_OUT8_Pin, BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } else { + HAL_GPIO_WritePin(KEY_OUT8_GPIO_Port, KEY_OUT8_Pin, !BSP_KEY_OUT_PRESSED_GPIO_LEVEL); + } +} + +static void bsp_key_in_process(void) +{ + bsp_key_number_e key_in = bsp_key_in_read(); //读取按键值 + for (uint8_t key_index = 0; key_index < BSP_KEY_IN_KEY_COUNT; key_index ++) { + uint8_t is_pressed = key_in & 1u << key_index ? 1 : 0; //第key_index个按键是否被按下 + /* 按键抬起状态 */ + if(!is_pressed && !key_in_status[key_index].is_pressed_before) { //本次没有按下 上次也没有按下 + key_in_status[key_index].is_long_pressed = 0; + key_in_status[key_index].long_press_count = 0; //复位长按状态 + } + /* 按键按下状态 */ + if (is_pressed) { //按键处于被按下的状态 + if (!key_in_status[key_index].is_long_pressed) { //如果还未触发长按事件 + key_in_status[key_index].long_press_count ++; //记录长按时间 + + if (key_in_status[key_index].long_press_count > //长按时间超过阈值 + BSP_KEY_IN_LONG_PRESS_THRESHOLD_MS / BSP_KEY_IN_OUT_INTERAEL_MS) { + key_in_status[key_index].is_long_pressed = 1; //记录产生了长按事件 + key_in_status[key_index].event = bsp_key_event_long; //产生长按事件 + } + } + } + /* 按键抬起边沿 */ + if (!is_pressed && key_in_status[key_index].is_pressed_before && + !key_in_status[key_index].is_long_pressed) { //本次没有按下 但上次按下了 且未触发长按事件 + key_in_status[key_index].event = bsp_key_event_press; //产生短按事件 + } + + key_in_status[key_index].is_pressed_before = is_pressed; //记录上次按下的状态 + } +} + +static void bsp_key_out_process(void) +{ + for (uint8_t key_index = 0; key_index < BSP_KEY_OUT_KEY_COUNT; key_index ++) { + if(key_out_status[key_index].event != bsp_key_event_none) { + if (key_out_status[key_index].event == bsp_key_event_press) { + if (key_out_status[key_index].tick == BSP_KEY_OUT_SHORT_PRESS_INTERVAL / BSP_KEY_IN_OUT_INTERAEL_MS) { + key_out_gpio_value |= 1u << key_index; + } + } else if (key_out_status[key_index].event == bsp_key_event_long) { + if (key_out_status[key_index].tick == BSP_KEY_OUT_LONG_PRESS_INTERVAL / BSP_KEY_IN_OUT_INTERAEL_MS) { + key_out_gpio_value |= 1u << key_index; + } + } else if (key_out_status[key_index].event == bsp_key_event_double) { + if (key_out_status[key_index].tick == //第一次按键 + (BSP_KEY_OUT_SHORT_PRESS_INTERVAL * 2 + BSP_KEY_OUT_RELEASE_INTERVAL) / BSP_KEY_IN_OUT_INTERAEL_MS) { + key_out_gpio_value |= 1u << key_index; + } else if (key_out_status[key_index].tick == //第一次松开 + (BSP_KEY_OUT_SHORT_PRESS_INTERVAL + BSP_KEY_OUT_RELEASE_INTERVAL) / BSP_KEY_IN_OUT_INTERAEL_MS) { + key_out_gpio_value &= ~(1u << key_index); + } else if (key_out_status[key_index].tick == BSP_KEY_OUT_SHORT_PRESS_INTERVAL / BSP_KEY_IN_OUT_INTERAEL_MS) { //第二次按键 + key_out_gpio_value |= 1u << key_index; + } + } + + if (key_out_status[key_index].tick == 0) { //输出tick结束 + key_out_gpio_value &= ~(1u << key_index); //GPIO复位 + key_out_status[key_index].event = 0; + } + + key_out_status[key_index].tick --; + } + } + + bsp_key_out_write(key_out_gpio_value); +} + +void bsp_key_in_get_event(bsp_key_number_e *key, bsp_key_event_type_e *event) +{ + *key = bsp_key_none; + *event = bsp_key_event_none; + + for (uint8_t key_index = 0; key_index < BSP_KEY_IN_KEY_COUNT; key_index ++) { + //第key_index个按键是否被按下 + if (key_in_status[key_index].event != bsp_key_event_none) { + *key = 1u << key_index; + *event = key_in_status[key_index].event; + key_in_status[key_index].event = bsp_key_event_none; + return; + } + } +} + +void bsp_key_out_set_event(bsp_key_number_e key, bsp_key_event_type_e event) +{ + uint8_t key_index = bsp_key_number_to_index(key); + if (key_index == 0xFF || key_out_status[key_index].event != bsp_key_event_none) { + return; + } + + uint32_t interval_ms; + switch (event) { + case bsp_key_event_press: + interval_ms = BSP_KEY_OUT_SHORT_PRESS_INTERVAL; + break; + case bsp_key_event_long: + interval_ms = BSP_KEY_OUT_LONG_PRESS_INTERVAL; + break; + case bsp_key_event_double: + interval_ms = BSP_KEY_OUT_SHORT_PRESS_INTERVAL * 2 + BSP_KEY_OUT_RELEASE_INTERVAL; + break; + default: + return; + } + + key_out_status[key_index].event = event; + key_out_status[key_index].tick = interval_ms / BSP_KEY_IN_OUT_INTERAEL_MS; +} + +void bsp_key_in_out_init(void) +{ + HAL_TIM_Base_Start_IT(&BSP_KEY_IN_OUT_TIM); +} + +void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) +{ + if (htim == &BSP_KEY_IN_OUT_TIM) { + /* 处理输入按键事件 */ + bsp_key_in_process(); + /* 处理输出按键事件 */ + bsp_key_out_process(); + } +} diff --git a/mihome_bridge/Core/Src/main.c b/mihome_bridge/Core/Src/main.c index 29afc32..b3a2c6a 100644 --- a/mihome_bridge/Core/Src/main.c +++ b/mihome_bridge/Core/Src/main.c @@ -21,6 +21,7 @@ /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ +#include "bsp_key_in_out.h" #include "usbd_core.h" #include "usb_hid.h" /* USER CODE END Includes */ @@ -41,9 +42,9 @@ /* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ -UART_HandleTypeDef huart1; +TIM_HandleTypeDef htim6; -PCD_HandleTypeDef hpcd_USB_FS; +UART_HandleTypeDef huart1; /* USER CODE BEGIN PV */ @@ -53,7 +54,7 @@ PCD_HandleTypeDef hpcd_USB_FS; void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_USART1_UART_Init(void); -static void MX_USB_PCD_Init(void); +static void MX_TIM6_Init(void); /* USER CODE BEGIN PFP */ void hid_keyboard_init(uint8_t busid, uint32_t reg_base); void hid_keyboard_test(uint8_t busid, uint8_t key); @@ -107,48 +108,49 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_USART1_UART_Init(); - MX_USB_PCD_Init(); + MX_TIM6_Init(); /* USER CODE BEGIN 2 */ hid_keyboard_init(0, USB_BASE); - - HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin | LED2_Pin | LED3_Pin | LED4_Pin | - LED5_Pin | LED6_Pin | LED7_Pin | LED8_Pin, GPIO_PIN_SET); - HAL_Delay(100); - HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin | LED2_Pin | LED3_Pin | LED4_Pin | - LED5_Pin | LED6_Pin | LED7_Pin | LED8_Pin, GPIO_PIN_RESET); - HAL_Delay(100); - HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin | LED2_Pin | LED3_Pin | LED4_Pin | - LED5_Pin | LED6_Pin | LED7_Pin | LED8_Pin, GPIO_PIN_SET); - HAL_Delay(100); - HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin | LED2_Pin | LED3_Pin | LED4_Pin | - LED5_Pin | LED6_Pin | LED7_Pin | LED8_Pin, GPIO_PIN_RESET); - HAL_Delay(100); - HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin | LED2_Pin | LED3_Pin | LED4_Pin | - LED5_Pin | LED6_Pin | LED7_Pin | LED8_Pin, GPIO_PIN_SET); - HAL_Delay(100); - HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin | LED2_Pin | LED3_Pin | LED4_Pin | - LED5_Pin | LED6_Pin | LED7_Pin | LED8_Pin, GPIO_PIN_RESET); + bsp_key_in_out_init(); + + bsp_key_out_set_event(bsp_key1, bsp_key_event_double); + bsp_key_out_set_event(bsp_key2, bsp_key_event_double); + bsp_key_out_set_event(bsp_key3, bsp_key_event_double); + bsp_key_out_set_event(bsp_key4, bsp_key_event_double); + bsp_key_out_set_event(bsp_key5, bsp_key_event_long); + bsp_key_out_set_event(bsp_key6, bsp_key_event_long); + bsp_key_out_set_event(bsp_key7, bsp_key_event_long); + bsp_key_out_set_event(bsp_key8, bsp_key_event_long); /* USER CODE END 2 */ + /* Infinite loop */ /* USER CODE BEGIN WHILE */ - while (1) - { - if (HAL_GPIO_ReadPin(KEY1_GPIO_Port, KEY1_Pin) == GPIO_PIN_RESET) { - hid_keyboard_test(0, HID_KBD_USAGE_1); - } else if (HAL_GPIO_ReadPin(KEY2_GPIO_Port, KEY2_Pin) == GPIO_PIN_RESET) { - hid_keyboard_test(0, HID_KBD_USAGE_1 + 1); - } else if (HAL_GPIO_ReadPin(KEY3_GPIO_Port, KEY3_Pin) == GPIO_PIN_RESET) { - hid_keyboard_test(0, HID_KBD_USAGE_1 + 2); - } else if (HAL_GPIO_ReadPin(KEY4_GPIO_Port, KEY4_Pin) == GPIO_PIN_RESET) { - hid_keyboard_test(0, HID_KBD_USAGE_1 + 3); - } else if (HAL_GPIO_ReadPin(KEY5_GPIO_Port, KEY5_Pin) == GPIO_PIN_RESET) { - hid_keyboard_test(0, HID_KBD_USAGE_A); - } else if (HAL_GPIO_ReadPin(KEY6_GPIO_Port, KEY6_Pin) == GPIO_PIN_RESET) { - hid_keyboard_test(0, HID_KBD_USAGE_A + 1); - } else if (HAL_GPIO_ReadPin(KEY7_GPIO_Port, KEY7_Pin) == GPIO_PIN_RESET) { - hid_keyboard_test(0, HID_KBD_USAGE_A + 2); - } else if (HAL_GPIO_ReadPin(KEY8_GPIO_Port, KEY8_Pin) == GPIO_PIN_RESET) { - hid_keyboard_test(0, HID_KBD_USAGE_A + 3); + while (1) { + bsp_key_number_e key; + bsp_key_event_type_e event; + bsp_key_in_get_event(&key, &event); + bsp_key_out_set_event(key, event); + + if (event == bsp_key_event_press) { + if (key == bsp_key1) { + hid_keyboard_test(0, HID_KBD_USAGE_1); + } else if (key == bsp_key2) { + hid_keyboard_test(0, HID_KBD_USAGE_1 + 1); + } else if (key == bsp_key3) { + hid_keyboard_test(0, HID_KBD_USAGE_1 + 2); + } else if (key == bsp_key4) { + hid_keyboard_test(0, HID_KBD_USAGE_1 + 3); + } + } else if (event == bsp_key_event_long) { + if (key == bsp_key1) { + hid_keyboard_test(0, HID_KBD_USAGE_A); + } else if (key == bsp_key2) { + hid_keyboard_test(0, HID_KBD_USAGE_A + 1); + } else if (key == bsp_key3) { + hid_keyboard_test(0, HID_KBD_USAGE_A + 2); + } else if (key == bsp_key4) { + hid_keyboard_test(0, HID_KBD_USAGE_A + 3); + } } else { hid_keyboard_test(0, 0x00); } @@ -192,16 +194,52 @@ void SystemClock_Config(void) { Error_Handler(); } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB|RCC_PERIPHCLK_USART1; + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK1; - PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); } } +/** + * @brief TIM6 Initialization Function + * @param None + * @retval None + */ +static void MX_TIM6_Init(void) +{ + + /* USER CODE BEGIN TIM6_Init 0 */ + + /* USER CODE END TIM6_Init 0 */ + + TIM_MasterConfigTypeDef sMasterConfig = {0}; + + /* USER CODE BEGIN TIM6_Init 1 */ + + /* USER CODE END TIM6_Init 1 */ + htim6.Instance = TIM6; + htim6.Init.Prescaler = SystemCoreClock / 1000 -1; + htim6.Init.CounterMode = TIM_COUNTERMODE_UP; + htim6.Init.Period = BSP_KEY_IN_OUT_INTERAEL_MS - 1; + htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim6) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM6_Init 2 */ + + /* USER CODE END TIM6_Init 2 */ + +} + /** * @brief USART1 Initialization Function * @param None @@ -237,38 +275,6 @@ static void MX_USART1_UART_Init(void) } -/** - * @brief USB Initialization Function - * @param None - * @retval None - */ -static void MX_USB_PCD_Init(void) -{ - - /* USER CODE BEGIN USB_Init 0 */ - return; - /* USER CODE END USB_Init 0 */ - - /* USER CODE BEGIN USB_Init 1 */ - - /* USER CODE END USB_Init 1 */ - hpcd_USB_FS.Instance = USB; - hpcd_USB_FS.Init.dev_endpoints = 8; - hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; - hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED; - hpcd_USB_FS.Init.low_power_enable = DISABLE; - hpcd_USB_FS.Init.lpm_enable = DISABLE; - hpcd_USB_FS.Init.battery_charging_enable = DISABLE; - if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN USB_Init 2 */ - - /* USER CODE END USB_Init 2 */ - -} - /** * @brief GPIO Initialization Function * @param None @@ -286,24 +292,22 @@ static void MX_GPIO_Init(void) __HAL_RCC_GPIOB_CLK_ENABLE(); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOB, LED4_Pin|LED3_Pin|LED2_Pin|LED1_Pin - |LED5_Pin|LED6_Pin|LED7_Pin|LED8_Pin, GPIO_PIN_RESET); + HAL_GPIO_WritePin(GPIOB, KEY_OUT4_Pin|KEY_OUT3_Pin|KEY_OUT2_Pin|KEY_OUT1_Pin + |KEY_OUT5_Pin|KEY_OUT6_Pin|KEY_OUT7_Pin|KEY_OUT8_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(PIR_GPIO_Port, PIR_Pin, GPIO_PIN_SET); - /*Configure GPIO pins : KEY8_Pin KEY7_Pin KEY6_Pin KEY5_Pin - KEY1_Pin KEY2_Pin KEY3_Pin KEY4_Pin */ - GPIO_InitStruct.Pin = KEY8_Pin|KEY7_Pin|KEY6_Pin|KEY5_Pin - |KEY1_Pin|KEY2_Pin|KEY3_Pin|KEY4_Pin; + /*Configure GPIO pins : KEY_IN1_Pin KEY_IN2_Pin KEY_IN3_Pin KEY_IN4_Pin */ + GPIO_InitStruct.Pin = KEY_IN1_Pin|KEY_IN2_Pin|KEY_IN3_Pin|KEY_IN4_Pin; GPIO_InitStruct.Mode = GPIO_MODE_INPUT; GPIO_InitStruct.Pull = GPIO_PULLUP; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - /*Configure GPIO pins : LED4_Pin LED3_Pin LED2_Pin LED1_Pin - LED5_Pin LED6_Pin LED7_Pin LED8_Pin */ - GPIO_InitStruct.Pin = LED4_Pin|LED3_Pin|LED2_Pin|LED1_Pin - |LED5_Pin|LED6_Pin|LED7_Pin|LED8_Pin; + /*Configure GPIO pins : KEY_OUT4_Pin KEY_OUT3_Pin KEY_OUT2_Pin KEY_OUT1_Pin + KEY_OUT5_Pin KEY_OUT6_Pin KEY_OUT7_Pin KEY_OUT8_Pin */ + GPIO_InitStruct.Pin = KEY_OUT4_Pin|KEY_OUT3_Pin|KEY_OUT2_Pin|KEY_OUT1_Pin + |KEY_OUT5_Pin|KEY_OUT6_Pin|KEY_OUT7_Pin|KEY_OUT8_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; @@ -316,18 +320,6 @@ static void MX_GPIO_Init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(PIR_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pin : RELAY4_Pin */ - GPIO_InitStruct.Pin = RELAY4_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_PULLDOWN; - HAL_GPIO_Init(RELAY4_GPIO_Port, &GPIO_InitStruct); - - /*Configure GPIO pins : RELAY3_Pin RELAY2_Pin RELAY1_Pin */ - GPIO_InitStruct.Pin = RELAY3_Pin|RELAY2_Pin|RELAY1_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_PULLDOWN; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } diff --git a/mihome_bridge/Core/Src/stm32f0xx_hal_msp.c b/mihome_bridge/Core/Src/stm32f0xx_hal_msp.c index cd11fa0..09c4859 100644 --- a/mihome_bridge/Core/Src/stm32f0xx_hal_msp.c +++ b/mihome_bridge/Core/Src/stm32f0xx_hal_msp.c @@ -77,6 +77,56 @@ void HAL_MspInit(void) /* USER CODE END MspInit 1 */ } +/** +* @brief TIM_Base MSP Initialization +* This function configures the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM6) + { + /* USER CODE BEGIN TIM6_MspInit 0 */ + + /* USER CODE END TIM6_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_TIM6_CLK_ENABLE(); + /* TIM6 interrupt Init */ + HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 1, 0); + HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn); + /* USER CODE BEGIN TIM6_MspInit 1 */ + + /* USER CODE END TIM6_MspInit 1 */ + } + +} + +/** +* @brief TIM_Base MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param htim_base: TIM_Base handle pointer +* @retval None +*/ +void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) +{ + if(htim_base->Instance==TIM6) + { + /* USER CODE BEGIN TIM6_MspDeInit 0 */ + + /* USER CODE END TIM6_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM6_CLK_DISABLE(); + + /* TIM6 interrupt DeInit */ + HAL_NVIC_DisableIRQ(TIM6_DAC_IRQn); + /* USER CODE BEGIN TIM6_MspDeInit 1 */ + + /* USER CODE END TIM6_MspDeInit 1 */ + } + +} + /** * @brief UART MSP Initialization * This function configures the hardware resources used in this example @@ -142,50 +192,6 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) } -/** -* @brief PCD MSP Initialization -* This function configures the hardware resources used in this example -* @param hpcd: PCD handle pointer -* @retval None -*/ -void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd) -{ - if(hpcd->Instance==USB) - { - /* USER CODE BEGIN USB_MspInit 0 */ - - /* USER CODE END USB_MspInit 0 */ - /* Peripheral clock enable */ - __HAL_RCC_USB_CLK_ENABLE(); - /* USER CODE BEGIN USB_MspInit 1 */ - - /* USER CODE END USB_MspInit 1 */ - } - -} - -/** -* @brief PCD MSP De-Initialization -* This function freeze the hardware resources used in this example -* @param hpcd: PCD handle pointer -* @retval None -*/ -void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd) -{ - if(hpcd->Instance==USB) - { - /* USER CODE BEGIN USB_MspDeInit 0 */ - - /* USER CODE END USB_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USB_CLK_DISABLE(); - /* USER CODE BEGIN USB_MspDeInit 1 */ - - /* USER CODE END USB_MspDeInit 1 */ - } - -} - /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/mihome_bridge/Core/Src/stm32f0xx_it.c b/mihome_bridge/Core/Src/stm32f0xx_it.c index 8e4c7aa..a874ec6 100644 --- a/mihome_bridge/Core/Src/stm32f0xx_it.c +++ b/mihome_bridge/Core/Src/stm32f0xx_it.c @@ -55,7 +55,7 @@ void USBD_IRQHandler(uint8_t busid); /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ - +extern TIM_HandleTypeDef htim6; /* USER CODE BEGIN EV */ /* USER CODE END EV */ @@ -140,6 +140,20 @@ void SysTick_Handler(void) /* please refer to the startup file (startup_stm32f0xx.s). */ /******************************************************************************/ +/** + * @brief This function handles TIM6 global and DAC channel underrun error interrupts. + */ +void TIM6_DAC_IRQHandler(void) +{ + /* USER CODE BEGIN TIM6_DAC_IRQn 0 */ + + /* USER CODE END TIM6_DAC_IRQn 0 */ + HAL_TIM_IRQHandler(&htim6); + /* USER CODE BEGIN TIM6_DAC_IRQn 1 */ + + /* USER CODE END TIM6_DAC_IRQn 1 */ +} + /* USER CODE BEGIN 1 */ void USB_IRQHandler(void) { diff --git a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h b/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h deleted file mode 100644 index a612f43..0000000 --- a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h +++ /dev/null @@ -1,994 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f0xx_hal_pcd.h - * @author MCD Application Team - * @brief Header file of PCD HAL module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32F0xx_HAL_PCD_H -#define STM32F0xx_HAL_PCD_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f0xx_ll_usb.h" - -#if defined (USB) - -/** @addtogroup STM32F0xx_HAL_Driver - * @{ - */ - -/** @addtogroup PCD - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup PCD_Exported_Types PCD Exported Types - * @{ - */ - -/** - * @brief PCD State structure definition - */ -typedef enum -{ - HAL_PCD_STATE_RESET = 0x00, - HAL_PCD_STATE_READY = 0x01, - HAL_PCD_STATE_ERROR = 0x02, - HAL_PCD_STATE_BUSY = 0x03, - HAL_PCD_STATE_TIMEOUT = 0x04 -} PCD_StateTypeDef; - -/* Device LPM suspend state */ -typedef enum -{ - LPM_L0 = 0x00, /* on */ - LPM_L1 = 0x01, /* LPM L1 sleep */ - LPM_L2 = 0x02, /* suspend */ - LPM_L3 = 0x03, /* off */ -} PCD_LPM_StateTypeDef; - -typedef enum -{ - PCD_LPM_L0_ACTIVE = 0x00, /* on */ - PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ -} PCD_LPM_MsgTypeDef; - -typedef enum -{ - PCD_BCD_ERROR = 0xFF, - PCD_BCD_CONTACT_DETECTION = 0xFE, - PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, - PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, - PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, - PCD_BCD_DISCOVERY_COMPLETED = 0x00, - -} PCD_BCD_MsgTypeDef; - - - - - -typedef USB_TypeDef PCD_TypeDef; -typedef USB_CfgTypeDef PCD_InitTypeDef; -typedef USB_EPTypeDef PCD_EPTypeDef; - - -/** - * @brief PCD Handle Structure definition - */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -typedef struct __PCD_HandleTypeDef -#else -typedef struct -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -{ - PCD_TypeDef *Instance; /*!< Register base address */ - PCD_InitTypeDef Init; /*!< PCD required parameters */ - __IO uint8_t USB_Address; /*!< USB Address */ - PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */ - PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */ - HAL_LockTypeDef Lock; /*!< PCD peripheral status */ - __IO PCD_StateTypeDef State; /*!< PCD communication state */ - __IO uint32_t ErrorCode; /*!< PCD Error code */ - uint32_t Setup[12]; /*!< Setup packet buffer */ - PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ - uint32_t BESL; - - - uint32_t lpm_active; /*!< Enable or disable the Link Power Management . - This parameter can be set to ENABLE or DISABLE */ - - uint32_t battery_charging_active; /*!< Enable or disable Battery charging. - This parameter can be set to ENABLE or DISABLE */ - void *pData; /*!< Pointer to upper stack Handler */ - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ - void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ - void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ - void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ - void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ - void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ - void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ - - void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ - void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ - void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ - void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ - void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */ - void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */ - - void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ - void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -} PCD_HandleTypeDef; - -/** - * @} - */ - -/* Include PCD HAL Extended module */ -#include "stm32f0xx_hal_pcd_ex.h" - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup PCD_Exported_Constants PCD Exported Constants - * @{ - */ - -/** @defgroup PCD_Speed PCD Speed - * @{ - */ -#define PCD_SPEED_FULL USBD_FS_SPEED -/** - * @} - */ - -/** @defgroup PCD_PHY_Module PCD PHY Module - * @{ - */ -#define PCD_PHY_ULPI 1U -#define PCD_PHY_EMBEDDED 2U -#define PCD_PHY_UTMI 3U -/** - * @} - */ - -/** @defgroup PCD_Error_Code_definition PCD Error Code definition - * @brief PCD Error Code definition - * @{ - */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -#define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup PCD_Exported_Macros PCD Exported Macros - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ -#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) - -#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \ - ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) - - -#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\ - &= (uint16_t)(~(__INTERRUPT__))) - -#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_WAKEUP_EXTI_LINE -#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE) - - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup PCD_Exported_Functions PCD Exported Functions - * @{ - */ - -/* Initialization/de-initialization functions ********************************/ -/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); -void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); -void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -/** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition - * @brief HAL USB OTG PCD Callback ID enumeration definition - * @{ - */ -typedef enum -{ - HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ - HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ - HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ - HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ - HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ - HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ - HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ - - HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ - HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ - -} HAL_PCD_CallbackIDTypeDef; -/** - * @} - */ - -/** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition - * @brief HAL USB OTG PCD Callback pointer definition - * @{ - */ - -typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ -typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ -typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ -typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ -typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ -typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */ -typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */ - -/** - * @} - */ - -HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, - pPCD_CallbackTypeDef pCallback); - -HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID); - -HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, - pPCD_DataOutStageCallbackTypeDef pCallback); - -HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); - -HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, - pPCD_DataInStageCallbackTypeDef pCallback); - -HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); - -HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, - pPCD_IsoOutIncpltCallbackTypeDef pCallback); - -HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); - -HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, - pPCD_IsoInIncpltCallbackTypeDef pCallback); - -HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); - -HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); - -HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ -/** - * @} - */ - -/* I/O operation functions ***************************************************/ -/* Non-Blocking mode: Interrupt */ -/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ -HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); - -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); - -void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -/** - * @} - */ - -/* Peripheral Control functions **********************************************/ -/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ -HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); -HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); -HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -/** - * @} - */ - -/* Peripheral State functions ************************************************/ -/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions - * @{ - */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup PCD_Private_Constants PCD Private Constants - * @{ - */ -/** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt - * @{ - */ - - -#define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */ - - -/** - * @} - */ - -/** @defgroup PCD_EP0_MPS PCD EP0 MPS - * @{ - */ -#define PCD_EP0MPS_64 EP_MPS_64 -#define PCD_EP0MPS_32 EP_MPS_32 -#define PCD_EP0MPS_16 EP_MPS_16 -#define PCD_EP0MPS_08 EP_MPS_8 -/** - * @} - */ - -/** @defgroup PCD_ENDP PCD ENDP - * @{ - */ -#define PCD_ENDP0 0U -#define PCD_ENDP1 1U -#define PCD_ENDP2 2U -#define PCD_ENDP3 3U -#define PCD_ENDP4 4U -#define PCD_ENDP5 5U -#define PCD_ENDP6 6U -#define PCD_ENDP7 7U -/** - * @} - */ - -/** @defgroup PCD_ENDP_Kind PCD Endpoint Kind - * @{ - */ -#define PCD_SNG_BUF 0U -#define PCD_DBL_BUF 1U -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup PCD_Private_Macros PCD Private Macros - * @{ - */ - -/******************** Bit definition for USB_COUNTn_RX register *************/ -#define USB_CNTRX_NBLK_MSK (0x1FU << 10) -#define USB_CNTRX_BLSIZE (0x1U << 15) - -/* SetENDPOINT */ -#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) \ - (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) - -/* GetENDPOINT */ -#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) - - -/** - * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wType Endpoint Type. - * @retval None - */ -#define PCD_SET_EPTYPE(USBx, bEpNum, wType) \ - (PCD_SET_ENDPOINT((USBx), (bEpNum), \ - ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) - - -/** - * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval Endpoint Type - */ -#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) - -/** - * @brief free buffer used from the application realizing it to the line - * toggles bit SW_BUF in the double buffered endpoint register - * @param USBx USB device. - * @param bEpNum, bDir - * @retval None - */ -#define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \ - do { \ - if ((bDir) == 0U) \ - { \ - /* OUT double buffered endpoint */ \ - PCD_TX_DTOG((USBx), (bEpNum)); \ - } \ - else if ((bDir) == 1U) \ - { \ - /* IN double buffered endpoint */ \ - PCD_RX_DTOG((USBx), (bEpNum)); \ - } \ - } while(0) - -/** - * @brief sets the status for tx transfer (bits STAT_TX[1:0]). - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wState new state - * @retval None - */ -#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ - /* toggle first bit ? */ \ - if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ - { \ - _wRegVal ^= USB_EPTX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ - { \ - _wRegVal ^= USB_EPTX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_SET_EP_TX_STATUS */ - -/** - * @brief sets the status for rx transfer (bits STAT_TX[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wState new state - * @retval None - */ -#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ - /* toggle first bit ? */ \ - if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ - { \ - _wRegVal ^= USB_EPRX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ - { \ - _wRegVal ^= USB_EPRX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_SET_EP_RX_STATUS */ - -/** - * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wStaterx new state. - * @param wStatetx new state. - * @retval None - */ -#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ - /* toggle first bit ? */ \ - if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ - { \ - _wRegVal ^= USB_EPRX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ - { \ - _wRegVal ^= USB_EPRX_DTOG2; \ - } \ - /* toggle first bit ? */ \ - if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ - { \ - _wRegVal ^= USB_EPTX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ - { \ - _wRegVal ^= USB_EPTX_DTOG2; \ - } \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_SET_EP_TXRX_STATUS */ - -/** - * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] - * /STAT_RX[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval status - */ -#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) -#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) - -/** - * @brief sets directly the VALID tx/rx-status into the endpoint register - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) -#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) - -/** - * @brief checks stall condition in an endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval TRUE = endpoint in stall condition. - */ -#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) -#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) - -/** - * @brief set & clear EP_KIND bit. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_KIND(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ - } while(0) /* PCD_SET_EP_KIND */ - -#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_CLEAR_EP_KIND */ - -/** - * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) -#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) - -/** - * @brief Sets/clears directly EP_KIND bit in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) -#define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) - -/** - * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ - } while(0) /* PCD_CLEAR_RX_EP_CTR */ - -#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ - } while(0) /* PCD_CLEAR_TX_EP_CTR */ - -/** - * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_RX_DTOG(USBx, bEpNum) \ - do { \ - uint16_t _wEPVal; \ - \ - _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ - } while(0) /* PCD_RX_DTOG */ - -#define PCD_TX_DTOG(USBx, bEpNum) \ - do { \ - uint16_t _wEPVal; \ - \ - _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ - } while(0) /* PCD_TX_DTOG */ -/** - * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ - \ - if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ - { \ - PCD_RX_DTOG((USBx), (bEpNum)); \ - } \ - } while(0) /* PCD_CLEAR_RX_DTOG */ - -#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ - \ - if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ - { \ - PCD_TX_DTOG((USBx), (bEpNum)); \ - } \ - } while(0) /* PCD_CLEAR_TX_DTOG */ - -/** - * @brief Sets address in an endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param bAddr Address. - * @retval None - */ -#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_SET_EP_ADDRESS */ - -/** - * @brief Gets address in an endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) - -#define PCD_EP_TX_CNT(USBx, bEpNum) \ - ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \ - ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) - -#define PCD_EP_RX_CNT(USBx, bEpNum) \ - ((uint16_t *)((((uint32_t)(USBx)->BTABLE + \ - ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) - - -/** - * @brief sets address of the tx/rx buffer. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wAddr address to be set (must be word aligned). - * @retval None - */ -#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ - do { \ - __IO uint16_t *_wRegVal; \ - uint32_t _wRegBase = (uint32_t)USBx; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ - *_wRegVal = ((wAddr) >> 1) << 1; \ - } while(0) /* PCD_SET_EP_TX_ADDRESS */ - -#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ - do { \ - __IO uint16_t *_wRegVal; \ - uint32_t _wRegBase = (uint32_t)USBx; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ - *_wRegVal = ((wAddr) >> 1) << 1; \ - } while(0) /* PCD_SET_EP_RX_ADDRESS */ - -/** - * @brief Gets address of the tx/rx buffer. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval address of the buffer. - */ -#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) -#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) - -/** - * @brief Sets counter of rx buffer with no. of blocks. - * @param pdwReg Register pointer - * @param wCount Counter. - * @param wNBlocks no. of Blocks. - * @retval None - */ -#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ - do { \ - (wNBlocks) = (wCount) >> 5; \ - if (((wCount) & 0x1fU) == 0U) \ - { \ - (wNBlocks)--; \ - } \ - *(pdwReg) |= (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ - } while(0) /* PCD_CALC_BLK32 */ - -#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ - do { \ - (wNBlocks) = (wCount) >> 1; \ - if (((wCount) & 0x1U) != 0U) \ - { \ - (wNBlocks)++; \ - } \ - *(pdwReg) |= (uint16_t)((wNBlocks) << 10); \ - } while(0) /* PCD_CALC_BLK2 */ - -#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ - do { \ - uint32_t wNBlocks; \ - \ - *(pdwReg) &= 0x3FFU; \ - \ - if ((wCount) > 62U) \ - { \ - PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ - } \ - else \ - { \ - if ((wCount) == 0U) \ - { \ - *(pdwReg) |= USB_CNTRX_BLSIZE; \ - } \ - else \ - { \ - PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ - } \ - } \ - } while(0) /* PCD_SET_EP_CNT_RX_REG */ - -#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ - do { \ - uint32_t _wRegBase = (uint32_t)(USBx); \ - __IO uint16_t *pdwReg; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ - PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ - } while(0) - -/** - * @brief sets counter for the tx/rx buffer. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wCount Counter value. - * @retval None - */ -#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ - do { \ - uint32_t _wRegBase = (uint32_t)(USBx); \ - __IO uint16_t *_wRegVal; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ - *_wRegVal = (uint16_t)(wCount); \ - } while(0) - -#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ - do { \ - uint32_t _wRegBase = (uint32_t)(USBx); \ - __IO uint16_t *_wRegVal; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ - PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ - } while(0) - -/** - * @brief gets counter of the tx buffer. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval Counter value - */ -#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) -#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) - -/** - * @brief Sets buffer 0/1 address in a double buffer endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wBuf0Addr buffer 0 address. - * @retval Counter value - */ -#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ - do { \ - PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ - } while(0) /* PCD_SET_EP_DBUF0_ADDR */ - -#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ - do { \ - PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ - } while(0) /* PCD_SET_EP_DBUF1_ADDR */ - -/** - * @brief Sets addresses in a double buffer endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wBuf0Addr: buffer 0 address. - * @param wBuf1Addr = buffer 1 address. - * @retval None - */ -#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ - do { \ - PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ - PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ - } while(0) /* PCD_SET_EP_DBUF_ADDR */ - -/** - * @brief Gets buffer 0/1 address of a double buffer endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) -#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) - -/** - * @brief Gets buffer 0/1 address of a double buffer endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param bDir endpoint dir EP_DBUF_OUT = OUT - * EP_DBUF_IN = IN - * @param wCount: Counter value - * @retval None - */ -#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ - do { \ - if ((bDir) == 0U) \ - /* OUT endpoint */ \ - { \ - PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ - } \ - else \ - { \ - if ((bDir) == 1U) \ - { \ - /* IN endpoint */ \ - PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ - } \ - } \ - } while(0) /* SetEPDblBuf0Count*/ - -#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ - do { \ - uint32_t _wBase = (uint32_t)(USBx); \ - __IO uint16_t *_wEPRegVal; \ - \ - if ((bDir) == 0U) \ - { \ - /* OUT endpoint */ \ - PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ - } \ - else \ - { \ - if ((bDir) == 1U) \ - { \ - /* IN endpoint */ \ - _wBase += (uint32_t)(USBx)->BTABLE; \ - _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ - *_wEPRegVal = (uint16_t)(wCount); \ - } \ - } \ - } while(0) /* SetEPDblBuf1Count */ - -#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ - do { \ - PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ - PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ - } while(0) /* PCD_SET_EP_DBUF_CNT */ - -/** - * @brief Gets buffer 0/1 rx/tx counter for double buffering. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) -#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) - - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -#endif /* defined (USB) */ - -#ifdef __cplusplus -} -#endif - -#endif /* STM32F0xx_HAL_PCD_H */ diff --git a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h b/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h deleted file mode 100644 index 39b7508..0000000 --- a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h +++ /dev/null @@ -1,88 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f0xx_hal_pcd_ex.h - * @author MCD Application Team - * @brief Header file of PCD HAL Extension module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32F0xx_HAL_PCD_EX_H -#define STM32F0xx_HAL_PCD_EX_H - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f0xx_hal_def.h" - -#if defined (USB) -/** @addtogroup STM32F0xx_HAL_Driver - * @{ - */ - -/** @addtogroup PCDEx - * @{ - */ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions - * @{ - */ -/** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions - * @{ - */ - - - -HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, - uint16_t ep_kind, uint32_t pmaadress); - - -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); - - -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); - -void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); -void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -#endif /* defined (USB) */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - - -#endif /* STM32F0xx_HAL_PCD_EX_H */ diff --git a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h b/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h new file mode 100644 index 0000000..b2220b2 --- /dev/null +++ b/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h @@ -0,0 +1,4005 @@ +/** + ****************************************************************************** + * @file stm32f0xx_ll_tim.h + * @author MCD Application Team + * @brief Header file of TIM LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F0xx_LL_TIM_H +#define __STM32F0xx_LL_TIM_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f0xx.h" + +/** @addtogroup STM32F0xx_LL_Driver + * @{ + */ + +#if defined (TIM1) || defined (TIM2) || defined (TIM3) || defined (TIM14) || defined (TIM15) || defined (TIM16) || defined (TIM17) || defined (TIM6) || defined (TIM7) + +/** @defgroup TIM_LL TIM + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/** @defgroup TIM_LL_Private_Variables TIM Private Variables + * @{ + */ +static const uint8_t OFFSET_TAB_CCMRx[] = +{ + 0x00U, /* 0: TIMx_CH1 */ + 0x00U, /* 1: TIMx_CH1N */ + 0x00U, /* 2: TIMx_CH2 */ + 0x00U, /* 3: TIMx_CH2N */ + 0x04U, /* 4: TIMx_CH3 */ + 0x04U, /* 5: TIMx_CH3N */ + 0x04U /* 6: TIMx_CH4 */ +}; + +static const uint8_t SHIFT_TAB_OCxx[] = +{ + 0U, /* 0: OC1M, OC1FE, OC1PE */ + 0U, /* 1: - NA */ + 8U, /* 2: OC2M, OC2FE, OC2PE */ + 0U, /* 3: - NA */ + 0U, /* 4: OC3M, OC3FE, OC3PE */ + 0U, /* 5: - NA */ + 8U /* 6: OC4M, OC4FE, OC4PE */ +}; + +static const uint8_t SHIFT_TAB_ICxx[] = +{ + 0U, /* 0: CC1S, IC1PSC, IC1F */ + 0U, /* 1: - NA */ + 8U, /* 2: CC2S, IC2PSC, IC2F */ + 0U, /* 3: - NA */ + 0U, /* 4: CC3S, IC3PSC, IC3F */ + 0U, /* 5: - NA */ + 8U /* 6: CC4S, IC4PSC, IC4F */ +}; + +static const uint8_t SHIFT_TAB_CCxP[] = +{ + 0U, /* 0: CC1P */ + 2U, /* 1: CC1NP */ + 4U, /* 2: CC2P */ + 6U, /* 3: CC2NP */ + 8U, /* 4: CC3P */ + 10U, /* 5: CC3NP */ + 12U /* 6: CC4P */ +}; + +static const uint8_t SHIFT_TAB_OISx[] = +{ + 0U, /* 0: OIS1 */ + 1U, /* 1: OIS1N */ + 2U, /* 2: OIS2 */ + 3U, /* 3: OIS2N */ + 4U, /* 4: OIS3 */ + 5U, /* 5: OIS3N */ + 6U /* 6: OIS4 */ +}; +/** + * @} + */ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup TIM_LL_Private_Constants TIM Private Constants + * @{ + */ + + +#define TIMx_OR_RMP_SHIFT 16U +#define TIMx_OR_RMP_MASK 0x0000FFFFU +#define TIM14_OR_RMP_MASK (TIM14_OR_TI1_RMP << TIMx_OR_RMP_SHIFT) + +/* Mask used to set the TDG[x:0] of the DTG bits of the TIMx_BDTR register */ +#define DT_DELAY_1 ((uint8_t)0x7F) +#define DT_DELAY_2 ((uint8_t)0x3F) +#define DT_DELAY_3 ((uint8_t)0x1F) +#define DT_DELAY_4 ((uint8_t)0x1F) + +/* Mask used to set the DTG[7:5] bits of the DTG bits of the TIMx_BDTR register */ +#define DT_RANGE_1 ((uint8_t)0x00) +#define DT_RANGE_2 ((uint8_t)0x80) +#define DT_RANGE_3 ((uint8_t)0xC0) +#define DT_RANGE_4 ((uint8_t)0xE0) + + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup TIM_LL_Private_Macros TIM Private Macros + * @{ + */ +/** @brief Convert channel id into channel index. + * @param __CHANNEL__ This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH1N + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH2N + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH3N + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval none + */ +#define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \ + (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\ + ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\ + ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\ + ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\ + ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\ + ((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U : 6U) + +/** @brief Calculate the deadtime sampling period(in ps). + * @param __TIMCLK__ timer input clock frequency (in Hz). + * @param __CKD__ This parameter can be one of the following values: + * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 + * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 + * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 + * @retval none + */ +#define TIM_CALC_DTS(__TIMCLK__, __CKD__) \ + (((__CKD__) == LL_TIM_CLOCKDIVISION_DIV1) ? ((uint64_t)1000000000000U/(__TIMCLK__)) : \ + ((__CKD__) == LL_TIM_CLOCKDIVISION_DIV2) ? ((uint64_t)1000000000000U/((__TIMCLK__) >> 1U)) : \ + ((uint64_t)1000000000000U/((__TIMCLK__) >> 2U))) +/** + * @} + */ + + +/* Exported types ------------------------------------------------------------*/ +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup TIM_LL_ES_INIT TIM Exported Init structure + * @{ + */ + +/** + * @brief TIM Time Base configuration structure definition. + */ +typedef struct +{ + uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. + This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetPrescaler().*/ + + uint32_t CounterMode; /*!< Specifies the counter mode. + This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetCounterMode().*/ + + uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active + Auto-Reload Register at the next update event. + This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF. + Some timer instances may support 32 bits counters. In that case this parameter must + be a number between 0x0000 and 0xFFFFFFFF. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetAutoReload().*/ + + uint32_t ClockDivision; /*!< Specifies the clock division. + This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetClockDivision().*/ + + uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter + reaches zero, an update event is generated and counting restarts + from the RCR value (N). + This means in PWM mode that (N+1) corresponds to: + - the number of PWM periods in edge-aligned mode + - the number of half PWM period in center-aligned mode + GP timers: this parameter must be a number between Min_Data = 0x00 and + Max_Data = 0xFF. + Advanced timers: this parameter must be a number between Min_Data = 0x0000 and + Max_Data = 0xFFFF. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetRepetitionCounter().*/ +} LL_TIM_InitTypeDef; + +/** + * @brief TIM Output Compare configuration structure definition. + */ +typedef struct +{ + uint32_t OCMode; /*!< Specifies the output mode. + This parameter can be a value of @ref TIM_LL_EC_OCMODE. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetMode().*/ + + uint32_t OCState; /*!< Specifies the TIM Output Compare state. + This parameter can be a value of @ref TIM_LL_EC_OCSTATE. + + This feature can be modified afterwards using unitary functions + @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ + + uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. + This parameter can be a value of @ref TIM_LL_EC_OCSTATE. + + This feature can be modified afterwards using unitary functions + @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ + + uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register. + This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. + + This feature can be modified afterwards using unitary function + LL_TIM_OC_SetCompareCHx (x=1..6).*/ + + uint32_t OCPolarity; /*!< Specifies the output polarity. + This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetPolarity().*/ + + uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. + This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetPolarity().*/ + + + uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. + This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetIdleState().*/ + + uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. + This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetIdleState().*/ +} LL_TIM_OC_InitTypeDef; + +/** + * @brief TIM Input Capture configuration structure definition. + */ + +typedef struct +{ + + uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. + This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ + + uint32_t ICActiveInput; /*!< Specifies the input. + This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetActiveInput().*/ + + uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. + This parameter can be a value of @ref TIM_LL_EC_ICPSC. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ + + uint32_t ICFilter; /*!< Specifies the input capture filter. + This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ +} LL_TIM_IC_InitTypeDef; + + +/** + * @brief TIM Encoder interface configuration structure definition. + */ +typedef struct +{ + uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). + This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetEncoderMode().*/ + + uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. + This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ + + uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source + This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetActiveInput().*/ + + uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. + This parameter can be a value of @ref TIM_LL_EC_ICPSC. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ + + uint32_t IC1Filter; /*!< Specifies the TI1 input filter. + This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ + + uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input. + This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ + + uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source + This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetActiveInput().*/ + + uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value. + This parameter can be a value of @ref TIM_LL_EC_ICPSC. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ + + uint32_t IC2Filter; /*!< Specifies the TI2 input filter. + This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ + +} LL_TIM_ENCODER_InitTypeDef; + +/** + * @brief TIM Hall sensor interface configuration structure definition. + */ +typedef struct +{ + + uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. + This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ + + uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. + Prescaler must be set to get a maximum counter period longer than the + time interval between 2 consecutive changes on the Hall inputs. + This parameter can be a value of @ref TIM_LL_EC_ICPSC. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ + + uint32_t IC1Filter; /*!< Specifies the TI1 input filter. + This parameter can be a value of + @ref TIM_LL_EC_IC_FILTER. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ + + uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compare Register. + A positive pulse (TRGO event) is generated with a programmable delay every time + a change occurs on the Hall inputs. + This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetCompareCH2().*/ +} LL_TIM_HALLSENSOR_InitTypeDef; + +/** + * @brief BDTR (Break and Dead Time) structure definition + */ +typedef struct +{ + uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode. + This parameter can be a value of @ref TIM_LL_EC_OSSR + + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetOffStates() + + @note This bit-field cannot be modified as long as LOCK level 2 has been + programmed. */ + + uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state. + This parameter can be a value of @ref TIM_LL_EC_OSSI + + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetOffStates() + + @note This bit-field cannot be modified as long as LOCK level 2 has been + programmed. */ + + uint32_t LockLevel; /*!< Specifies the LOCK level parameters. + This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL + + @note The LOCK bits can be written only once after the reset. Once the TIMx_BDTR + register has been written, their content is frozen until the next reset.*/ + + uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the + switching-on of the outputs. + This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF. + + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetDeadTime() + + @note This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been + programmed. */ + + uint16_t BreakState; /*!< Specifies whether the TIM Break input is enabled or not. + This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE + + This feature can be modified afterwards using unitary functions + @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK() + + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ + + uint32_t BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. + This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARITY + + This feature can be modified afterwards using unitary function + @ref LL_TIM_ConfigBRK() + + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ + + uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. + This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTPUT_ENABLE + + This feature can be modified afterwards using unitary functions + @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAutomaticOutput() + + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ +} LL_TIM_BDTR_InitTypeDef; + +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup TIM_LL_Exported_Constants TIM Exported Constants + * @{ + */ + +/** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_TIM_ReadReg function. + * @{ + */ +#define LL_TIM_SR_UIF TIM_SR_UIF /*!< Update interrupt flag */ +#define LL_TIM_SR_CC1IF TIM_SR_CC1IF /*!< Capture/compare 1 interrupt flag */ +#define LL_TIM_SR_CC2IF TIM_SR_CC2IF /*!< Capture/compare 2 interrupt flag */ +#define LL_TIM_SR_CC3IF TIM_SR_CC3IF /*!< Capture/compare 3 interrupt flag */ +#define LL_TIM_SR_CC4IF TIM_SR_CC4IF /*!< Capture/compare 4 interrupt flag */ +#define LL_TIM_SR_COMIF TIM_SR_COMIF /*!< COM interrupt flag */ +#define LL_TIM_SR_TIF TIM_SR_TIF /*!< Trigger interrupt flag */ +#define LL_TIM_SR_BIF TIM_SR_BIF /*!< Break interrupt flag */ +#define LL_TIM_SR_CC1OF TIM_SR_CC1OF /*!< Capture/Compare 1 overcapture flag */ +#define LL_TIM_SR_CC2OF TIM_SR_CC2OF /*!< Capture/Compare 2 overcapture flag */ +#define LL_TIM_SR_CC3OF TIM_SR_CC3OF /*!< Capture/Compare 3 overcapture flag */ +#define LL_TIM_SR_CC4OF TIM_SR_CC4OF /*!< Capture/Compare 4 overcapture flag */ +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable + * @{ + */ +#define LL_TIM_BREAK_DISABLE 0x00000000U /*!< Break function disabled */ +#define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break function enabled */ +/** + * @} + */ + +/** @defgroup TIM_LL_EC_AUTOMATICOUTPUT_ENABLE Automatic output enable + * @{ + */ +#define LL_TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U /*!< MOE can be set only by software */ +#define LL_TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE /*!< MOE can be set by software or automatically at the next update event */ +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** @defgroup TIM_LL_EC_IT IT Defines + * @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions. + * @{ + */ +#define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ +#define LL_TIM_DIER_CC1IE TIM_DIER_CC1IE /*!< Capture/compare 1 interrupt enable */ +#define LL_TIM_DIER_CC2IE TIM_DIER_CC2IE /*!< Capture/compare 2 interrupt enable */ +#define LL_TIM_DIER_CC3IE TIM_DIER_CC3IE /*!< Capture/compare 3 interrupt enable */ +#define LL_TIM_DIER_CC4IE TIM_DIER_CC4IE /*!< Capture/compare 4 interrupt enable */ +#define LL_TIM_DIER_COMIE TIM_DIER_COMIE /*!< COM interrupt enable */ +#define LL_TIM_DIER_TIE TIM_DIER_TIE /*!< Trigger interrupt enable */ +#define LL_TIM_DIER_BIE TIM_DIER_BIE /*!< Break interrupt enable */ +/** + * @} + */ + +/** @defgroup TIM_LL_EC_UPDATESOURCE Update Source + * @{ + */ +#define LL_TIM_UPDATESOURCE_REGULAR 0x00000000U /*!< Counter overflow/underflow, Setting the UG bit or Update generation through the slave mode controller generates an update request */ +#define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /*!< Only counter overflow/underflow generates an update request */ +/** + * @} + */ + +/** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode + * @{ + */ +#define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at the next update event */ +#define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at update event */ +/** + * @} + */ + +/** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode + * @{ + */ +#define LL_TIM_COUNTERMODE_UP 0x00000000U /*!TIMx_CCRy else active.*/ +#define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) /*!TIMx_CCRy else inactive*/ +/** + * @} + */ + +/** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity + * @{ + */ +#define LL_TIM_OCPOLARITY_HIGH 0x00000000U /*!< OCxactive high*/ +#define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/ +/** + * @} + */ + +/** @defgroup TIM_LL_EC_OCIDLESTATE Output Configuration Idle State + * @{ + */ +#define LL_TIM_OCIDLESTATE_LOW 0x00000000U /*!__REG__, (__VALUE__)) + +/** + * @brief Read a value in TIM register. + * @param __INSTANCE__ TIM Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__) +/** + * @} + */ + +/** + * @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested dead time duration. + * @note ex: @ref __LL_TIM_CALC_DEADTIME (80000000, @ref LL_TIM_GetClockDivision (), 120); + * @param __TIMCLK__ timer input clock frequency (in Hz) + * @param __CKD__ This parameter can be one of the following values: + * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 + * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 + * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 + * @param __DT__ deadtime duration (in ns) + * @retval DTG[0:7] + */ +#define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \ + ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ + (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : \ + (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ + (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \ + (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) :\ + (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ + (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \ + (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) :\ + (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ + (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \ + (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4)) :\ + 0U) + +/** + * @brief HELPER macro calculating the prescaler value to achieve the required counter clock frequency. + * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000); + * @param __TIMCLK__ timer input clock frequency (in Hz) + * @param __CNTCLK__ counter clock frequency (in Hz) + * @retval Prescaler value (between Min_Data=0 and Max_Data=65535) + */ +#define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \ + (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((((__TIMCLK__) + (__CNTCLK__)/2U)/(__CNTCLK__)) - 1U) : 0U) + +/** + * @brief HELPER macro calculating the auto-reload value to achieve the required output signal frequency. + * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000); + * @param __TIMCLK__ timer input clock frequency (in Hz) + * @param __PSC__ prescaler + * @param __FREQ__ output signal frequency (in Hz) + * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) + */ +#define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \ + ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U) + +/** + * @brief HELPER macro calculating the compare value required to achieve the required timer output compare + * active/inactive delay. + * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); + * @param __TIMCLK__ timer input clock frequency (in Hz) + * @param __PSC__ prescaler + * @param __DELAY__ timer output compare active/inactive delay (in us) + * @retval Compare value (between Min_Data=0 and Max_Data=65535) + */ +#define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \ + ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ + / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) + +/** + * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration + * (when the timer operates in one pulse mode). + * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20); + * @param __TIMCLK__ timer input clock frequency (in Hz) + * @param __PSC__ prescaler + * @param __DELAY__ timer output compare active/inactive delay (in us) + * @param __PULSE__ pulse duration (in us) + * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) + */ +#define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ + ((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \ + + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__)))) + +/** + * @brief HELPER macro retrieving the ratio of the input capture prescaler + * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ()); + * @param __ICPSC__ This parameter can be one of the following values: + * @arg @ref LL_TIM_ICPSC_DIV1 + * @arg @ref LL_TIM_ICPSC_DIV2 + * @arg @ref LL_TIM_ICPSC_DIV4 + * @arg @ref LL_TIM_ICPSC_DIV8 + * @retval Input capture prescaler ratio (1, 2, 4 or 8) + */ +#define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \ + ((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos))) + + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup TIM_LL_Exported_Functions TIM Exported Functions + * @{ + */ + +/** @defgroup TIM_LL_EF_Time_Base Time Base configuration + * @{ + */ +/** + * @brief Enable timer counter. + * @rmtoll CR1 CEN LL_TIM_EnableCounter + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->CR1, TIM_CR1_CEN); +} + +/** + * @brief Disable timer counter. + * @rmtoll CR1 CEN LL_TIM_DisableCounter + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); +} + +/** + * @brief Indicates whether the timer counter is enabled. + * @rmtoll CR1 CEN LL_TIM_IsEnabledCounter + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); +} + +/** + * @brief Enable update event generation. + * @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); +} + +/** + * @brief Disable update event generation. + * @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->CR1, TIM_CR1_UDIS); +} + +/** + * @brief Indicates whether update event generation is enabled. + * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent + * @param TIMx Timer instance + * @retval Inverted state of bit (0 or 1). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL); +} + +/** + * @brief Set update event source + * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events + * generate an update interrupt or DMA request if enabled: + * - Counter overflow/underflow + * - Setting the UG bit + * - Update generation through the slave mode controller + * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter + * overflow/underflow generates an update interrupt or DMA request if enabled. + * @rmtoll CR1 URS LL_TIM_SetUpdateSource + * @param TIMx Timer instance + * @param UpdateSource This parameter can be one of the following values: + * @arg @ref LL_TIM_UPDATESOURCE_REGULAR + * @arg @ref LL_TIM_UPDATESOURCE_COUNTER + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource) +{ + MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource); +} + +/** + * @brief Get actual event update source + * @rmtoll CR1 URS LL_TIM_GetUpdateSource + * @param TIMx Timer instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_UPDATESOURCE_REGULAR + * @arg @ref LL_TIM_UPDATESOURCE_COUNTER + */ +__STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS)); +} + +/** + * @brief Set one pulse mode (one shot v.s. repetitive). + * @rmtoll CR1 OPM LL_TIM_SetOnePulseMode + * @param TIMx Timer instance + * @param OnePulseMode This parameter can be one of the following values: + * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE + * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode) +{ + MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); +} + +/** + * @brief Get actual one pulse mode. + * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode + * @param TIMx Timer instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE + * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE + */ +__STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM)); +} + +/** + * @brief Set the timer counter counting mode. + * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to + * check whether or not the counter mode selection feature is supported + * by a timer instance. + * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) + * requires a timer reset to avoid unexpected direction + * due to DIR bit readonly in center aligned mode. + * @rmtoll CR1 DIR LL_TIM_SetCounterMode\n + * CR1 CMS LL_TIM_SetCounterMode + * @param TIMx Timer instance + * @param CounterMode This parameter can be one of the following values: + * @arg @ref LL_TIM_COUNTERMODE_UP + * @arg @ref LL_TIM_COUNTERMODE_DOWN + * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP + * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN + * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode) +{ + MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode); +} + +/** + * @brief Get actual counter mode. + * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to + * check whether or not the counter mode selection feature is supported + * by a timer instance. + * @rmtoll CR1 DIR LL_TIM_GetCounterMode\n + * CR1 CMS LL_TIM_GetCounterMode + * @param TIMx Timer instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_COUNTERMODE_UP + * @arg @ref LL_TIM_COUNTERMODE_DOWN + * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP + * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN + * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN + */ +__STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx) +{ + uint32_t counter_mode; + + counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS)); + + if (counter_mode == 0U) + { + counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); + } + + return counter_mode; +} + +/** + * @brief Enable auto-reload (ARR) preload. + * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->CR1, TIM_CR1_ARPE); +} + +/** + * @brief Disable auto-reload (ARR) preload. + * @rmtoll CR1 ARPE LL_TIM_DisableARRPreload + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); +} + +/** + * @brief Indicates whether auto-reload (ARR) preload is enabled. + * @rmtoll CR1 ARPE LL_TIM_IsEnabledARRPreload + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL); +} + +/** + * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators + * (when supported) and the digital filters. + * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check + * whether or not the clock division feature is supported by the timer + * instance. + * @rmtoll CR1 CKD LL_TIM_SetClockDivision + * @param TIMx Timer instance + * @param ClockDivision This parameter can be one of the following values: + * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 + * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 + * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision) +{ + MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); +} + +/** + * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time + * generators (when supported) and the digital filters. + * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check + * whether or not the clock division feature is supported by the timer + * instance. + * @rmtoll CR1 CKD LL_TIM_GetClockDivision + * @param TIMx Timer instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 + * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 + * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 + */ +__STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD)); +} + +/** + * @brief Set the counter value. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @rmtoll CNT CNT LL_TIM_SetCounter + * @param TIMx Timer instance + * @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF) + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter) +{ + WRITE_REG(TIMx->CNT, Counter); +} + +/** + * @brief Get the counter value. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @rmtoll CNT CNT LL_TIM_GetCounter + * @param TIMx Timer instance + * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF) + */ +__STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->CNT)); +} + +/** + * @brief Get the current direction of the counter + * @rmtoll CR1 DIR LL_TIM_GetDirection + * @param TIMx Timer instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_COUNTERDIRECTION_UP + * @arg @ref LL_TIM_COUNTERDIRECTION_DOWN + */ +__STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); +} + +/** + * @brief Set the prescaler value. + * @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1). + * @note The prescaler can be changed on the fly as this control register is buffered. The new + * prescaler ratio is taken into account at the next update event. + * @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter + * @rmtoll PSC PSC LL_TIM_SetPrescaler + * @param TIMx Timer instance + * @param Prescaler between Min_Data=0 and Max_Data=65535 + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler) +{ + WRITE_REG(TIMx->PSC, Prescaler); +} + +/** + * @brief Get the prescaler value. + * @rmtoll PSC PSC LL_TIM_GetPrescaler + * @param TIMx Timer instance + * @retval Prescaler value between Min_Data=0 and Max_Data=65535 + */ +__STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->PSC)); +} + +/** + * @brief Set the auto-reload value. + * @note The counter is blocked while the auto-reload value is null. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter + * @rmtoll ARR ARR LL_TIM_SetAutoReload + * @param TIMx Timer instance + * @param AutoReload between Min_Data=0 and Max_Data=65535 + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload) +{ + WRITE_REG(TIMx->ARR, AutoReload); +} + +/** + * @brief Get the auto-reload value. + * @rmtoll ARR ARR LL_TIM_GetAutoReload + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @param TIMx Timer instance + * @retval Auto-reload value + */ +__STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->ARR)); +} + +/** + * @brief Set the repetition counter value. + * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a repetition counter. + * @rmtoll RCR REP LL_TIM_SetRepetitionCounter + * @param TIMx Timer instance + * @param RepetitionCounter between Min_Data=0 and Max_Data=255 or 65535 for advanced timer. + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter) +{ + WRITE_REG(TIMx->RCR, RepetitionCounter); +} + +/** + * @brief Get the repetition counter value. + * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a repetition counter. + * @rmtoll RCR REP LL_TIM_GetRepetitionCounter + * @param TIMx Timer instance + * @retval Repetition counter value + */ +__STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->RCR)); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration + * @{ + */ +/** + * @brief Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload. + * @note CCxE, CCxNE and OCxM bits are preloaded, after having been written, + * they are updated only when a commutation event (COM) occurs. + * @note Only on channels that have a complementary output. + * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check + * whether or not a timer instance is able to generate a commutation event. + * @rmtoll CR2 CCPC LL_TIM_CC_EnablePreload + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->CR2, TIM_CR2_CCPC); +} + +/** + * @brief Disable the capture/compare control bits (CCxE, CCxNE and OCxM) preload. + * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check + * whether or not a timer instance is able to generate a commutation event. + * @rmtoll CR2 CCPC LL_TIM_CC_DisablePreload + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC); +} + +/** + * @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM). + * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check + * whether or not a timer instance is able to generate a commutation event. + * @rmtoll CR2 CCUS LL_TIM_CC_SetUpdate + * @param TIMx Timer instance + * @param CCUpdateSource This parameter can be one of the following values: + * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_ONLY + * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI + * @retval None + */ +__STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource) +{ + MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource); +} + +/** + * @brief Set the trigger of the capture/compare DMA request. + * @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger + * @param TIMx Timer instance + * @param DMAReqTrigger This parameter can be one of the following values: + * @arg @ref LL_TIM_CCDMAREQUEST_CC + * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE + * @retval None + */ +__STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger) +{ + MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger); +} + +/** + * @brief Get actual trigger of the capture/compare DMA request. + * @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger + * @param TIMx Timer instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_CCDMAREQUEST_CC + * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE + */ +__STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS)); +} + +/** + * @brief Set the lock level to freeze the + * configuration of several capture/compare parameters. + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * the lock mechanism is supported by a timer instance. + * @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel + * @param TIMx Timer instance + * @param LockLevel This parameter can be one of the following values: + * @arg @ref LL_TIM_LOCKLEVEL_OFF + * @arg @ref LL_TIM_LOCKLEVEL_1 + * @arg @ref LL_TIM_LOCKLEVEL_2 + * @arg @ref LL_TIM_LOCKLEVEL_3 + * @retval None + */ +__STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel) +{ + MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); +} + +/** + * @brief Enable capture/compare channels. + * @rmtoll CCER CC1E LL_TIM_CC_EnableChannel\n + * CCER CC1NE LL_TIM_CC_EnableChannel\n + * CCER CC2E LL_TIM_CC_EnableChannel\n + * CCER CC2NE LL_TIM_CC_EnableChannel\n + * CCER CC3E LL_TIM_CC_EnableChannel\n + * CCER CC3NE LL_TIM_CC_EnableChannel\n + * CCER CC4E LL_TIM_CC_EnableChannel + * @param TIMx Timer instance + * @param Channels This parameter can be a combination of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH1N + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH2N + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH3N + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval None + */ +__STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels) +{ + SET_BIT(TIMx->CCER, Channels); +} + +/** + * @brief Disable capture/compare channels. + * @rmtoll CCER CC1E LL_TIM_CC_DisableChannel\n + * CCER CC1NE LL_TIM_CC_DisableChannel\n + * CCER CC2E LL_TIM_CC_DisableChannel\n + * CCER CC2NE LL_TIM_CC_DisableChannel\n + * CCER CC3E LL_TIM_CC_DisableChannel\n + * CCER CC3NE LL_TIM_CC_DisableChannel\n + * CCER CC4E LL_TIM_CC_DisableChannel + * @param TIMx Timer instance + * @param Channels This parameter can be a combination of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH1N + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH2N + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH3N + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval None + */ +__STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels) +{ + CLEAR_BIT(TIMx->CCER, Channels); +} + +/** + * @brief Indicate whether channel(s) is(are) enabled. + * @rmtoll CCER CC1E LL_TIM_CC_IsEnabledChannel\n + * CCER CC1NE LL_TIM_CC_IsEnabledChannel\n + * CCER CC2E LL_TIM_CC_IsEnabledChannel\n + * CCER CC2NE LL_TIM_CC_IsEnabledChannel\n + * CCER CC3E LL_TIM_CC_IsEnabledChannel\n + * CCER CC3NE LL_TIM_CC_IsEnabledChannel\n + * CCER CC4E LL_TIM_CC_IsEnabledChannel + * @param TIMx Timer instance + * @param Channels This parameter can be a combination of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH1N + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH2N + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH3N + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels) +{ + return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_Output_Channel Output channel configuration + * @{ + */ +/** + * @brief Configure an output channel. + * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n + * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n + * CCMR2 CC3S LL_TIM_OC_ConfigOutput\n + * CCMR2 CC4S LL_TIM_OC_ConfigOutput\n + * CCER CC1P LL_TIM_OC_ConfigOutput\n + * CCER CC2P LL_TIM_OC_ConfigOutput\n + * CCER CC3P LL_TIM_OC_ConfigOutput\n + * CCER CC4P LL_TIM_OC_ConfigOutput\n + * CR2 OIS1 LL_TIM_OC_ConfigOutput\n + * CR2 OIS2 LL_TIM_OC_ConfigOutput\n + * CR2 OIS3 LL_TIM_OC_ConfigOutput\n + * CR2 OIS4 LL_TIM_OC_ConfigOutput + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @param Configuration This parameter must be a combination of all the following values: + * @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW + * @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); + MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), + (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); + MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), + (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); +} + +/** + * @brief Define the behavior of the output reference signal OCxREF from which + * OCx and OCxN (when relevant) are derived. + * @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n + * CCMR1 OC2M LL_TIM_OC_SetMode\n + * CCMR2 OC3M LL_TIM_OC_SetMode\n + * CCMR2 OC4M LL_TIM_OC_SetMode + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @param Mode This parameter can be one of the following values: + * @arg @ref LL_TIM_OCMODE_FROZEN + * @arg @ref LL_TIM_OCMODE_ACTIVE + * @arg @ref LL_TIM_OCMODE_INACTIVE + * @arg @ref LL_TIM_OCMODE_TOGGLE + * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE + * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE + * @arg @ref LL_TIM_OCMODE_PWM1 + * @arg @ref LL_TIM_OCMODE_PWM2 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]); +} + +/** + * @brief Get the output compare mode of an output channel. + * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n + * CCMR1 OC2M LL_TIM_OC_GetMode\n + * CCMR2 OC3M LL_TIM_OC_GetMode\n + * CCMR2 OC4M LL_TIM_OC_GetMode + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_OCMODE_FROZEN + * @arg @ref LL_TIM_OCMODE_ACTIVE + * @arg @ref LL_TIM_OCMODE_INACTIVE + * @arg @ref LL_TIM_OCMODE_TOGGLE + * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE + * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE + * @arg @ref LL_TIM_OCMODE_PWM1 + * @arg @ref LL_TIM_OCMODE_PWM2 + */ +__STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]); +} + +/** + * @brief Set the polarity of an output channel. + * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n + * CCER CC1NP LL_TIM_OC_SetPolarity\n + * CCER CC2P LL_TIM_OC_SetPolarity\n + * CCER CC2NP LL_TIM_OC_SetPolarity\n + * CCER CC3P LL_TIM_OC_SetPolarity\n + * CCER CC3NP LL_TIM_OC_SetPolarity\n + * CCER CC4P LL_TIM_OC_SetPolarity + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH1N + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH2N + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH3N + * @arg @ref LL_TIM_CHANNEL_CH4 + * @param Polarity This parameter can be one of the following values: + * @arg @ref LL_TIM_OCPOLARITY_HIGH + * @arg @ref LL_TIM_OCPOLARITY_LOW + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[iChannel]); +} + +/** + * @brief Get the polarity of an output channel. + * @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n + * CCER CC1NP LL_TIM_OC_GetPolarity\n + * CCER CC2P LL_TIM_OC_GetPolarity\n + * CCER CC2NP LL_TIM_OC_GetPolarity\n + * CCER CC3P LL_TIM_OC_GetPolarity\n + * CCER CC3NP LL_TIM_OC_GetPolarity\n + * CCER CC4P LL_TIM_OC_GetPolarity + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH1N + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH2N + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH3N + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_OCPOLARITY_HIGH + * @arg @ref LL_TIM_OCPOLARITY_LOW + */ +__STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChannel]); +} + +/** + * @brief Set the IDLE state of an output channel + * @note This function is significant only for the timer instances + * supporting the break feature. Macro IS_TIM_BREAK_INSTANCE(TIMx) + * can be used to check whether or not a timer instance provides + * a break input. + * @rmtoll CR2 OIS1 LL_TIM_OC_SetIdleState\n + * CR2 OIS1N LL_TIM_OC_SetIdleState\n + * CR2 OIS2 LL_TIM_OC_SetIdleState\n + * CR2 OIS2N LL_TIM_OC_SetIdleState\n + * CR2 OIS3 LL_TIM_OC_SetIdleState\n + * CR2 OIS3N LL_TIM_OC_SetIdleState\n + * CR2 OIS4 LL_TIM_OC_SetIdleState + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH1N + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH2N + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH3N + * @arg @ref LL_TIM_CHANNEL_CH4 + * @param IdleState This parameter can be one of the following values: + * @arg @ref LL_TIM_OCIDLESTATE_LOW + * @arg @ref LL_TIM_OCIDLESTATE_HIGH + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iChannel]); +} + +/** + * @brief Get the IDLE state of an output channel + * @rmtoll CR2 OIS1 LL_TIM_OC_GetIdleState\n + * CR2 OIS1N LL_TIM_OC_GetIdleState\n + * CR2 OIS2 LL_TIM_OC_GetIdleState\n + * CR2 OIS2N LL_TIM_OC_GetIdleState\n + * CR2 OIS3 LL_TIM_OC_GetIdleState\n + * CR2 OIS3N LL_TIM_OC_GetIdleState\n + * CR2 OIS4 LL_TIM_OC_GetIdleState + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH1N + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH2N + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH3N + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_OCIDLESTATE_LOW + * @arg @ref LL_TIM_OCIDLESTATE_HIGH + */ +__STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChannel]); +} + +/** + * @brief Enable fast mode for the output channel. + * @note Acts only if the channel is configured in PWM1 or PWM2 mode. + * @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n + * CCMR1 OC2FE LL_TIM_OC_EnableFast\n + * CCMR2 OC3FE LL_TIM_OC_EnableFast\n + * CCMR2 OC4FE LL_TIM_OC_EnableFast + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); + +} + +/** + * @brief Disable fast mode for the output channel. + * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n + * CCMR1 OC2FE LL_TIM_OC_DisableFast\n + * CCMR2 OC3FE LL_TIM_OC_DisableFast\n + * CCMR2 OC4FE LL_TIM_OC_DisableFast + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); + +} + +/** + * @brief Indicates whether fast mode is enabled for the output channel. + * @rmtoll CCMR1 OC1FE LL_TIM_OC_IsEnabledFast\n + * CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n + * CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n + * CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]; + return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); +} + +/** + * @brief Enable compare register (TIMx_CCRx) preload for the output channel. + * @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n + * CCMR1 OC2PE LL_TIM_OC_EnablePreload\n + * CCMR2 OC3PE LL_TIM_OC_EnablePreload\n + * CCMR2 OC4PE LL_TIM_OC_EnablePreload + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); +} + +/** + * @brief Disable compare register (TIMx_CCRx) preload for the output channel. + * @rmtoll CCMR1 OC1PE LL_TIM_OC_DisablePreload\n + * CCMR1 OC2PE LL_TIM_OC_DisablePreload\n + * CCMR2 OC3PE LL_TIM_OC_DisablePreload\n + * CCMR2 OC4PE LL_TIM_OC_DisablePreload + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); +} + +/** + * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channel. + * @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n + * CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n + * CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload\n + * CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload\n + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; + return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); +} + +/** + * @brief Enable clearing the output channel on an external event. + * @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode. + * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether + * or not a timer instance can clear the OCxREF signal on an external event. + * @rmtoll CCMR1 OC1CE LL_TIM_OC_EnableClear\n + * CCMR1 OC2CE LL_TIM_OC_EnableClear\n + * CCMR2 OC3CE LL_TIM_OC_EnableClear\n + * CCMR2 OC4CE LL_TIM_OC_EnableClear + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); +} + +/** + * @brief Disable clearing the output channel on an external event. + * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether + * or not a timer instance can clear the OCxREF signal on an external event. + * @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n + * CCMR1 OC2CE LL_TIM_OC_DisableClear\n + * CCMR2 OC3CE LL_TIM_OC_DisableClear\n + * CCMR2 OC4CE LL_TIM_OC_DisableClear + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); +} + +/** + * @brief Indicates clearing the output channel on an external event is enabled for the output channel. + * @note This function enables clearing the output channel on an external event. + * @note This function can only be used in Output compare and PWM modes. It does not work in Forced mode. + * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether + * or not a timer instance can clear the OCxREF signal on an external event. + * @rmtoll CCMR1 OC1CE LL_TIM_OC_IsEnabledClear\n + * CCMR1 OC2CE LL_TIM_OC_IsEnabledClear\n + * CCMR2 OC3CE LL_TIM_OC_IsEnabledClear\n + * CCMR2 OC4CE LL_TIM_OC_IsEnabledClear\n + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]; + return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); +} + +/** + * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of + * the Ocx and OCxN signals). + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * dead-time insertion feature is supported by a timer instance. + * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter + * @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime + * @param TIMx Timer instance + * @param DeadTime between Min_Data=0 and Max_Data=255 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) +{ + MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); +} + +/** + * @brief Set compare value for output channel 1 (TIMx_CCR1). + * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not + * output channel 1 is supported by a timer instance. + * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1 + * @param TIMx Timer instance + * @param CompareValue between Min_Data=0 and Max_Data=65535 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) +{ + WRITE_REG(TIMx->CCR1, CompareValue); +} + +/** + * @brief Set compare value for output channel 2 (TIMx_CCR2). + * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not + * output channel 2 is supported by a timer instance. + * @rmtoll CCR2 CCR2 LL_TIM_OC_SetCompareCH2 + * @param TIMx Timer instance + * @param CompareValue between Min_Data=0 and Max_Data=65535 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue) +{ + WRITE_REG(TIMx->CCR2, CompareValue); +} + +/** + * @brief Set compare value for output channel 3 (TIMx_CCR3). + * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not + * output channel is supported by a timer instance. + * @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3 + * @param TIMx Timer instance + * @param CompareValue between Min_Data=0 and Max_Data=65535 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue) +{ + WRITE_REG(TIMx->CCR3, CompareValue); +} + +/** + * @brief Set compare value for output channel 4 (TIMx_CCR4). + * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not + * output channel 4 is supported by a timer instance. + * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4 + * @param TIMx Timer instance + * @param CompareValue between Min_Data=0 and Max_Data=65535 + * @retval None + */ +__STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue) +{ + WRITE_REG(TIMx->CCR4, CompareValue); +} + +/** + * @brief Get compare value (TIMx_CCR1) set for output channel 1. + * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not + * output channel 1 is supported by a timer instance. + * @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1 + * @param TIMx Timer instance + * @retval CompareValue (between Min_Data=0 and Max_Data=65535) + */ +__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->CCR1)); +} + +/** + * @brief Get compare value (TIMx_CCR2) set for output channel 2. + * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not + * output channel 2 is supported by a timer instance. + * @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2 + * @param TIMx Timer instance + * @retval CompareValue (between Min_Data=0 and Max_Data=65535) + */ +__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->CCR2)); +} + +/** + * @brief Get compare value (TIMx_CCR3) set for output channel 3. + * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not + * output channel 3 is supported by a timer instance. + * @rmtoll CCR3 CCR3 LL_TIM_OC_GetCompareCH3 + * @param TIMx Timer instance + * @retval CompareValue (between Min_Data=0 and Max_Data=65535) + */ +__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->CCR3)); +} + +/** + * @brief Get compare value (TIMx_CCR4) set for output channel 4. + * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not + * output channel 4 is supported by a timer instance. + * @rmtoll CCR4 CCR4 LL_TIM_OC_GetCompareCH4 + * @param TIMx Timer instance + * @retval CompareValue (between Min_Data=0 and Max_Data=65535) + */ +__STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->CCR4)); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_Input_Channel Input channel configuration + * @{ + */ +/** + * @brief Configure input channel. + * @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n + * CCMR1 IC1PSC LL_TIM_IC_Config\n + * CCMR1 IC1F LL_TIM_IC_Config\n + * CCMR1 CC2S LL_TIM_IC_Config\n + * CCMR1 IC2PSC LL_TIM_IC_Config\n + * CCMR1 IC2F LL_TIM_IC_Config\n + * CCMR2 CC3S LL_TIM_IC_Config\n + * CCMR2 IC3PSC LL_TIM_IC_Config\n + * CCMR2 IC3F LL_TIM_IC_Config\n + * CCMR2 CC4S LL_TIM_IC_Config\n + * CCMR2 IC4PSC LL_TIM_IC_Config\n + * CCMR2 IC4F LL_TIM_IC_Config\n + * CCER CC1P LL_TIM_IC_Config\n + * CCER CC1NP LL_TIM_IC_Config\n + * CCER CC2P LL_TIM_IC_Config\n + * CCER CC2NP LL_TIM_IC_Config\n + * CCER CC3P LL_TIM_IC_Config\n + * CCER CC3NP LL_TIM_IC_Config\n + * CCER CC4P LL_TIM_IC_Config\n + * CCER CC4NP LL_TIM_IC_Config + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @param Configuration This parameter must be a combination of all the following values: + * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_TIM_ACTIVEINPUT_TRC + * @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8 + * @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8 + * @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_IC_POLARITY_BOTHEDGE + * @retval None + */ +__STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), + ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) \ + << SHIFT_TAB_ICxx[iChannel]); + MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), + (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); +} + +/** + * @brief Set the active input. + * @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n + * CCMR1 CC2S LL_TIM_IC_SetActiveInput\n + * CCMR2 CC3S LL_TIM_IC_SetActiveInput\n + * CCMR2 CC4S LL_TIM_IC_SetActiveInput + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @param ICActiveInput This parameter can be one of the following values: + * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI + * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI + * @arg @ref LL_TIM_ACTIVEINPUT_TRC + * @retval None + */ +__STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiveInput) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT_TAB_ICxx[iChannel]); +} + +/** + * @brief Get the current active input. + * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n + * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n + * CCMR2 CC3S LL_TIM_IC_GetActiveInput\n + * CCMR2 CC4S LL_TIM_IC_GetActiveInput + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI + * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI + * @arg @ref LL_TIM_ACTIVEINPUT_TRC + */ +__STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U); +} + +/** + * @brief Set the prescaler of input channel. + * @rmtoll CCMR1 IC1PSC LL_TIM_IC_SetPrescaler\n + * CCMR1 IC2PSC LL_TIM_IC_SetPrescaler\n + * CCMR2 IC3PSC LL_TIM_IC_SetPrescaler\n + * CCMR2 IC4PSC LL_TIM_IC_SetPrescaler + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @param ICPrescaler This parameter can be one of the following values: + * @arg @ref LL_TIM_ICPSC_DIV1 + * @arg @ref LL_TIM_ICPSC_DIV2 + * @arg @ref LL_TIM_ICPSC_DIV4 + * @arg @ref LL_TIM_ICPSC_DIV8 + * @retval None + */ +__STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescaler) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT_TAB_ICxx[iChannel]); +} + +/** + * @brief Get the current prescaler value acting on an input channel. + * @rmtoll CCMR1 IC1PSC LL_TIM_IC_GetPrescaler\n + * CCMR1 IC2PSC LL_TIM_IC_GetPrescaler\n + * CCMR2 IC3PSC LL_TIM_IC_GetPrescaler\n + * CCMR2 IC4PSC LL_TIM_IC_GetPrescaler + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_ICPSC_DIV1 + * @arg @ref LL_TIM_ICPSC_DIV2 + * @arg @ref LL_TIM_ICPSC_DIV4 + * @arg @ref LL_TIM_ICPSC_DIV8 + */ +__STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U); +} + +/** + * @brief Set the input filter duration. + * @rmtoll CCMR1 IC1F LL_TIM_IC_SetFilter\n + * CCMR1 IC2F LL_TIM_IC_SetFilter\n + * CCMR2 IC3F LL_TIM_IC_SetFilter\n + * CCMR2 IC4F LL_TIM_IC_SetFilter + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @param ICFilter This parameter can be one of the following values: + * @arg @ref LL_TIM_IC_FILTER_FDIV1 + * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 + * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4 + * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5 + * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5 + * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 + * @retval None + */ +__STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ICxx[iChannel]); +} + +/** + * @brief Get the input filter duration. + * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n + * CCMR1 IC2F LL_TIM_IC_GetFilter\n + * CCMR2 IC3F LL_TIM_IC_GetFilter\n + * CCMR2 IC4F LL_TIM_IC_GetFilter + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_IC_FILTER_FDIV1 + * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 + * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4 + * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5 + * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8 + * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5 + * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 + * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 + */ +__STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); + return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChannel]) << 16U); +} + +/** + * @brief Set the input channel polarity. + * @rmtoll CCER CC1P LL_TIM_IC_SetPolarity\n + * CCER CC1NP LL_TIM_IC_SetPolarity\n + * CCER CC2P LL_TIM_IC_SetPolarity\n + * CCER CC2NP LL_TIM_IC_SetPolarity\n + * CCER CC3P LL_TIM_IC_SetPolarity\n + * CCER CC3NP LL_TIM_IC_SetPolarity\n + * CCER CC4P LL_TIM_IC_SetPolarity\n + * CCER CC4NP LL_TIM_IC_SetPolarity + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @param ICPolarity This parameter can be one of the following values: + * @arg @ref LL_TIM_IC_POLARITY_RISING + * @arg @ref LL_TIM_IC_POLARITY_FALLING + * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE + * @retval None + */ +__STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), + ICPolarity << SHIFT_TAB_CCxP[iChannel]); +} + +/** + * @brief Get the current input channel polarity. + * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n + * CCER CC1NP LL_TIM_IC_GetPolarity\n + * CCER CC2P LL_TIM_IC_GetPolarity\n + * CCER CC2NP LL_TIM_IC_GetPolarity\n + * CCER CC3P LL_TIM_IC_GetPolarity\n + * CCER CC3NP LL_TIM_IC_GetPolarity\n + * CCER CC4P LL_TIM_IC_GetPolarity\n + * CCER CC4NP LL_TIM_IC_GetPolarity + * @param TIMx Timer instance + * @param Channel This parameter can be one of the following values: + * @arg @ref LL_TIM_CHANNEL_CH1 + * @arg @ref LL_TIM_CHANNEL_CH2 + * @arg @ref LL_TIM_CHANNEL_CH3 + * @arg @ref LL_TIM_CHANNEL_CH4 + * @retval Returned value can be one of the following values: + * @arg @ref LL_TIM_IC_POLARITY_RISING + * @arg @ref LL_TIM_IC_POLARITY_FALLING + * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE + */ +__STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) +{ + uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> + SHIFT_TAB_CCxP[iChannel]); +} + +/** + * @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination). + * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides an XOR input. + * @rmtoll CR2 TI1S LL_TIM_IC_EnableXORCombination + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->CR2, TIM_CR2_TI1S); +} + +/** + * @brief Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input. + * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides an XOR input. + * @rmtoll CR2 TI1S LL_TIM_IC_DisableXORCombination + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S); +} + +/** + * @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input. + * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides an XOR input. + * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL); +} + +/** + * @brief Get captured value for input channel 1. + * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not + * input channel 1 is supported by a timer instance. + * @rmtoll CCR1 CCR1 LL_TIM_IC_GetCaptureCH1 + * @param TIMx Timer instance + * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) + */ +__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->CCR1)); +} + +/** + * @brief Get captured value for input channel 2. + * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not + * input channel 2 is supported by a timer instance. + * @rmtoll CCR2 CCR2 LL_TIM_IC_GetCaptureCH2 + * @param TIMx Timer instance + * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) + */ +__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->CCR2)); +} + +/** + * @brief Get captured value for input channel 3. + * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not + * input channel 3 is supported by a timer instance. + * @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3 + * @param TIMx Timer instance + * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) + */ +__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->CCR3)); +} + +/** + * @brief Get captured value for input channel 4. + * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xFFFFFFFF. + * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports a 32 bits counter. + * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not + * input channel 4 is supported by a timer instance. + * @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4 + * @param TIMx Timer instance + * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) + */ +__STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx) +{ + return (uint32_t)(READ_REG(TIMx->CCR4)); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection + * @{ + */ +/** + * @brief Enable external clock mode 2. + * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ETRF signal. + * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports external clock mode2. + * @rmtoll SMCR ECE LL_TIM_EnableExternalClock + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); +} + +/** + * @brief Disable external clock mode 2. + * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports external clock mode2. + * @rmtoll SMCR ECE LL_TIM_DisableExternalClock + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); +} + +/** + * @brief Indicate whether external clock mode 2 is enabled. + * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports external clock mode2. + * @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); +} + +/** + * @brief Set the clock source of the counter clock. + * @note when selected clock source is external clock mode 1, the timer input + * the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput() + * function. This timer input must be configured by calling + * the @ref LL_TIM_IC_Config() function. + * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports external clock mode1. + * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports external clock mode2. + * @rmtoll SMCR SMS LL_TIM_SetClockSource\n + * SMCR ECE LL_TIM_SetClockSource + * @param TIMx Timer instance + * @param ClockSource This parameter can be one of the following values: + * @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL + * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1 + * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2 + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) +{ + MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); +} + +/** + * @brief Set the encoder interface mode. + * @note Macro IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check + * whether or not a timer instance supports the encoder mode. + * @rmtoll SMCR SMS LL_TIM_SetEncoderMode + * @param TIMx Timer instance + * @param EncoderMode This parameter can be one of the following values: + * @arg @ref LL_TIM_ENCODERMODE_X2_TI1 + * @arg @ref LL_TIM_ENCODERMODE_X2_TI2 + * @arg @ref LL_TIM_ENCODERMODE_X4_TI12 + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode) +{ + MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration + * @{ + */ +/** + * @brief Set the trigger output (TRGO) used for timer synchronization . + * @note Macro IS_TIM_MASTER_INSTANCE(TIMx) can be used to check + * whether or not a timer instance can operate as a master timer. + * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput + * @param TIMx Timer instance + * @param TimerSynchronization This parameter can be one of the following values: + * @arg @ref LL_TIM_TRGO_RESET + * @arg @ref LL_TIM_TRGO_ENABLE + * @arg @ref LL_TIM_TRGO_UPDATE + * @arg @ref LL_TIM_TRGO_CC1IF + * @arg @ref LL_TIM_TRGO_OC1REF + * @arg @ref LL_TIM_TRGO_OC2REF + * @arg @ref LL_TIM_TRGO_OC3REF + * @arg @ref LL_TIM_TRGO_OC4REF + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) +{ + MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); +} + +/** + * @brief Set the synchronization mode of a slave timer. + * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not + * a timer instance can operate as a slave timer. + * @rmtoll SMCR SMS LL_TIM_SetSlaveMode + * @param TIMx Timer instance + * @param SlaveMode This parameter can be one of the following values: + * @arg @ref LL_TIM_SLAVEMODE_DISABLED + * @arg @ref LL_TIM_SLAVEMODE_RESET + * @arg @ref LL_TIM_SLAVEMODE_GATED + * @arg @ref LL_TIM_SLAVEMODE_TRIGGER + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode) +{ + MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); +} + +/** + * @brief Set the selects the trigger input to be used to synchronize the counter. + * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not + * a timer instance can operate as a slave timer. + * @rmtoll SMCR TS LL_TIM_SetTriggerInput + * @param TIMx Timer instance + * @param TriggerInput This parameter can be one of the following values: + * @arg @ref LL_TIM_TS_ITR0 + * @arg @ref LL_TIM_TS_ITR1 + * @arg @ref LL_TIM_TS_ITR2 + * @arg @ref LL_TIM_TS_ITR3 + * @arg @ref LL_TIM_TS_TI1F_ED + * @arg @ref LL_TIM_TS_TI1FP1 + * @arg @ref LL_TIM_TS_TI2FP2 + * @arg @ref LL_TIM_TS_ETRF + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput) +{ + MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); +} + +/** + * @brief Enable the Master/Slave mode. + * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not + * a timer instance can operate as a slave timer. + * @rmtoll SMCR MSM LL_TIM_EnableMasterSlaveMode + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->SMCR, TIM_SMCR_MSM); +} + +/** + * @brief Disable the Master/Slave mode. + * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not + * a timer instance can operate as a slave timer. + * @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); +} + +/** + * @brief Indicates whether the Master/Slave mode is enabled. + * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not + * a timer instance can operate as a slave timer. + * @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL); +} + +/** + * @brief Configure the external trigger (ETR) input. + * @note Macro IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides an external trigger input. + * @rmtoll SMCR ETP LL_TIM_ConfigETR\n + * SMCR ETPS LL_TIM_ConfigETR\n + * SMCR ETF LL_TIM_ConfigETR + * @param TIMx Timer instance + * @param ETRPolarity This parameter can be one of the following values: + * @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED + * @arg @ref LL_TIM_ETR_POLARITY_INVERTED + * @param ETRPrescaler This parameter can be one of the following values: + * @arg @ref LL_TIM_ETR_PRESCALER_DIV1 + * @arg @ref LL_TIM_ETR_PRESCALER_DIV2 + * @arg @ref LL_TIM_ETR_PRESCALER_DIV4 + * @arg @ref LL_TIM_ETR_PRESCALER_DIV8 + * @param ETRFilter This parameter can be one of the following values: + * @arg @ref LL_TIM_ETR_FILTER_FDIV1 + * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2 + * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4 + * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8 + * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6 + * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8 + * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6 + * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8 + * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6 + * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8 + * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5 + * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6 + * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8 + * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5 + * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6 + * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8 + * @retval None + */ +__STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescaler, + uint32_t ETRFilter) +{ + MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | ETRFilter); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_Break_Function Break function configuration + * @{ + */ +/** + * @brief Enable the break function. + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @rmtoll BDTR BKE LL_TIM_EnableBRK + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx) +{ + __IO uint32_t tmpreg; + SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); + /* Note: Any write operation to this bit takes a delay of 1 APB clock cycle to become effective. */ + tmpreg = READ_REG(TIMx->BDTR); + (void)(tmpreg); +} + +/** + * @brief Disable the break function. + * @rmtoll BDTR BKE LL_TIM_DisableBRK + * @param TIMx Timer instance + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx) +{ + __IO uint32_t tmpreg; + CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); + /* Note: Any write operation to this bit takes a delay of 1 APB clock cycle to become effective. */ + tmpreg = READ_REG(TIMx->BDTR); + (void)(tmpreg); +} + +/** + * @brief Configure the break input. + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @rmtoll BDTR BKP LL_TIM_ConfigBRK + * @param TIMx Timer instance + * @param BreakPolarity This parameter can be one of the following values: + * @arg @ref LL_TIM_BREAK_POLARITY_LOW + * @arg @ref LL_TIM_BREAK_POLARITY_HIGH + * @retval None + */ +__STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity) +{ + __IO uint32_t tmpreg; + MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP, BreakPolarity); + /* Note: Any write operation to BKP bit takes a delay of 1 APB clock cycle to become effective. */ + tmpreg = READ_REG(TIMx->BDTR); + (void)(tmpreg); +} + +/** + * @brief Select the outputs off state (enabled v.s. disabled) in Idle and Run modes. + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @rmtoll BDTR OSSI LL_TIM_SetOffStates\n + * BDTR OSSR LL_TIM_SetOffStates + * @param TIMx Timer instance + * @param OffStateIdle This parameter can be one of the following values: + * @arg @ref LL_TIM_OSSI_DISABLE + * @arg @ref LL_TIM_OSSI_ENABLE + * @param OffStateRun This parameter can be one of the following values: + * @arg @ref LL_TIM_OSSR_DISABLE + * @arg @ref LL_TIM_OSSR_ENABLE + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStateRun) +{ + MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); +} + +/** + * @brief Enable automatic output (MOE can be set by software or automatically when a break input is active). + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); +} + +/** + * @brief Disable automatic output (MOE can be set only by software). + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @rmtoll BDTR AOE LL_TIM_DisableAutomaticOutput + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE); +} + +/** + * @brief Indicate whether automatic output is enabled. + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL); +} + +/** + * @brief Enable the outputs (set the MOE bit in TIMx_BDTR register). + * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by + * software and is reset in case of break or break2 event + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @rmtoll BDTR MOE LL_TIM_EnableAllOutputs + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->BDTR, TIM_BDTR_MOE); +} + +/** + * @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register). + * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by + * software and is reset in case of break or break2 event. + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @rmtoll BDTR MOE LL_TIM_DisableAllOutputs + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE); +} + +/** + * @brief Indicates whether outputs are enabled. + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * a timer instance provides a break input. + * @rmtoll BDTR MOE LL_TIM_IsEnabledAllOutputs + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration + * @{ + */ +/** + * @brief Configures the timer DMA burst feature. + * @note Macro IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or + * not a timer instance supports the DMA burst mode. + * @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n + * DCR DBA LL_TIM_ConfigDMABurst + * @param TIMx Timer instance + * @param DMABurstBaseAddress This parameter can be one of the following values: + * @arg @ref LL_TIM_DMABURST_BASEADDR_CR1 + * @arg @ref LL_TIM_DMABURST_BASEADDR_CR2 + * @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR + * @arg @ref LL_TIM_DMABURST_BASEADDR_DIER + * @arg @ref LL_TIM_DMABURST_BASEADDR_SR + * @arg @ref LL_TIM_DMABURST_BASEADDR_EGR + * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1 + * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2 + * @arg @ref LL_TIM_DMABURST_BASEADDR_CCER + * @arg @ref LL_TIM_DMABURST_BASEADDR_CNT + * @arg @ref LL_TIM_DMABURST_BASEADDR_PSC + * @arg @ref LL_TIM_DMABURST_BASEADDR_ARR + * @arg @ref LL_TIM_DMABURST_BASEADDR_RCR + * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1 + * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2 + * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3 + * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4 + * @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR + * @param DMABurstLength This parameter can be one of the following values: + * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER + * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS + * @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS + * @retval None + */ +__STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_t DMABurstLength) +{ + MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength)); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping + * @{ + */ +/** + * @brief Remap TIM inputs (input channel, internal/external triggers). + * @note Macro IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not + * a some timer inputs can be remapped. + * @rmtoll TIM14_OR TI1_RMP LL_TIM_SetRemap + * @param TIMx Timer instance + * @param Remap This parameter can be one of the following values: + * @arg @ref LL_TIM_TIM14_TI1_RMP_GPIO + * @arg @ref LL_TIM_TIM14_TI1_RMP_RTC_CLK + * @arg @ref LL_TIM_TIM14_TI1_RMP_HSE + * @arg @ref LL_TIM_TIM14_TI1_RMP_MCO + * + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap) +{ + MODIFY_REG(TIMx->OR, (Remap >> TIMx_OR_RMP_SHIFT), (Remap & TIMx_OR_RMP_MASK)); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_OCREF_Clear OCREF_Clear_Management + * @{ + */ +/** + * @brief Set the OCREF clear input source + * @note The OCxREF signal of a given channel can be cleared when a high level is applied on the OCREF_CLR_INPUT + * @note This function can only be used in Output compare and PWM modes. + * @rmtoll SMCR OCCS LL_TIM_SetOCRefClearInputSource + * @param TIMx Timer instance + * @param OCRefClearInputSource This parameter can be one of the following values: + * @arg @ref LL_TIM_OCREF_CLR_INT_OCREF_CLR + * @arg @ref LL_TIM_OCREF_CLR_INT_ETR + * @retval None + */ +__STATIC_INLINE void LL_TIM_SetOCRefClearInputSource(TIM_TypeDef *TIMx, uint32_t OCRefClearInputSource) +{ + MODIFY_REG(TIMx->SMCR, TIM_SMCR_OCCS, OCRefClearInputSource); +} +/** + * @} + */ + +/** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management + * @{ + */ +/** + * @brief Clear the update interrupt flag (UIF). + * @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_UIF)); +} + +/** + * @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending). + * @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the Capture/Compare 1 interrupt flag (CC1F). + * @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF)); +} + +/** + * @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 interrupt is pending). + * @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the Capture/Compare 2 interrupt flag (CC2F). + * @rmtoll SR CC2IF LL_TIM_ClearFlag_CC2 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF)); +} + +/** + * @brief Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 interrupt is pending). + * @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the Capture/Compare 3 interrupt flag (CC3F). + * @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF)); +} + +/** + * @brief Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 interrupt is pending). + * @rmtoll SR CC3IF LL_TIM_IsActiveFlag_CC3 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the Capture/Compare 4 interrupt flag (CC4F). + * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF)); +} + +/** + * @brief Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 interrupt is pending). + * @rmtoll SR CC4IF LL_TIM_IsActiveFlag_CC4 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the commutation interrupt flag (COMIF). + * @rmtoll SR COMIF LL_TIM_ClearFlag_COM + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF)); +} + +/** + * @brief Indicate whether commutation interrupt flag (COMIF) is set (commutation interrupt is pending). + * @rmtoll SR COMIF LL_TIM_IsActiveFlag_COM + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the trigger interrupt flag (TIF). + * @rmtoll SR TIF LL_TIM_ClearFlag_TRIG + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_TIF)); +} + +/** + * @brief Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending). + * @rmtoll SR TIF LL_TIM_IsActiveFlag_TRIG + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the break interrupt flag (BIF). + * @rmtoll SR BIF LL_TIM_ClearFlag_BRK + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_BIF)); +} + +/** + * @brief Indicate whether break interrupt flag (BIF) is set (break interrupt is pending). + * @rmtoll SR BIF LL_TIM_IsActiveFlag_BRK + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF). + * @rmtoll SR CC1OF LL_TIM_ClearFlag_CC1OVR + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF)); +} + +/** + * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set + * (Capture/Compare 1 interrupt is pending). + * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF). + * @rmtoll SR CC2OF LL_TIM_ClearFlag_CC2OVR + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF)); +} + +/** + * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set + * (Capture/Compare 2 over-capture interrupt is pending). + * @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF). + * @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); +} + +/** + * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set + * (Capture/Compare 3 over-capture interrupt is pending). + * @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL); +} + +/** + * @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF). + * @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) +{ + WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); +} + +/** + * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set + * (Capture/Compare 4 over-capture interrupt is pending). + * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_IT_Management IT-Management + * @{ + */ +/** + * @brief Enable update interrupt (UIE). + * @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_UIE); +} + +/** + * @brief Disable update interrupt (UIE). + * @rmtoll DIER UIE LL_TIM_DisableIT_UPDATE + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); +} + +/** + * @brief Indicates whether the update interrupt (UIE) is enabled. + * @rmtoll DIER UIE LL_TIM_IsEnabledIT_UPDATE + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); +} + +/** + * @brief Enable capture/compare 1 interrupt (CC1IE). + * @rmtoll DIER CC1IE LL_TIM_EnableIT_CC1 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_CC1IE); +} + +/** + * @brief Disable capture/compare 1 interrupt (CC1IE). + * @rmtoll DIER CC1IE LL_TIM_DisableIT_CC1 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE); +} + +/** + * @brief Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled. + * @rmtoll DIER CC1IE LL_TIM_IsEnabledIT_CC1 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL); +} + +/** + * @brief Enable capture/compare 2 interrupt (CC2IE). + * @rmtoll DIER CC2IE LL_TIM_EnableIT_CC2 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_CC2IE); +} + +/** + * @brief Disable capture/compare 2 interrupt (CC2IE). + * @rmtoll DIER CC2IE LL_TIM_DisableIT_CC2 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE); +} + +/** + * @brief Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled. + * @rmtoll DIER CC2IE LL_TIM_IsEnabledIT_CC2 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL); +} + +/** + * @brief Enable capture/compare 3 interrupt (CC3IE). + * @rmtoll DIER CC3IE LL_TIM_EnableIT_CC3 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_CC3IE); +} + +/** + * @brief Disable capture/compare 3 interrupt (CC3IE). + * @rmtoll DIER CC3IE LL_TIM_DisableIT_CC3 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE); +} + +/** + * @brief Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled. + * @rmtoll DIER CC3IE LL_TIM_IsEnabledIT_CC3 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL); +} + +/** + * @brief Enable capture/compare 4 interrupt (CC4IE). + * @rmtoll DIER CC4IE LL_TIM_EnableIT_CC4 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_CC4IE); +} + +/** + * @brief Disable capture/compare 4 interrupt (CC4IE). + * @rmtoll DIER CC4IE LL_TIM_DisableIT_CC4 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE); +} + +/** + * @brief Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled. + * @rmtoll DIER CC4IE LL_TIM_IsEnabledIT_CC4 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL); +} + +/** + * @brief Enable commutation interrupt (COMIE). + * @rmtoll DIER COMIE LL_TIM_EnableIT_COM + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_COMIE); +} + +/** + * @brief Disable commutation interrupt (COMIE). + * @rmtoll DIER COMIE LL_TIM_DisableIT_COM + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE); +} + +/** + * @brief Indicates whether the commutation interrupt (COMIE) is enabled. + * @rmtoll DIER COMIE LL_TIM_IsEnabledIT_COM + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL); +} + +/** + * @brief Enable trigger interrupt (TIE). + * @rmtoll DIER TIE LL_TIM_EnableIT_TRIG + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_TIE); +} + +/** + * @brief Disable trigger interrupt (TIE). + * @rmtoll DIER TIE LL_TIM_DisableIT_TRIG + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE); +} + +/** + * @brief Indicates whether the trigger interrupt (TIE) is enabled. + * @rmtoll DIER TIE LL_TIM_IsEnabledIT_TRIG + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL); +} + +/** + * @brief Enable break interrupt (BIE). + * @rmtoll DIER BIE LL_TIM_EnableIT_BRK + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_BIE); +} + +/** + * @brief Disable break interrupt (BIE). + * @rmtoll DIER BIE LL_TIM_DisableIT_BRK + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE); +} + +/** + * @brief Indicates whether the break interrupt (BIE) is enabled. + * @rmtoll DIER BIE LL_TIM_IsEnabledIT_BRK + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_DMA_Management DMA Management + * @{ + */ +/** + * @brief Enable update DMA request (UDE). + * @rmtoll DIER UDE LL_TIM_EnableDMAReq_UPDATE + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_UDE); +} + +/** + * @brief Disable update DMA request (UDE). + * @rmtoll DIER UDE LL_TIM_DisableDMAReq_UPDATE + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE); +} + +/** + * @brief Indicates whether the update DMA request (UDE) is enabled. + * @rmtoll DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL); +} + +/** + * @brief Enable capture/compare 1 DMA request (CC1DE). + * @rmtoll DIER CC1DE LL_TIM_EnableDMAReq_CC1 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_CC1DE); +} + +/** + * @brief Disable capture/compare 1 DMA request (CC1DE). + * @rmtoll DIER CC1DE LL_TIM_DisableDMAReq_CC1 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE); +} + +/** + * @brief Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled. + * @rmtoll DIER CC1DE LL_TIM_IsEnabledDMAReq_CC1 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL); +} + +/** + * @brief Enable capture/compare 2 DMA request (CC2DE). + * @rmtoll DIER CC2DE LL_TIM_EnableDMAReq_CC2 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); +} + +/** + * @brief Disable capture/compare 2 DMA request (CC2DE). + * @rmtoll DIER CC2DE LL_TIM_DisableDMAReq_CC2 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); +} + +/** + * @brief Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled. + * @rmtoll DIER CC2DE LL_TIM_IsEnabledDMAReq_CC2 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); +} + +/** + * @brief Enable capture/compare 3 DMA request (CC3DE). + * @rmtoll DIER CC3DE LL_TIM_EnableDMAReq_CC3 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_CC3DE); +} + +/** + * @brief Disable capture/compare 3 DMA request (CC3DE). + * @rmtoll DIER CC3DE LL_TIM_DisableDMAReq_CC3 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE); +} + +/** + * @brief Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled. + * @rmtoll DIER CC3DE LL_TIM_IsEnabledDMAReq_CC3 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL); +} + +/** + * @brief Enable capture/compare 4 DMA request (CC4DE). + * @rmtoll DIER CC4DE LL_TIM_EnableDMAReq_CC4 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_CC4DE); +} + +/** + * @brief Disable capture/compare 4 DMA request (CC4DE). + * @rmtoll DIER CC4DE LL_TIM_DisableDMAReq_CC4 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE); +} + +/** + * @brief Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled. + * @rmtoll DIER CC4DE LL_TIM_IsEnabledDMAReq_CC4 + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL); +} + +/** + * @brief Enable commutation DMA request (COMDE). + * @rmtoll DIER COMDE LL_TIM_EnableDMAReq_COM + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_COMDE); +} + +/** + * @brief Disable commutation DMA request (COMDE). + * @rmtoll DIER COMDE LL_TIM_DisableDMAReq_COM + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE); +} + +/** + * @brief Indicates whether the commutation DMA request (COMDE) is enabled. + * @rmtoll DIER COMDE LL_TIM_IsEnabledDMAReq_COM + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL); +} + +/** + * @brief Enable trigger interrupt (TDE). + * @rmtoll DIER TDE LL_TIM_EnableDMAReq_TRIG + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->DIER, TIM_DIER_TDE); +} + +/** + * @brief Disable trigger interrupt (TDE). + * @rmtoll DIER TDE LL_TIM_DisableDMAReq_TRIG + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx) +{ + CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE); +} + +/** + * @brief Indicates whether the trigger interrupt (TDE) is enabled. + * @rmtoll DIER TDE LL_TIM_IsEnabledDMAReq_TRIG + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** @defgroup TIM_LL_EF_EVENT_Management EVENT-Management + * @{ + */ +/** + * @brief Generate an update event. + * @rmtoll EGR UG LL_TIM_GenerateEvent_UPDATE + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->EGR, TIM_EGR_UG); +} + +/** + * @brief Generate Capture/Compare 1 event. + * @rmtoll EGR CC1G LL_TIM_GenerateEvent_CC1 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_GenerateEvent_CC1(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->EGR, TIM_EGR_CC1G); +} + +/** + * @brief Generate Capture/Compare 2 event. + * @rmtoll EGR CC2G LL_TIM_GenerateEvent_CC2 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_GenerateEvent_CC2(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->EGR, TIM_EGR_CC2G); +} + +/** + * @brief Generate Capture/Compare 3 event. + * @rmtoll EGR CC3G LL_TIM_GenerateEvent_CC3 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_GenerateEvent_CC3(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->EGR, TIM_EGR_CC3G); +} + +/** + * @brief Generate Capture/Compare 4 event. + * @rmtoll EGR CC4G LL_TIM_GenerateEvent_CC4 + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_GenerateEvent_CC4(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->EGR, TIM_EGR_CC4G); +} + +/** + * @brief Generate commutation event. + * @rmtoll EGR COMG LL_TIM_GenerateEvent_COM + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_GenerateEvent_COM(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->EGR, TIM_EGR_COMG); +} + +/** + * @brief Generate trigger event. + * @rmtoll EGR TG LL_TIM_GenerateEvent_TRIG + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_GenerateEvent_TRIG(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->EGR, TIM_EGR_TG); +} + +/** + * @brief Generate break event. + * @rmtoll EGR BG LL_TIM_GenerateEvent_BRK + * @param TIMx Timer instance + * @retval None + */ +__STATIC_INLINE void LL_TIM_GenerateEvent_BRK(TIM_TypeDef *TIMx) +{ + SET_BIT(TIMx->EGR, TIM_EGR_BG); +} + +/** + * @} + */ + +#if defined(USE_FULL_LL_DRIVER) +/** @defgroup TIM_LL_EF_Init Initialisation and deinitialisation functions + * @{ + */ + +ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx); +void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct); +ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct); +void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct); +ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct); +void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct); +ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC_InitStruct); +void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct); +ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct); +void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct); +ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct); +void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct); +ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct); +/** + * @} + */ +#endif /* USE_FULL_LL_DRIVER */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* TIM1 || TIM2 || TIM3 || TIM14 || TIM15 || TIM16 || TIM17 || TIM6 || TIM7 */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F0xx_LL_TIM_H */ diff --git a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h b/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h deleted file mode 100644 index 71c3c8d..0000000 --- a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h +++ /dev/null @@ -1,240 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f0xx_ll_usb.h - * @author MCD Application Team - * @brief Header file of USB Low Layer HAL module. - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32F0xx_LL_USB_H -#define STM32F0xx_LL_USB_H - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f0xx_hal_def.h" - -#if defined (USB) -/** @addtogroup STM32F0xx_HAL_Driver - * @{ - */ - -/** @addtogroup USB_LL - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** - * @brief USB Mode definition - */ - -typedef enum -{ - USB_DEVICE_MODE = 0 -} USB_ModeTypeDef; - - -/** - * @brief USB Instance Initialization Structure definition - */ -typedef struct -{ - uint32_t dev_endpoints; /*!< Device Endpoints number. - This parameter depends on the used USB core. - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint32_t speed; /*!< USB Core speed. - This parameter can be any value of @ref PCD_Speed/HCD_Speed - (HCD_SPEED_xxx, HCD_SPEED_xxx) */ - - uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ - - uint32_t phy_itface; /*!< Select the used PHY interface. - This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */ - - uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ - - uint32_t low_power_enable; /*!< Enable or disable the low Power Mode. */ - - uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */ - - uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ -} USB_CfgTypeDef; - -typedef struct -{ - uint8_t num; /*!< Endpoint number - This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ - - uint8_t is_in; /*!< Endpoint direction - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t is_stall; /*!< Endpoint stall condition - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - uint8_t type; /*!< Endpoint type - This parameter can be any value of @ref USB_LL_EP_Type */ - - uint8_t data_pid_start; /*!< Initial data PID - This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ - - - uint16_t pmaadress; /*!< PMA Address - This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ - - uint16_t pmaaddr0; /*!< PMA Address0 - This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ - - uint16_t pmaaddr1; /*!< PMA Address1 - This parameter can be any value between Min_addr = 0 and Max_addr = 1K */ - - uint8_t doublebuffer; /*!< Double buffer enable - This parameter can be 0 or 1 */ - - - uint32_t maxpacket; /*!< Endpoint Max packet size - This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ - - uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ - - uint32_t xfer_len; /*!< Current transfer length */ - - uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ - - uint32_t xfer_len_db; /*!< double buffer transfer length used with bulk double buffer in */ - - uint8_t xfer_fill_db; /*!< double buffer Need to Fill new buffer used with bulk_in */ -} USB_EPTypeDef; - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup PCD_Exported_Constants PCD Exported Constants - * @{ - */ -/** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS - * @{ - */ -#define EP_MPS_64 0U -#define EP_MPS_32 1U -#define EP_MPS_16 2U -#define EP_MPS_8 3U -/** - * @} - */ - -/** @defgroup USB_LL_EP_Type USB Low Layer EP Type - * @{ - */ -#define EP_TYPE_CTRL 0U -#define EP_TYPE_ISOC 1U -#define EP_TYPE_BULK 2U -#define EP_TYPE_INTR 3U -#define EP_TYPE_MSK 3U -/** - * @} - */ - -/** @defgroup USB_LL Device Speed - * @{ - */ -#define USBD_FS_SPEED 2U -/** - * @} - */ - - -#define BTABLE_ADDRESS 0x000U -#define PMA_ACCESS 1U - -#ifndef USB_EP_RX_STRX -#define USB_EP_RX_STRX (0x3U << 12) -#endif /* USB_EP_RX_STRX */ - -#define EP_ADDR_MSK 0x7U - -#ifndef USE_USB_DOUBLE_BUFFER -#define USE_USB_DOUBLE_BUFFER 1U -#endif /* USE_USB_DOUBLE_BUFFER */ - - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions - * @{ - */ - - -HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); -HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg); -HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode); - -#if defined (HAL_PCD_MODULE_ENABLED) -HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); -HAL_StatusTypeDef USB_EPStopXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep); -#endif /* defined (HAL_PCD_MODULE_ENABLED) */ - -HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address); -HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx); -uint32_t USB_ReadInterrupts(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx); -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx); - -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, - uint16_t wPMABufAddr, uint16_t wNBytes); - -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, - uint16_t wPMABufAddr, uint16_t wNBytes); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -#endif /* defined (USB) */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - - -#endif /* STM32F0xx_LL_USB_H */ diff --git a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c b/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c deleted file mode 100644 index 289c86f..0000000 --- a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c +++ /dev/null @@ -1,2234 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f0xx_hal_pcd.c - * @author MCD Application Team - * @brief PCD HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The PCD HAL driver can be used as follows: - - (#) Declare a PCD_HandleTypeDef handle structure, for example: - PCD_HandleTypeDef hpcd; - - (#) Fill parameters of Init structure in HCD handle - - (#) Call HAL_PCD_Init() API to initialize the PCD peripheral (Core, Device core, ...) - - (#) Initialize the PCD low level resources through the HAL_PCD_MspInit() API: - (##) Enable the PCD/USB Low Level interface clock using - (+++) __HAL_RCC_USB_CLK_ENABLE(); For USB Device FS peripheral - - (##) Initialize the related GPIO clocks - (##) Configure PCD pin-out - (##) Configure PCD NVIC interrupt - - (#)Associate the Upper USB device stack to the HAL PCD Driver: - (##) hpcd.pData = pdev; - - (#)Enable PCD transmission and reception: - (##) HAL_PCD_Start(); - - @endverbatim - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f0xx_hal.h" - -/** @addtogroup STM32F0xx_HAL_Driver - * @{ - */ - -/** @defgroup PCD PCD - * @brief PCD HAL module driver - * @{ - */ - -#ifdef HAL_PCD_MODULE_ENABLED - -#if defined (USB) - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/** @defgroup PCD_Private_Macros PCD Private Macros - * @{ - */ -#define PCD_MIN(a, b) (((a) < (b)) ? (a) : (b)) -#define PCD_MAX(a, b) (((a) > (b)) ? (a) : (b)) -/** - * @} - */ - -/* Private functions prototypes ----------------------------------------------*/ -/** @defgroup PCD_Private_Functions PCD Private Functions - * @{ - */ - -static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd); -#if (USE_USB_DOUBLE_BUFFER == 1U) -static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal); -static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal); -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup PCD_Exported_Functions PCD Exported Functions - * @{ - */ - -/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the PCD according to the specified - * parameters in the PCD_InitTypeDef and initialize the associated handle. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) -{ - uint8_t i; - - /* Check the PCD handle allocation */ - if (hpcd == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); - - if (hpcd->State == HAL_PCD_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hpcd->Lock = HAL_UNLOCKED; - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->SOFCallback = HAL_PCD_SOFCallback; - hpcd->SetupStageCallback = HAL_PCD_SetupStageCallback; - hpcd->ResetCallback = HAL_PCD_ResetCallback; - hpcd->SuspendCallback = HAL_PCD_SuspendCallback; - hpcd->ResumeCallback = HAL_PCD_ResumeCallback; - hpcd->ConnectCallback = HAL_PCD_ConnectCallback; - hpcd->DisconnectCallback = HAL_PCD_DisconnectCallback; - hpcd->DataOutStageCallback = HAL_PCD_DataOutStageCallback; - hpcd->DataInStageCallback = HAL_PCD_DataInStageCallback; - hpcd->ISOOUTIncompleteCallback = HAL_PCD_ISOOUTIncompleteCallback; - hpcd->ISOINIncompleteCallback = HAL_PCD_ISOINIncompleteCallback; - hpcd->LPMCallback = HAL_PCDEx_LPM_Callback; - hpcd->BCDCallback = HAL_PCDEx_BCD_Callback; - - if (hpcd->MspInitCallback == NULL) - { - hpcd->MspInitCallback = HAL_PCD_MspInit; - } - - /* Init the low level hardware */ - hpcd->MspInitCallback(hpcd); -#else - /* Init the low level hardware : GPIO, CLOCK, NVIC... */ - HAL_PCD_MspInit(hpcd); -#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ - } - - hpcd->State = HAL_PCD_STATE_BUSY; - - /* Disable the Interrupts */ - __HAL_PCD_DISABLE(hpcd); - - /* Init endpoints structures */ - for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - { - /* Init ep structure */ - hpcd->IN_ep[i].is_in = 1U; - hpcd->IN_ep[i].num = i; - /* Control until ep is activated */ - hpcd->IN_ep[i].type = EP_TYPE_CTRL; - hpcd->IN_ep[i].maxpacket = 0U; - hpcd->IN_ep[i].xfer_buff = 0U; - hpcd->IN_ep[i].xfer_len = 0U; - } - - for (i = 0U; i < hpcd->Init.dev_endpoints; i++) - { - hpcd->OUT_ep[i].is_in = 0U; - hpcd->OUT_ep[i].num = i; - /* Control until ep is activated */ - hpcd->OUT_ep[i].type = EP_TYPE_CTRL; - hpcd->OUT_ep[i].maxpacket = 0U; - hpcd->OUT_ep[i].xfer_buff = 0U; - hpcd->OUT_ep[i].xfer_len = 0U; - } - - /* Init Device */ - (void)USB_DevInit(hpcd->Instance, hpcd->Init); - - hpcd->USB_Address = 0U; - hpcd->State = HAL_PCD_STATE_READY; - - /* Activate LPM */ - if (hpcd->Init.lpm_enable == 1U) - { - (void)HAL_PCDEx_ActivateLPM(hpcd); - } - - return HAL_OK; -} - -/** - * @brief DeInitializes the PCD peripheral. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd) -{ - /* Check the PCD handle allocation */ - if (hpcd == NULL) - { - return HAL_ERROR; - } - - hpcd->State = HAL_PCD_STATE_BUSY; - - /* Stop Device */ - if (USB_StopDevice(hpcd->Instance) != HAL_OK) - { - return HAL_ERROR; - } - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - if (hpcd->MspDeInitCallback == NULL) - { - hpcd->MspDeInitCallback = HAL_PCD_MspDeInit; /* Legacy weak MspDeInit */ - } - - /* DeInit the low level hardware */ - hpcd->MspDeInitCallback(hpcd); -#else - /* DeInit the low level hardware: CLOCK, NVIC.*/ - HAL_PCD_MspDeInit(hpcd); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - hpcd->State = HAL_PCD_STATE_RESET; - - return HAL_OK; -} - -/** - * @brief Initializes the PCD MSP. - * @param hpcd PCD handle - * @retval None - */ -__weak void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitializes PCD MSP. - * @param hpcd PCD handle - * @retval None - */ -__weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspDeInit could be implemented in the user file - */ -} - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) -/** - * @brief Register a User USB PCD Callback - * To be used instead of the weak predefined callback - * @param hpcd USB PCD handle - * @param CallbackID ID of the callback to be registered - * This parameter can be one of the following values: - * @arg @ref HAL_PCD_SOF_CB_ID USB PCD SOF callback ID - * @arg @ref HAL_PCD_SETUPSTAGE_CB_ID USB PCD Setup callback ID - * @arg @ref HAL_PCD_RESET_CB_ID USB PCD Reset callback ID - * @arg @ref HAL_PCD_SUSPEND_CB_ID USB PCD Suspend callback ID - * @arg @ref HAL_PCD_RESUME_CB_ID USB PCD Resume callback ID - * @arg @ref HAL_PCD_CONNECT_CB_ID USB PCD Connect callback ID - * @arg @ref HAL_PCD_DISCONNECT_CB_ID USB PCD Disconnect callback ID - * @arg @ref HAL_PCD_MSPINIT_CB_ID MspDeInit callback ID - * @arg @ref HAL_PCD_MSPDEINIT_CB_ID MspDeInit callback ID - * @param pCallback pointer to the Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, - HAL_PCD_CallbackIDTypeDef CallbackID, - pPCD_CallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - return HAL_ERROR; - } - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - switch (CallbackID) - { - case HAL_PCD_SOF_CB_ID : - hpcd->SOFCallback = pCallback; - break; - - case HAL_PCD_SETUPSTAGE_CB_ID : - hpcd->SetupStageCallback = pCallback; - break; - - case HAL_PCD_RESET_CB_ID : - hpcd->ResetCallback = pCallback; - break; - - case HAL_PCD_SUSPEND_CB_ID : - hpcd->SuspendCallback = pCallback; - break; - - case HAL_PCD_RESUME_CB_ID : - hpcd->ResumeCallback = pCallback; - break; - - case HAL_PCD_CONNECT_CB_ID : - hpcd->ConnectCallback = pCallback; - break; - - case HAL_PCD_DISCONNECT_CB_ID : - hpcd->DisconnectCallback = pCallback; - break; - - case HAL_PCD_MSPINIT_CB_ID : - hpcd->MspInitCallback = pCallback; - break; - - case HAL_PCD_MSPDEINIT_CB_ID : - hpcd->MspDeInitCallback = pCallback; - break; - - default : - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else if (hpcd->State == HAL_PCD_STATE_RESET) - { - switch (CallbackID) - { - case HAL_PCD_MSPINIT_CB_ID : - hpcd->MspInitCallback = pCallback; - break; - - case HAL_PCD_MSPDEINIT_CB_ID : - hpcd->MspDeInitCallback = pCallback; - break; - - default : - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; -} - -/** - * @brief Unregister an USB PCD Callback - * USB PCD callback is redirected to the weak predefined callback - * @param hpcd USB PCD handle - * @param CallbackID ID of the callback to be unregistered - * This parameter can be one of the following values: - * @arg @ref HAL_PCD_SOF_CB_ID USB PCD SOF callback ID - * @arg @ref HAL_PCD_SETUPSTAGE_CB_ID USB PCD Setup callback ID - * @arg @ref HAL_PCD_RESET_CB_ID USB PCD Reset callback ID - * @arg @ref HAL_PCD_SUSPEND_CB_ID USB PCD Suspend callback ID - * @arg @ref HAL_PCD_RESUME_CB_ID USB PCD Resume callback ID - * @arg @ref HAL_PCD_CONNECT_CB_ID USB PCD Connect callback ID - * @arg @ref HAL_PCD_DISCONNECT_CB_ID USB PCD Disconnect callback ID - * @arg @ref HAL_PCD_MSPINIT_CB_ID MspDeInit callback ID - * @arg @ref HAL_PCD_MSPDEINIT_CB_ID MspDeInit callback ID - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hpcd); - - /* Setup Legacy weak Callbacks */ - if (hpcd->State == HAL_PCD_STATE_READY) - { - switch (CallbackID) - { - case HAL_PCD_SOF_CB_ID : - hpcd->SOFCallback = HAL_PCD_SOFCallback; - break; - - case HAL_PCD_SETUPSTAGE_CB_ID : - hpcd->SetupStageCallback = HAL_PCD_SetupStageCallback; - break; - - case HAL_PCD_RESET_CB_ID : - hpcd->ResetCallback = HAL_PCD_ResetCallback; - break; - - case HAL_PCD_SUSPEND_CB_ID : - hpcd->SuspendCallback = HAL_PCD_SuspendCallback; - break; - - case HAL_PCD_RESUME_CB_ID : - hpcd->ResumeCallback = HAL_PCD_ResumeCallback; - break; - - case HAL_PCD_CONNECT_CB_ID : - hpcd->ConnectCallback = HAL_PCD_ConnectCallback; - break; - - case HAL_PCD_DISCONNECT_CB_ID : - hpcd->DisconnectCallback = HAL_PCD_DisconnectCallback; - break; - - case HAL_PCD_MSPINIT_CB_ID : - hpcd->MspInitCallback = HAL_PCD_MspInit; - break; - - case HAL_PCD_MSPDEINIT_CB_ID : - hpcd->MspDeInitCallback = HAL_PCD_MspDeInit; - break; - - default : - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else if (hpcd->State == HAL_PCD_STATE_RESET) - { - switch (CallbackID) - { - case HAL_PCD_MSPINIT_CB_ID : - hpcd->MspInitCallback = HAL_PCD_MspInit; - break; - - case HAL_PCD_MSPDEINIT_CB_ID : - hpcd->MspDeInitCallback = HAL_PCD_MspDeInit; - break; - - default : - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - break; - } - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - return status; -} - -/** - * @brief Register USB PCD Data OUT Stage Callback - * To be used instead of the weak HAL_PCD_DataOutStageCallback() predefined callback - * @param hpcd PCD handle - * @param pCallback pointer to the USB PCD Data OUT Stage Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, - pPCD_DataOutStageCallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - return HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->DataOutStageCallback = pCallback; - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Unregister the USB PCD Data OUT Stage Callback - * USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataOutStageCallback() predefined callback - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->DataOutStageCallback = HAL_PCD_DataOutStageCallback; /* Legacy weak DataOutStageCallback */ - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Register USB PCD Data IN Stage Callback - * To be used instead of the weak HAL_PCD_DataInStageCallback() predefined callback - * @param hpcd PCD handle - * @param pCallback pointer to the USB PCD Data IN Stage Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, - pPCD_DataInStageCallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - return HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->DataInStageCallback = pCallback; - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Unregister the USB PCD Data IN Stage Callback - * USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataInStageCallback() predefined callback - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->DataInStageCallback = HAL_PCD_DataInStageCallback; /* Legacy weak DataInStageCallback */ - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Register USB PCD Iso OUT incomplete Callback - * To be used instead of the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback - * @param hpcd PCD handle - * @param pCallback pointer to the USB PCD Iso OUT incomplete Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, - pPCD_IsoOutIncpltCallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - return HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->ISOOUTIncompleteCallback = pCallback; - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Unregister the USB PCD Iso OUT incomplete Callback - * USB PCD Iso OUT incomplete Callback is redirected - * to the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->ISOOUTIncompleteCallback = HAL_PCD_ISOOUTIncompleteCallback; /* Legacy weak ISOOUTIncompleteCallback */ - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Register USB PCD Iso IN incomplete Callback - * To be used instead of the weak HAL_PCD_ISOINIncompleteCallback() predefined callback - * @param hpcd PCD handle - * @param pCallback pointer to the USB PCD Iso IN incomplete Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, - pPCD_IsoInIncpltCallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - return HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->ISOINIncompleteCallback = pCallback; - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Unregister the USB PCD Iso IN incomplete Callback - * USB PCD Iso IN incomplete Callback is redirected - * to the weak HAL_PCD_ISOINIncompleteCallback() predefined callback - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->ISOINIncompleteCallback = HAL_PCD_ISOINIncompleteCallback; /* Legacy weak ISOINIncompleteCallback */ - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Register USB PCD BCD Callback - * To be used instead of the weak HAL_PCDEx_BCD_Callback() predefined callback - * @param hpcd PCD handle - * @param pCallback pointer to the USB PCD BCD Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - return HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->BCDCallback = pCallback; - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Unregister the USB PCD BCD Callback - * USB BCD Callback is redirected to the weak HAL_PCDEx_BCD_Callback() predefined callback - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->BCDCallback = HAL_PCDEx_BCD_Callback; /* Legacy weak HAL_PCDEx_BCD_Callback */ - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Register USB PCD LPM Callback - * To be used instead of the weak HAL_PCDEx_LPM_Callback() predefined callback - * @param hpcd PCD handle - * @param pCallback pointer to the USB PCD LPM Callback function - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback) -{ - HAL_StatusTypeDef status = HAL_OK; - - if (pCallback == NULL) - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - return HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->LPMCallback = pCallback; - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} - -/** - * @brief Unregister the USB PCD LPM Callback - * USB LPM Callback is redirected to the weak HAL_PCDEx_LPM_Callback() predefined callback - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process locked */ - __HAL_LOCK(hpcd); - - if (hpcd->State == HAL_PCD_STATE_READY) - { - hpcd->LPMCallback = HAL_PCDEx_LPM_Callback; /* Legacy weak HAL_PCDEx_LPM_Callback */ - } - else - { - /* Update the error code */ - hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; - - /* Return error status */ - status = HAL_ERROR; - } - - /* Release Lock */ - __HAL_UNLOCK(hpcd); - - return status; -} -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the PCD data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Start the USB device - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - __HAL_PCD_ENABLE(hpcd); - (void)USB_DevConnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Stop the USB device. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - __HAL_PCD_DISABLE(hpcd); - (void)USB_DevDisconnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - - -/** - * @brief This function handles PCD interrupt request. - * @param hpcd PCD handle - * @retval HAL status - */ -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) -{ - uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance); - - if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR) - { - /* servicing of the endpoint correct transfer interrupt */ - /* clear of the CTR flag into the sub */ - (void)PCD_EP_ISR_Handler(hpcd); - - return; - } - - if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->ResetCallback(hpcd); -#else - HAL_PCD_ResetCallback(hpcd); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - (void)HAL_PCD_SetAddress(hpcd, 0U); - - return; - } - - if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); - - return; - } - - if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); - - return; - } - - if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP) - { - hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LPMODE); - hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); - - if (hpcd->LPM_State == LPM_L1) - { - hpcd->LPM_State = LPM_L0; -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->LPMCallback(hpcd, PCD_LPM_L0_ACTIVE); -#else - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->ResumeCallback(hpcd); -#else - HAL_PCD_ResumeCallback(hpcd); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); - - return; - } - - if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP) - { - /* Force low-power mode in the macrocell */ - hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP; - - /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); - - hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LPMODE; - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->SuspendCallback(hpcd); -#else - HAL_PCD_SuspendCallback(hpcd); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - return; - } - - /* Handle LPM Interrupt */ - if ((wIstr & USB_ISTR_L1REQ) == USB_ISTR_L1REQ) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_L1REQ); - if (hpcd->LPM_State == LPM_L0) - { - /* Force suspend and low-power mode before going to L1 state*/ - hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LPMODE; - hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP; - - hpcd->LPM_State = LPM_L1; - hpcd->BESL = ((uint32_t)hpcd->Instance->LPMCSR & USB_LPMCSR_BESL) >> 2; -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->LPMCallback(hpcd, PCD_LPM_L1_ACTIVE); -#else - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else - { -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->SuspendCallback(hpcd); -#else - HAL_PCD_SuspendCallback(hpcd); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - - return; - } - - if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); - -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->SOFCallback(hpcd); -#else - HAL_PCD_SOFCallback(hpcd); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - return; - } - - if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF) - { - /* clear ESOF flag in ISTR */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); - - return; - } -} - - -/** - * @brief Data OUT stage callback. - * @param hpcd PCD handle - * @param epnum endpoint number - * @retval None - */ -__weak void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DataOutStageCallback could be implemented in the user file - */ -} - -/** - * @brief Data IN stage callback - * @param hpcd PCD handle - * @param epnum endpoint number - * @retval None - */ -__weak void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DataInStageCallback could be implemented in the user file - */ -} -/** - * @brief Setup stage callback - * @param hpcd PCD handle - * @retval None - */ -__weak void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SetupStageCallback could be implemented in the user file - */ -} - -/** - * @brief USB Start Of Frame callback. - * @param hpcd PCD handle - * @retval None - */ -__weak void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SOFCallback could be implemented in the user file - */ -} - -/** - * @brief USB Reset callback. - * @param hpcd PCD handle - * @retval None - */ -__weak void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ResetCallback could be implemented in the user file - */ -} - -/** - * @brief Suspend event callback. - * @param hpcd PCD handle - * @retval None - */ -__weak void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SuspendCallback could be implemented in the user file - */ -} - -/** - * @brief Resume event callback. - * @param hpcd PCD handle - * @retval None - */ -__weak void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ResumeCallback could be implemented in the user file - */ -} - -/** - * @brief Incomplete ISO OUT callback. - * @param hpcd PCD handle - * @param epnum endpoint number - * @retval None - */ -__weak void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ISOOUTIncompleteCallback could be implemented in the user file - */ -} - -/** - * @brief Incomplete ISO IN callback. - * @param hpcd PCD handle - * @param epnum endpoint number - * @retval None - */ -__weak void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(epnum); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ISOINIncompleteCallback could be implemented in the user file - */ -} - -/** - * @brief Connection event callback. - * @param hpcd PCD handle - * @retval None - */ -__weak void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ConnectCallback could be implemented in the user file - */ -} - -/** - * @brief Disconnection event callback. - * @param hpcd PCD handle - * @retval None - */ -__weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DisconnectCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions - * @brief management functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the PCD data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Connect the USB device - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - (void)USB_DevConnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Disconnect the USB device. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - (void)USB_DevDisconnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Set the USB Device address. - * @param hpcd PCD handle - * @param address new device address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) -{ - __HAL_LOCK(hpcd); - hpcd->USB_Address = address; - (void)USB_SetDevAddress(hpcd->Instance, address); - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} -/** - * @brief Open and configure an endpoint. - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @param ep_mps endpoint max packet size - * @param ep_type endpoint type - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, - uint16_t ep_mps, uint8_t ep_type) -{ - HAL_StatusTypeDef ret = HAL_OK; - PCD_EPTypeDef *ep; - - if ((ep_addr & 0x80U) == 0x80U) - { - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - ep->is_in = 1U; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; - ep->is_in = 0U; - } - - ep->num = ep_addr & EP_ADDR_MSK; - ep->maxpacket = ep_mps; - ep->type = ep_type; - - /* Set initial data PID. */ - if (ep_type == EP_TYPE_BULK) - { - ep->data_pid_start = 0U; - } - - __HAL_LOCK(hpcd); - (void)USB_ActivateEndpoint(hpcd->Instance, ep); - __HAL_UNLOCK(hpcd); - - return ret; -} - -/** - * @brief Deactivate an endpoint. - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - PCD_EPTypeDef *ep; - - if ((ep_addr & 0x80U) == 0x80U) - { - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - ep->is_in = 1U; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; - ep->is_in = 0U; - } - ep->num = ep_addr & EP_ADDR_MSK; - - __HAL_LOCK(hpcd); - (void)USB_DeactivateEndpoint(hpcd->Instance, ep); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - - -/** - * @brief Receive an amount of data. - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @param pBuf pointer to the reception buffer - * @param len amount of data to be received - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - PCD_EPTypeDef *ep; - - ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - ep->xfer_len = len; - ep->xfer_count = 0U; - ep->is_in = 0U; - ep->num = ep_addr & EP_ADDR_MSK; - - (void)USB_EPStartXfer(hpcd->Instance, ep); - - return HAL_OK; -} - -/** - * @brief Get Received Data Size - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @retval Data Size - */ -uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count; -} -/** - * @brief Send an amount of data - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @param pBuf pointer to the transmission buffer - * @param len amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - PCD_EPTypeDef *ep; - - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - ep->xfer_len = len; - ep->xfer_fill_db = 1U; - ep->xfer_len_db = len; - ep->xfer_count = 0U; - ep->is_in = 1U; - ep->num = ep_addr & EP_ADDR_MSK; - - (void)USB_EPStartXfer(hpcd->Instance, ep); - - return HAL_OK; -} - -/** - * @brief Set a STALL condition over an endpoint - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - PCD_EPTypeDef *ep; - - if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) - { - return HAL_ERROR; - } - - if ((0x80U & ep_addr) == 0x80U) - { - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - ep->is_in = 1U; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - ep->is_in = 0U; - } - - ep->is_stall = 1U; - ep->num = ep_addr & EP_ADDR_MSK; - - __HAL_LOCK(hpcd); - - (void)USB_EPSetStall(hpcd->Instance, ep); - - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Clear a STALL condition over in an endpoint - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - PCD_EPTypeDef *ep; - - if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) - { - return HAL_ERROR; - } - - if ((0x80U & ep_addr) == 0x80U) - { - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - ep->is_in = 1U; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; - ep->is_in = 0U; - } - - ep->is_stall = 0U; - ep->num = ep_addr & EP_ADDR_MSK; - - __HAL_LOCK(hpcd); - (void)USB_EPClearStall(hpcd->Instance, ep); - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Abort an USB EP transaction. - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - HAL_StatusTypeDef ret; - PCD_EPTypeDef *ep; - - if ((0x80U & ep_addr) == 0x80U) - { - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; - } - - /* Stop Xfer */ - ret = USB_EPStopXfer(hpcd->Instance, ep); - - return ret; -} - -/** - * @brief Flush an endpoint - * @param hpcd PCD handle - * @param ep_addr endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(ep_addr); - - return HAL_OK; -} - -/** - * @brief Activate remote wakeup signalling - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) -{ - return (USB_ActivateRemoteWakeup(hpcd->Instance)); -} - -/** - * @brief De-activate remote wakeup signalling. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) -{ - return (USB_DeActivateRemoteWakeup(hpcd->Instance)); -} - -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the PCD handle state. - * @param hpcd PCD handle - * @retval HAL state - */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd) -{ - return hpcd->State; -} - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @addtogroup PCD_Private_Functions - * @{ - */ - - -/** - * @brief This function handles PCD Endpoint interrupt request. - * @param hpcd PCD handle - * @retval HAL status - */ -static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) -{ - PCD_EPTypeDef *ep; - uint16_t count; - uint16_t wIstr; - uint16_t wEPVal; - uint16_t TxPctSize; - uint8_t epindex; - -#if (USE_USB_DOUBLE_BUFFER != 1U) - count = 0U; -#endif /* USE_USB_DOUBLE_BUFFER */ - - /* stay in loop while pending interrupts */ - while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) - { - wIstr = hpcd->Instance->ISTR; - - /* extract highest priority endpoint number */ - epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); - - if (epindex == 0U) - { - /* Decode and service control endpoint interrupt */ - - /* DIR bit = origin of the interrupt */ - if ((wIstr & USB_ISTR_DIR) == 0U) - { - /* DIR = 0 */ - - /* DIR = 0 => IN int */ - /* DIR = 0 implies that (EP_CTR_TX = 1) always */ - PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); - ep = &hpcd->IN_ep[0]; - - ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - ep->xfer_buff += ep->xfer_count; - - /* TX COMPLETE */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataInStageCallback(hpcd, 0U); -#else - HAL_PCD_DataInStageCallback(hpcd, 0U); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U)) - { - hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF); - hpcd->USB_Address = 0U; - } - } - else - { - /* DIR = 1 */ - - /* DIR = 1 & CTR_RX => SETUP or OUT int */ - /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ - ep = &hpcd->OUT_ep[0]; - wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); - - if ((wEPVal & USB_EP_SETUP) != 0U) - { - /* Get SETUP Packet */ - ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - - USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, - ep->pmaadress, (uint16_t)ep->xfer_count); - - /* SETUP bit kept frozen while CTR_RX = 1 */ - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); - - /* Process SETUP Packet*/ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->SetupStageCallback(hpcd); -#else - HAL_PCD_SetupStageCallback(hpcd); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else if ((wEPVal & USB_EP_CTR_RX) != 0U) - { - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); - - /* Get Control Data OUT Packet */ - ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - - if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, - ep->pmaadress, (uint16_t)ep->xfer_count); - - ep->xfer_buff += ep->xfer_count; - - /* Process Control Data OUT Packet */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataOutStageCallback(hpcd, 0U); -#else - HAL_PCD_DataOutStageCallback(hpcd, 0U); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - - wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); - - if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID)) - { - PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); - PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); - } - } - } - } - else - { - /* Decode and service non control endpoints interrupt */ - /* process related endpoint register */ - wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); - - if ((wEPVal & USB_EP_CTR_RX) != 0U) - { - /* clear int flag */ - PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); - ep = &hpcd->OUT_ep[epindex]; - - /* OUT Single Buffering */ - if (ep->doublebuffer == 0U) - { - count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); - - if (count != 0U) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); - } - } -#if (USE_USB_DOUBLE_BUFFER == 1U) - else - { - /* manage double buffer bulk out */ - if (ep->type == EP_TYPE_BULK) - { - count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal); - } - else /* manage double buffer iso out */ - { - /* free EP OUT Buffer */ - PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); - - if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U) - { - /* read from endpoint BUF0Addr buffer */ - count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); - - if (count != 0U) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); - } - } - else - { - /* read from endpoint BUF1Addr buffer */ - count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); - - if (count != 0U) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); - } - } - } - } -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - - /* multi-packet on the NON control OUT endpoint */ - ep->xfer_count += count; - ep->xfer_buff += count; - - if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) - { - /* RX COMPLETE */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataOutStageCallback(hpcd, ep->num); -#else - HAL_PCD_DataOutStageCallback(hpcd, ep->num); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else - { - (void)USB_EPStartXfer(hpcd->Instance, ep); - } - } - - if ((wEPVal & USB_EP_CTR_TX) != 0U) - { - ep = &hpcd->IN_ep[epindex]; - - /* clear int flag */ - PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); - - if (ep->type == EP_TYPE_ISOC) - { - ep->xfer_len = 0U; - -#if (USE_USB_DOUBLE_BUFFER == 1U) - if (ep->doublebuffer != 0U) - { - if ((wEPVal & USB_EP_DTOG_TX) != 0U) - { - PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); - } - else - { - PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); - } - } -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - - /* TX COMPLETE */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataInStageCallback(hpcd, ep->num); -#else - HAL_PCD_DataInStageCallback(hpcd, ep->num); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else - { - /* Manage Single Buffer Transaction */ - if ((wEPVal & USB_EP_KIND) == 0U) - { - /* multi-packet on the NON control IN endpoint */ - TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); - - if (ep->xfer_len > TxPctSize) - { - ep->xfer_len -= TxPctSize; - } - else - { - ep->xfer_len = 0U; - } - - /* Zero Length Packet? */ - if (ep->xfer_len == 0U) - { - /* TX COMPLETE */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataInStageCallback(hpcd, ep->num); -#else - HAL_PCD_DataInStageCallback(hpcd, ep->num); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else - { - /* Transfer is not yet Done */ - ep->xfer_buff += TxPctSize; - ep->xfer_count += TxPctSize; - (void)USB_EPStartXfer(hpcd->Instance, ep); - } - } -#if (USE_USB_DOUBLE_BUFFER == 1U) - /* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */ - else - { - (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal); - } -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - } - } - } - } - - return HAL_OK; -} - - -#if (USE_USB_DOUBLE_BUFFER == 1U) -/** - * @brief Manage double buffer bulk out transaction from ISR - * @param hpcd PCD handle - * @param ep current endpoint handle - * @param wEPVal Last snapshot of EPRx register value taken in ISR - * @retval HAL status - */ -static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, - PCD_EPTypeDef *ep, uint16_t wEPVal) -{ - uint16_t count; - - /* Manage Buffer0 OUT */ - if ((wEPVal & USB_EP_DTOG_RX) != 0U) - { - /* Get count of received Data on buffer0 */ - count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); - - if (ep->xfer_len >= count) - { - ep->xfer_len -= count; - } - else - { - ep->xfer_len = 0U; - } - - if (ep->xfer_len == 0U) - { - /* set NAK to OUT endpoint since double buffer is enabled */ - PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); - } - - /* Check if Buffer1 is in blocked state which requires to toggle */ - if ((wEPVal & USB_EP_DTOG_TX) != 0U) - { - PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); - } - - if (count != 0U) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); - } - } - /* Manage Buffer 1 DTOG_RX=0 */ - else - { - /* Get count of received data */ - count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); - - if (ep->xfer_len >= count) - { - ep->xfer_len -= count; - } - else - { - ep->xfer_len = 0U; - } - - if (ep->xfer_len == 0U) - { - /* set NAK on the current endpoint */ - PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK); - } - - /*Need to FreeUser Buffer*/ - if ((wEPVal & USB_EP_DTOG_TX) == 0U) - { - PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); - } - - if (count != 0U) - { - USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); - } - } - - return count; -} - - -/** - * @brief Manage double buffer bulk IN transaction from ISR - * @param hpcd PCD handle - * @param ep current endpoint handle - * @param wEPVal Last snapshot of EPRx register value taken in ISR - * @retval HAL status - */ -static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, - PCD_EPTypeDef *ep, uint16_t wEPVal) -{ - uint32_t len; - uint16_t TxPctSize; - - /* Data Buffer0 ACK received */ - if ((wEPVal & USB_EP_DTOG_TX) != 0U) - { - /* multi-packet on the NON control IN endpoint */ - TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); - - if (ep->xfer_len > TxPctSize) - { - ep->xfer_len -= TxPctSize; - } - else - { - ep->xfer_len = 0U; - } - - /* Transfer is completed */ - if (ep->xfer_len == 0U) - { - PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); - PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); - - /* TX COMPLETE */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataInStageCallback(hpcd, ep->num); -#else - HAL_PCD_DataInStageCallback(hpcd, ep->num); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - if ((wEPVal & USB_EP_DTOG_RX) != 0U) - { - PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); - } - } - else /* Transfer is not yet Done */ - { - /* need to Free USB Buff */ - if ((wEPVal & USB_EP_DTOG_RX) != 0U) - { - PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); - } - - /* Still there is data to Fill in the next Buffer */ - if (ep->xfer_fill_db == 1U) - { - ep->xfer_buff += TxPctSize; - ep->xfer_count += TxPctSize; - - /* Calculate the len of the new buffer to fill */ - if (ep->xfer_len_db >= ep->maxpacket) - { - len = ep->maxpacket; - ep->xfer_len_db -= len; - } - else if (ep->xfer_len_db == 0U) - { - len = TxPctSize; - ep->xfer_fill_db = 0U; - } - else - { - ep->xfer_fill_db = 0U; - len = ep->xfer_len_db; - ep->xfer_len_db = 0U; - } - - /* Write remaining Data to Buffer */ - /* Set the Double buffer counter for pma buffer1 */ - PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len); - - /* Copy user buffer to USB PMA */ - USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len); - } - } - } - else /* Data Buffer1 ACK received */ - { - /* multi-packet on the NON control IN endpoint */ - TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); - - if (ep->xfer_len >= TxPctSize) - { - ep->xfer_len -= TxPctSize; - } - else - { - ep->xfer_len = 0U; - } - - /* Transfer is completed */ - if (ep->xfer_len == 0U) - { - PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); - PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); - - /* TX COMPLETE */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataInStageCallback(hpcd, ep->num); -#else - HAL_PCD_DataInStageCallback(hpcd, ep->num); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - - /* need to Free USB Buff */ - if ((wEPVal & USB_EP_DTOG_RX) == 0U) - { - PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); - } - } - else /* Transfer is not yet Done */ - { - /* need to Free USB Buff */ - if ((wEPVal & USB_EP_DTOG_RX) == 0U) - { - PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); - } - - /* Still there is data to Fill in the next Buffer */ - if (ep->xfer_fill_db == 1U) - { - ep->xfer_buff += TxPctSize; - ep->xfer_count += TxPctSize; - - /* Calculate the len of the new buffer to fill */ - if (ep->xfer_len_db >= ep->maxpacket) - { - len = ep->maxpacket; - ep->xfer_len_db -= len; - } - else if (ep->xfer_len_db == 0U) - { - len = TxPctSize; - ep->xfer_fill_db = 0U; - } - else - { - len = ep->xfer_len_db; - ep->xfer_len_db = 0U; - ep->xfer_fill_db = 0; - } - - /* Set the Double buffer counter for pmabuffer1 */ - PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len); - - /* Copy the user buffer to USB PMA */ - USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len); - } - } - } - - /*enable endpoint IN*/ - PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID); - - return HAL_OK; -} -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - - - -/** - * @} - */ -#endif /* defined (USB) */ -#endif /* HAL_PCD_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c b/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c deleted file mode 100644 index f24dea0..0000000 --- a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c +++ /dev/null @@ -1,333 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f0xx_hal_pcd_ex.c - * @author MCD Application Team - * @brief PCD Extended HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Extended features functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f0xx_hal.h" - -/** @addtogroup STM32F0xx_HAL_Driver - * @{ - */ - -/** @defgroup PCDEx PCDEx - * @brief PCD Extended HAL module driver - * @{ - */ - -#ifdef HAL_PCD_MODULE_ENABLED - -#if defined (USB) -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions - * @{ - */ - -/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions - * @brief PCDEx control functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Update FIFO configuration - -@endverbatim - * @{ - */ - -/** - * @brief Configure PMA for EP - * @param hpcd Device instance - * @param ep_addr endpoint address - * @param ep_kind endpoint Kind - * USB_SNG_BUF: Single Buffer used - * USB_DBL_BUF: Double Buffer used - * @param pmaadress: EP address in The PMA: In case of single buffer endpoint - * this parameter is 16-bit value providing the address - * in PMA allocated to endpoint. - * In case of double buffer endpoint this parameter - * is a 32-bit value providing the endpoint buffer 0 address - * in the LSB part of 32-bit value and endpoint buffer 1 address - * in the MSB part of 32-bit value. - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr, - uint16_t ep_kind, uint32_t pmaadress) -{ - PCD_EPTypeDef *ep; - - /* initialize ep structure*/ - if ((0x80U & ep_addr) == 0x80U) - { - ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - } - - /* Here we check if the endpoint is single or double Buffer*/ - if (ep_kind == PCD_SNG_BUF) - { - /* Single Buffer */ - ep->doublebuffer = 0U; - /* Configure the PMA */ - ep->pmaadress = (uint16_t)pmaadress; - } -#if (USE_USB_DOUBLE_BUFFER == 1U) - else /* USB_DBL_BUF */ - { - /* Double Buffer Endpoint */ - ep->doublebuffer = 1U; - /* Configure the PMA */ - ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); - ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); - } -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - - return HAL_OK; -} - -/** - * @brief Activate BatteryCharging feature. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - hpcd->battery_charging_active = 1U; - - /* Enable BCD feature */ - USBx->BCDR |= USB_BCDR_BCDEN; - - /* Enable DCD : Data Contact Detect */ - USBx->BCDR &= ~(USB_BCDR_PDEN); - USBx->BCDR &= ~(USB_BCDR_SDEN); - USBx->BCDR |= USB_BCDR_DCDEN; - - return HAL_OK; -} - -/** - * @brief Deactivate BatteryCharging feature. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - hpcd->battery_charging_active = 0U; - - /* Disable BCD feature */ - USBx->BCDR &= ~(USB_BCDR_BCDEN); - - return HAL_OK; -} - -/** - * @brief Handle BatteryCharging Process. - * @param hpcd PCD handle - * @retval HAL status - */ -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - uint32_t tickstart = HAL_GetTick(); - - /* Wait for Min DCD Timeout */ - HAL_Delay(300U); - - /* Data Pin Contact ? Check Detect flag */ - if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET) - { -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION); -#else - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - /* Primary detection: checks if connected to Standard Downstream Port - (without charging capability) */ - USBx->BCDR &= ~(USB_BCDR_DCDEN); - HAL_Delay(50U); - USBx->BCDR |= (USB_BCDR_PDEN); - HAL_Delay(50U); - - /* If Charger detect ? */ - if ((USBx->BCDR & USB_BCDR_PDET) == USB_BCDR_PDET) - { - /* Start secondary detection to check connection to Charging Downstream - Port or Dedicated Charging Port */ - USBx->BCDR &= ~(USB_BCDR_PDEN); - HAL_Delay(50U); - USBx->BCDR |= (USB_BCDR_SDEN); - HAL_Delay(50U); - - /* If CDP ? */ - if ((USBx->BCDR & USB_BCDR_SDET) == USB_BCDR_SDET) - { - /* Dedicated Downstream Port DCP */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->BCDCallback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); -#else - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else - { - /* Charging Downstream Port CDP */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->BCDCallback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); -#else - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - } - else /* NO */ - { - /* Standard Downstream Port */ -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->BCDCallback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); -#else - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - - /* Battery Charging capability discovery finished Start Enumeration */ - (void)HAL_PCDEx_DeActivateBCD(hpcd); - - /* Check for the Timeout, else start USB Device */ - if ((HAL_GetTick() - tickstart) > 1000U) - { -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->BCDCallback(hpcd, PCD_BCD_ERROR); -#else - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else - { -#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->BCDCallback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); -#else - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); -#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } -} - - -/** - * @brief Activate LPM feature. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) -{ - - USB_TypeDef *USBx = hpcd->Instance; - hpcd->lpm_active = 1U; - hpcd->LPM_State = LPM_L0; - - USBx->LPMCSR |= USB_LPMCSR_LMPEN; - USBx->LPMCSR |= USB_LPMCSR_LPMACK; - - return HAL_OK; -} - -/** - * @brief Deactivate LPM feature. - * @param hpcd PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) -{ - USB_TypeDef *USBx = hpcd->Instance; - - hpcd->lpm_active = 0U; - - USBx->LPMCSR &= ~(USB_LPMCSR_LMPEN); - USBx->LPMCSR &= ~(USB_LPMCSR_LPMACK); - - return HAL_OK; -} - - - -/** - * @brief Send LPM message to user layer callback. - * @param hpcd PCD handle - * @param msg LPM message - * @retval HAL status - */ -__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(msg); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCDEx_LPM_Callback could be implemented in the user file - */ -} - -/** - * @brief Send BatteryCharging message to user layer callback. - * @param hpcd PCD handle - * @param msg LPM message - * @retval HAL status - */ -__weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(hpcd); - UNUSED(msg); - - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCDEx_BCD_Callback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** - * @} - */ -#endif /* defined (USB) */ -#endif /* HAL_PCD_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c b/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c deleted file mode 100644 index bd6c05a..0000000 --- a/mihome_bridge/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c +++ /dev/null @@ -1,874 +0,0 @@ -/** - ****************************************************************************** - * @file stm32f0xx_ll_usb.c - * @author MCD Application Team - * @brief USB Low Layer HAL module driver. - * - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Initialization/de-initialization functions - * + I/O operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - ****************************************************************************** - * @attention - * - * Copyright (c) 2016 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Fill parameters of Init structure in USB_CfgTypeDef structure. - - (#) Call USB_CoreInit() API to initialize the USB Core peripheral. - - (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes. - - @endverbatim - - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f0xx_hal.h" - -/** @addtogroup STM32F0xx_LL_USB_DRIVER - * @{ - */ - -#if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) -#if defined (USB) -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/** - * @brief Initializes the USB Core - * @param USBx USB Instance - * @param cfg pointer to a USB_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(cfg); - - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - - return HAL_OK; -} - -/** - * @brief USB_EnableGlobalInt - * Enables the controller's Global Int in the AHB Config reg - * @param USBx Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) -{ - uint32_t winterruptmask; - - /* Clear pending interrupts */ - USBx->ISTR = 0U; - - /* Set winterruptmask variable */ - winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | - USB_CNTR_SUSPM | USB_CNTR_ERRM | - USB_CNTR_SOFM | USB_CNTR_ESOFM | - USB_CNTR_RESETM | USB_CNTR_L1REQM; - - /* Set interrupt mask */ - USBx->CNTR = (uint16_t)winterruptmask; - - return HAL_OK; -} - -/** - * @brief USB_DisableGlobalInt - * Disable the controller's Global Int in the AHB Config reg - * @param USBx Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) -{ - uint32_t winterruptmask; - - /* Set winterruptmask variable */ - winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | - USB_CNTR_SUSPM | USB_CNTR_ERRM | - USB_CNTR_SOFM | USB_CNTR_ESOFM | - USB_CNTR_RESETM | USB_CNTR_L1REQM; - - /* Clear interrupt mask */ - USBx->CNTR &= (uint16_t)(~winterruptmask); - - return HAL_OK; -} - -/** - * @brief USB_SetCurrentMode Set functional mode - * @param USBx Selected device - * @param mode current core mode - * This parameter can be one of the these values: - * @arg USB_DEVICE_MODE Peripheral mode - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(USBx); - UNUSED(mode); - - /* NOTE : - This function is not required by USB Device FS peripheral, it is used - only by USB OTG FS peripheral. - - This function is added to ensure compatibility across platforms. - */ - return HAL_OK; -} - -/** - * @brief USB_DevInit Initializes the USB controller registers - * for device mode - * @param USBx Selected device - * @param cfg pointer to a USB_CfgTypeDef structure that contains - * the configuration information for the specified USBx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) -{ - /* Prevent unused argument(s) compilation warning */ - UNUSED(cfg); - - /* Init Device */ - /* CNTR_FRES = 1 */ - USBx->CNTR = (uint16_t)USB_CNTR_FRES; - - /* CNTR_FRES = 0 */ - USBx->CNTR = 0U; - - /* Clear pending interrupts */ - USBx->ISTR = 0U; - - /*Set Btable Address*/ - USBx->BTABLE = BTABLE_ADDRESS; - - return HAL_OK; -} - -#if defined (HAL_PCD_MODULE_ENABLED) -/** - * @brief Activate and configure an endpoint - * @param USBx Selected device - * @param ep pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - HAL_StatusTypeDef ret = HAL_OK; - uint16_t wEpRegVal; - - wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK; - - /* initialize Endpoint */ - switch (ep->type) - { - case EP_TYPE_CTRL: - wEpRegVal |= USB_EP_CONTROL; - break; - - case EP_TYPE_BULK: - wEpRegVal |= USB_EP_BULK; - break; - - case EP_TYPE_INTR: - wEpRegVal |= USB_EP_INTERRUPT; - break; - - case EP_TYPE_ISOC: - wEpRegVal |= USB_EP_ISOCHRONOUS; - break; - - default: - ret = HAL_ERROR; - break; - } - - PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); - - PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); - - if (ep->doublebuffer == 0U) - { - if (ep->is_in != 0U) - { - /*Set the endpoint Transmit buffer address */ - PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - if (ep->type != EP_TYPE_ISOC) - { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - } - else - { - /* Configure TX Endpoint to disabled state */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - } - else - { - /* Set the endpoint Receive buffer address */ - PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); - - /* Set the endpoint Receive buffer counter */ - PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); - PCD_CLEAR_RX_DTOG(USBx, ep->num); - - if (ep->num == 0U) - { - /* Configure VALID status for EP0 */ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - } - else - { - /* Configure NAK status for OUT Endpoint */ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK); - } - } - } -#if (USE_USB_DOUBLE_BUFFER == 1U) - /* Double Buffer */ - else - { - if (ep->type == EP_TYPE_BULK) - { - /* Set bulk endpoint as double buffered */ - PCD_SET_BULK_EP_DBUF(USBx, ep->num); - } - else - { - /* Set the ISOC endpoint in double buffer mode */ - PCD_CLEAR_EP_KIND(USBx, ep->num); - } - - /* Set buffer address for double buffered mode */ - PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); - - if (ep->is_in == 0U) - { - /* Clear the data toggle bits for the endpoint IN/OUT */ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - else - { - /* Clear the data toggle bits for the endpoint IN/OUT */ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - if (ep->type != EP_TYPE_ISOC) - { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - } - else - { - /* Configure TX Endpoint to disabled state */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - - return ret; -} - -/** - * @brief De-activate and de-initialize an endpoint - * @param USBx Selected device - * @param ep pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - if (ep->doublebuffer == 0U) - { - if (ep->is_in != 0U) - { - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - /* Configure DISABLE status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - - else - { - PCD_CLEAR_RX_DTOG(USBx, ep->num); - - /* Configure DISABLE status for the Endpoint */ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } -#if (USE_USB_DOUBLE_BUFFER == 1U) - /* Double Buffer */ - else - { - if (ep->is_in == 0U) - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - /* Reset value of the data toggle bits for the endpoint out*/ - PCD_TX_DTOG(USBx, ep->num); - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - else - { - /* Clear the data toggle bits for the endpoint IN/OUT*/ - PCD_CLEAR_RX_DTOG(USBx, ep->num); - PCD_CLEAR_TX_DTOG(USBx, ep->num); - PCD_RX_DTOG(USBx, ep->num); - - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - - return HAL_OK; -} - -/** - * @brief USB_EPStartXfer setup and starts a transfer over an EP - * @param USBx Selected device - * @param ep pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - uint32_t len; -#if (USE_USB_DOUBLE_BUFFER == 1U) - uint16_t pmabuffer; - uint16_t wEPVal; -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - - /* IN endpoint */ - if (ep->is_in == 1U) - { - /*Multi packet transfer*/ - if (ep->xfer_len > ep->maxpacket) - { - len = ep->maxpacket; - } - else - { - len = ep->xfer_len; - } - - /* configure and validate Tx endpoint */ - if (ep->doublebuffer == 0U) - { - USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); - PCD_SET_EP_TX_CNT(USBx, ep->num, len); - } -#if (USE_USB_DOUBLE_BUFFER == 1U) - else - { - /* double buffer bulk management */ - if (ep->type == EP_TYPE_BULK) - { - if (ep->xfer_len_db > ep->maxpacket) - { - /* enable double buffer */ - PCD_SET_BULK_EP_DBUF(USBx, ep->num); - - /* each Time to write in PMA xfer_len_db will */ - ep->xfer_len_db -= len; - - /* Fill the two first buffer in the Buffer0 & Buffer1 */ - if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) - { - /* Set the Double buffer counter for pmabuffer1 */ - PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr1; - - /* Write the user buffer to USB PMA */ - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - ep->xfer_buff += len; - - if (ep->xfer_len_db > ep->maxpacket) - { - ep->xfer_len_db -= len; - } - else - { - len = ep->xfer_len_db; - ep->xfer_len_db = 0U; - } - - /* Set the Double buffer counter for pmabuffer0 */ - PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr0; - - /* Write the user buffer to USB PMA */ - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - } - else - { - /* Set the Double buffer counter for pmabuffer0 */ - PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr0; - - /* Write the user buffer to USB PMA */ - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - ep->xfer_buff += len; - - if (ep->xfer_len_db > ep->maxpacket) - { - ep->xfer_len_db -= len; - } - else - { - len = ep->xfer_len_db; - ep->xfer_len_db = 0U; - } - - /* Set the Double buffer counter for pmabuffer1 */ - PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr1; - - /* Write the user buffer to USB PMA */ - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - } - } - /* auto Switch to single buffer mode when transfer xfer_len_db; - - /* disable double buffer mode for Bulk endpoint */ - PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num); - - /* Set Tx count with nbre of byte to be transmitted */ - PCD_SET_EP_TX_CNT(USBx, ep->num, len); - pmabuffer = ep->pmaaddr0; - - /* Write the user buffer to USB PMA */ - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - } - } - else /* manage isochronous double buffer IN mode */ - { - /* each Time to write in PMA xfer_len_db will */ - ep->xfer_len_db -= len; - - /* Fill the data buffer */ - if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) - { - /* Set the Double buffer counter for pmabuffer1 */ - PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr1; - - /* Write the user buffer to USB PMA */ - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - } - else - { - /* Set the Double buffer counter for pmabuffer0 */ - PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr0; - - /* Write the user buffer to USB PMA */ - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - } - } - } -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); - } - else /* OUT endpoint */ - { - if (ep->doublebuffer == 0U) - { - /* Multi packet transfer */ - if (ep->xfer_len > ep->maxpacket) - { - len = ep->maxpacket; - ep->xfer_len -= len; - } - else - { - len = ep->xfer_len; - ep->xfer_len = 0U; - } - /* configure and validate Rx endpoint */ - PCD_SET_EP_RX_CNT(USBx, ep->num, len); - } -#if (USE_USB_DOUBLE_BUFFER == 1U) - else - { - /* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */ - /* Set the Double buffer counter */ - if (ep->type == EP_TYPE_BULK) - { - PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket); - - /* Coming from ISR */ - if (ep->xfer_count != 0U) - { - /* update last value to check if there is blocking state */ - wEPVal = PCD_GET_ENDPOINT(USBx, ep->num); - - /*Blocking State */ - if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || - (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) - { - PCD_FREE_USER_BUFFER(USBx, ep->num, 0U); - } - } - } - /* iso out double */ - else if (ep->type == EP_TYPE_ISOC) - { - /* Multi packet transfer */ - if (ep->xfer_len > ep->maxpacket) - { - len = ep->maxpacket; - ep->xfer_len -= len; - } - else - { - len = ep->xfer_len; - ep->xfer_len = 0U; - } - PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); - } - else - { - return HAL_ERROR; - } - } -#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - } - - return HAL_OK; -} - - -/** - * @brief USB_EPSetStall set a stall condition over an EP - * @param USBx Selected device - * @param ep pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - if (ep->is_in != 0U) - { - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL); - } - else - { - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL); - } - - return HAL_OK; -} - -/** - * @brief USB_EPClearStall Clear a stall condition over an EP - * @param USBx Selected device - * @param ep pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - if (ep->doublebuffer == 0U) - { - if (ep->is_in != 0U) - { - PCD_CLEAR_TX_DTOG(USBx, ep->num); - - if (ep->type != EP_TYPE_ISOC) - { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - } - } - else - { - PCD_CLEAR_RX_DTOG(USBx, ep->num); - - /* Configure VALID status for the Endpoint */ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); - } - } - - return HAL_OK; -} - -/** - * @brief USB_EPStoptXfer Stop transfer on an EP - * @param USBx usb device instance - * @param ep pointer to endpoint structure - * @retval HAL status - */ -HAL_StatusTypeDef USB_EPStopXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) -{ - /* IN endpoint */ - if (ep->is_in == 1U) - { - if (ep->doublebuffer == 0U) - { - if (ep->type != EP_TYPE_ISOC) - { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); - } - else - { - /* Configure TX Endpoint to disabled state */ - PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); - } - } - } - else /* OUT endpoint */ - { - if (ep->doublebuffer == 0U) - { - if (ep->type != EP_TYPE_ISOC) - { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK); - } - else - { - /* Configure RX Endpoint to disabled state */ - PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); - } - } - } - - return HAL_OK; -} -#endif /* defined (HAL_PCD_MODULE_ENABLED) */ - -/** - * @brief USB_StopDevice Stop the usb device mode - * @param USBx Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx) -{ - /* disable all interrupts and force USB reset */ - USBx->CNTR = (uint16_t)USB_CNTR_FRES; - - /* clear interrupt status register */ - USBx->ISTR = 0U; - - /* switch-off device */ - USBx->CNTR = (uint16_t)(USB_CNTR_FRES | USB_CNTR_PDWN); - - return HAL_OK; -} - -/** - * @brief USB_SetDevAddress Stop the usb device mode - * @param USBx Selected device - * @param address new device address to be assigned - * This parameter can be a value from 0 to 255 - * @retval HAL status - */ -HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address) -{ - if (address == 0U) - { - /* set device address and enable function */ - USBx->DADDR = (uint16_t)USB_DADDR_EF; - } - - return HAL_OK; -} - -/** - * @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down - * @param USBx Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx) -{ - /* Enabling DP Pull-UP bit to Connect internal PU resistor on USB DP line */ - USBx->BCDR |= (uint16_t)USB_BCDR_DPPU; - - return HAL_OK; -} - -/** - * @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down - * @param USBx Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) -{ - /* Disable DP Pull-Up bit to disconnect the Internal PU resistor on USB DP line */ - USBx->BCDR &= (uint16_t)(~(USB_BCDR_DPPU)); - - return HAL_OK; -} - -/** - * @brief USB_ReadInterrupts return the global USB interrupt status - * @param USBx Selected device - * @retval USB Global Interrupt status - */ -uint32_t USB_ReadInterrupts(USB_TypeDef *USBx) -{ - uint32_t tmpreg; - - tmpreg = USBx->ISTR; - return tmpreg; -} - -/** - * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling - * @param USBx Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx) -{ - USBx->CNTR |= (uint16_t)USB_CNTR_RESUME; - - return HAL_OK; -} - -/** - * @brief USB_DeActivateRemoteWakeup de-active remote wakeup signalling - * @param USBx Selected device - * @retval HAL status - */ -HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx) -{ - USBx->CNTR &= (uint16_t)(~USB_CNTR_RESUME); - - return HAL_OK; -} - -/** - * @brief Copy a buffer from user memory area to packet memory area (PMA) - * @param USBx USB peripheral instance register address. - * @param pbUsrBuf pointer to user memory area. - * @param wPMABufAddr address into PMA. - * @param wNBytes no. of bytes to be copied. - * @retval None - */ -void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; - uint32_t BaseAddr = (uint32_t)USBx; - uint32_t count; - uint16_t WrVal; - __IO uint16_t *pdwVal; - uint8_t *pBuf = pbUsrBuf; - - pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); - - for (count = n; count != 0U; count--) - { - WrVal = pBuf[0]; - WrVal |= (uint16_t)pBuf[1] << 8; - *pdwVal = (WrVal & 0xFFFFU); - pdwVal++; - -#if PMA_ACCESS > 1U - pdwVal++; -#endif /* PMA_ACCESS */ - - pBuf++; - pBuf++; - } -} - -/** - * @brief Copy data from packet memory area (PMA) to user memory buffer - * @param USBx USB peripheral instance register address. - * @param pbUsrBuf pointer to user memory area. - * @param wPMABufAddr address into PMA. - * @param wNBytes no. of bytes to be copied. - * @retval None - */ -void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = (uint32_t)wNBytes >> 1; - uint32_t BaseAddr = (uint32_t)USBx; - uint32_t count; - uint32_t RdVal; - __IO uint16_t *pdwVal; - uint8_t *pBuf = pbUsrBuf; - - pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); - - for (count = n; count != 0U; count--) - { - RdVal = *(__IO uint16_t *)pdwVal; - pdwVal++; - *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); - pBuf++; - *pBuf = (uint8_t)((RdVal >> 8) & 0xFFU); - pBuf++; - -#if PMA_ACCESS > 1U - pdwVal++; -#endif /* PMA_ACCESS */ - } - - if ((wNBytes % 2U) != 0U) - { - RdVal = *pdwVal; - *pBuf = (uint8_t)((RdVal >> 0) & 0xFFU); - } -} - - -/** - * @} - */ - -/** - * @} - */ -#endif /* defined (USB) */ -#endif /* defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) */ - -/** - * @} - */ diff --git a/mihome_bridge/MDK-ARM/mihome_bridge.uvoptx b/mihome_bridge/MDK-ARM/mihome_bridge.uvoptx index 830421a..566c6fb 100644 --- a/mihome_bridge/MDK-ARM/mihome_bridge.uvoptx +++ b/mihome_bridge/MDK-ARM/mihome_bridge.uvoptx @@ -263,6 +263,18 @@ 0 0 0 + ..\Core\Src\bsp_key_in_out.c + bsp_key_in_out.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 ../Core/Src/main.c main.c 0 @@ -270,7 +282,7 @@ 2 - 5 + 6 1 0 0 @@ -282,7 +294,7 @@ 2 - 6 + 7 1 0 0 @@ -296,22 +308,10 @@ Drivers/STM32F0xx_HAL_Driver - 0 + 1 0 0 0 - - 3 - 7 - 1 - 0 - 0 - 0 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c - stm32f0xx_ll_usb.c - 0 - 0 - 3 8 @@ -343,30 +343,6 @@ 0 0 0 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c - stm32f0xx_hal_uart.c - 0 - 0 - - - 3 - 11 - 1 - 0 - 0 - 0 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c - stm32f0xx_hal_uart_ex.c - 0 - 0 - - - 3 - 12 - 1 - 0 - 0 - 0 ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c stm32f0xx_hal_rcc.c 0 @@ -374,7 +350,7 @@ 3 - 13 + 11 1 0 0 @@ -386,7 +362,7 @@ 3 - 14 + 12 1 0 0 @@ -398,7 +374,7 @@ 3 - 15 + 13 1 0 0 @@ -410,7 +386,7 @@ 3 - 16 + 14 1 0 0 @@ -422,7 +398,7 @@ 3 - 17 + 15 1 0 0 @@ -434,7 +410,7 @@ 3 - 18 + 16 1 0 0 @@ -446,7 +422,7 @@ 3 - 19 + 17 1 0 0 @@ -458,7 +434,7 @@ 3 - 20 + 18 1 0 0 @@ -470,7 +446,7 @@ 3 - 21 + 19 1 0 0 @@ -482,7 +458,7 @@ 3 - 22 + 20 1 0 0 @@ -494,7 +470,7 @@ 3 - 23 + 21 1 0 0 @@ -506,7 +482,7 @@ 3 - 24 + 22 1 0 0 @@ -518,25 +494,25 @@ 3 - 25 + 23 1 0 0 0 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c - stm32f0xx_hal_pcd.c + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c + stm32f0xx_hal_uart.c 0 0 3 - 26 + 24 1 0 0 0 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c - stm32f0xx_hal_pcd_ex.c + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c + stm32f0xx_hal_uart_ex.c 0 0 @@ -550,7 +526,7 @@ 0 4 - 27 + 25 1 0 0 @@ -564,13 +540,13 @@ 3rdParty/cherryusb - 1 + 0 0 0 0 5 - 28 + 26 1 0 0 @@ -582,7 +558,7 @@ 5 - 29 + 27 1 0 0 @@ -594,7 +570,7 @@ 5 - 30 + 28 1 0 0 diff --git a/mihome_bridge/MDK-ARM/mihome_bridge.uvprojx b/mihome_bridge/MDK-ARM/mihome_bridge.uvprojx index feb835f..1adead8 100644 --- a/mihome_bridge/MDK-ARM/mihome_bridge.uvprojx +++ b/mihome_bridge/MDK-ARM/mihome_bridge.uvprojx @@ -403,6 +403,11 @@ 5 ..\Core\Inc\usb_config.h + + bsp_key_in_out.c + 1 + ..\Core\Src\bsp_key_in_out.c + main.c 1 @@ -423,11 +428,6 @@ Drivers/STM32F0xx_HAL_Driver - - stm32f0xx_ll_usb.c - 1 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c - stm32f0xx_hal_tim.c 1 @@ -438,16 +438,6 @@ 1 ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c - - stm32f0xx_hal_uart.c - 1 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c - - - stm32f0xx_hal_uart_ex.c - 1 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c - stm32f0xx_hal_rcc.c 1 @@ -514,14 +504,14 @@ ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c - stm32f0xx_hal_pcd.c + stm32f0xx_hal_uart.c 1 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c - stm32f0xx_hal_pcd_ex.c + stm32f0xx_hal_uart_ex.c 1 - ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c + ../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c diff --git a/mihome_bridge/mihome_bridge.ioc b/mihome_bridge/mihome_bridge.ioc index 3fdeb37..5992590 100644 --- a/mihome_bridge/mihome_bridge.ioc +++ b/mihome_bridge/mihome_bridge.ioc @@ -10,73 +10,53 @@ Mcu.Family=STM32F0 Mcu.IP0=NVIC Mcu.IP1=RCC Mcu.IP2=SYS -Mcu.IP3=USART1 -Mcu.IP4=USB +Mcu.IP3=TIM6 +Mcu.IP4=USART1 Mcu.IPNb=5 Mcu.Name=STM32F072C(8-B)Tx Mcu.Package=LQFP48 Mcu.Pin0=PF0-OSC_IN Mcu.Pin1=PF1-OSC_OUT -Mcu.Pin10=PB12 -Mcu.Pin11=PB13 -Mcu.Pin12=PB14 -Mcu.Pin13=PB15 -Mcu.Pin14=PA8 -Mcu.Pin15=PA9 -Mcu.Pin16=PA10 -Mcu.Pin17=PA11 -Mcu.Pin18=PA12 -Mcu.Pin19=PA13 -Mcu.Pin2=PA0 -Mcu.Pin20=PA14 -Mcu.Pin21=PA15 -Mcu.Pin22=PB3 -Mcu.Pin23=PB4 -Mcu.Pin24=PB5 -Mcu.Pin25=PB6 -Mcu.Pin26=PB7 -Mcu.Pin27=PB8 -Mcu.Pin28=PB9 -Mcu.Pin29=VP_SYS_VS_Systick -Mcu.Pin3=PA1 -Mcu.Pin4=PA2 -Mcu.Pin5=PA3 -Mcu.Pin6=PA4 -Mcu.Pin7=PA5 -Mcu.Pin8=PA6 -Mcu.Pin9=PA7 -Mcu.PinsNb=30 +Mcu.Pin10=PA8 +Mcu.Pin11=PA9 +Mcu.Pin12=PA10 +Mcu.Pin13=PA11 +Mcu.Pin14=PA12 +Mcu.Pin15=PA13 +Mcu.Pin16=PA14 +Mcu.Pin17=PB6 +Mcu.Pin18=PB7 +Mcu.Pin19=PB8 +Mcu.Pin2=PA4 +Mcu.Pin20=PB9 +Mcu.Pin21=VP_SYS_VS_Systick +Mcu.Pin22=VP_TIM6_VS_ClockSourceINT +Mcu.Pin3=PA5 +Mcu.Pin4=PA6 +Mcu.Pin5=PA7 +Mcu.Pin6=PB12 +Mcu.Pin7=PB13 +Mcu.Pin8=PB14 +Mcu.Pin9=PB15 +Mcu.PinsNb=23 Mcu.ThirdPartyNb=0 -Mcu.UserConstants= +Mcu.UserConstants=BSP_KEY_IN_OUT_INTERAEL_MS,10;BSP_KEY_IN_OUT_TIM,$$_TIM6_IP_HANDLE_$$ Mcu.UserName=STM32F072C8Tx -MxCube.Version=6.11.0 -MxDb.Version=DB.6.0.110 +MxCube.Version=6.11.1 +MxDb.Version=DB.6.0.111 NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true\:false -PA0.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PA0.GPIO_Label=KEY8 -PA0.GPIO_Mode=GPIO_MODE_INPUT -PA0.GPIO_PuPd=GPIO_PULLUP -PA0.Locked=true -PA0.Signal=GPIO_Input -PA1.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PA1.GPIO_Label=KEY7 -PA1.GPIO_Mode=GPIO_MODE_INPUT -PA1.GPIO_PuPd=GPIO_PULLUP -PA1.Locked=true -PA1.Signal=GPIO_Input +NVIC.TIM6_DAC_IRQn=true\:1\:0\:true\:false\:true\:true\:true\:true PA10.Locked=true PA10.Mode=Asynchronous PA10.Signal=USART1_RX PA11.Locked=true -PA11.Mode=Device PA11.Signal=USB_DM PA12.Locked=true -PA12.Mode=Device PA12.Signal=USB_DP PA13.Locked=true PA13.Mode=Serial_Wire @@ -84,44 +64,26 @@ PA13.Signal=SYS_SWDIO PA14.Locked=true PA14.Mode=Serial_Wire PA14.Signal=SYS_SWCLK -PA15.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PA15.GPIO_Label=RELAY4 -PA15.GPIO_Mode=GPIO_MODE_INPUT -PA15.GPIO_PuPd=GPIO_PULLDOWN -PA15.Locked=true -PA15.Signal=GPIO_Input -PA2.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PA2.GPIO_Label=KEY6 -PA2.GPIO_Mode=GPIO_MODE_INPUT -PA2.GPIO_PuPd=GPIO_PULLUP -PA2.Locked=true -PA2.Signal=GPIO_Input -PA3.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PA3.GPIO_Label=KEY5 -PA3.GPIO_Mode=GPIO_MODE_INPUT -PA3.GPIO_PuPd=GPIO_PULLUP -PA3.Locked=true -PA3.Signal=GPIO_Input PA4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PA4.GPIO_Label=KEY1 +PA4.GPIO_Label=KEY_IN1 PA4.GPIO_Mode=GPIO_MODE_INPUT PA4.GPIO_PuPd=GPIO_PULLUP PA4.Locked=true PA4.Signal=GPIO_Input PA5.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PA5.GPIO_Label=KEY2 +PA5.GPIO_Label=KEY_IN2 PA5.GPIO_Mode=GPIO_MODE_INPUT PA5.GPIO_PuPd=GPIO_PULLUP PA5.Locked=true PA5.Signal=GPIO_Input PA6.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PA6.GPIO_Label=KEY3 +PA6.GPIO_Label=KEY_IN3 PA6.GPIO_Mode=GPIO_MODE_INPUT PA6.GPIO_PuPd=GPIO_PULLUP PA6.Locked=true PA6.Signal=GPIO_Input PA7.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PA7.GPIO_Label=KEY4 +PA7.GPIO_Label=KEY_IN4 PA7.GPIO_Mode=GPIO_MODE_INPUT PA7.GPIO_PuPd=GPIO_PULLUP PA7.Locked=true @@ -136,7 +98,7 @@ PA9.Locked=true PA9.Mode=Asynchronous PA9.Signal=USART1_TX PB12.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB12.GPIO_Label=LED4 +PB12.GPIO_Label=KEY_OUT4 PB12.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP PB12.GPIO_PuPd=GPIO_NOPULL PB12.GPIO_Speed=GPIO_SPEED_FREQ_LOW @@ -144,7 +106,7 @@ PB12.Locked=true PB12.PinState=GPIO_PIN_RESET PB12.Signal=GPIO_Output PB13.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB13.GPIO_Label=LED3 +PB13.GPIO_Label=KEY_OUT3 PB13.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP PB13.GPIO_PuPd=GPIO_NOPULL PB13.GPIO_Speed=GPIO_SPEED_FREQ_LOW @@ -152,7 +114,7 @@ PB13.Locked=true PB13.PinState=GPIO_PIN_RESET PB13.Signal=GPIO_Output PB14.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB14.GPIO_Label=LED2 +PB14.GPIO_Label=KEY_OUT2 PB14.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP PB14.GPIO_PuPd=GPIO_NOPULL PB14.GPIO_Speed=GPIO_SPEED_FREQ_LOW @@ -160,41 +122,22 @@ PB14.Locked=true PB14.PinState=GPIO_PIN_RESET PB14.Signal=GPIO_Output PB15.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB15.GPIO_Label=LED1 +PB15.GPIO_Label=KEY_OUT1 PB15.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP PB15.GPIO_PuPd=GPIO_NOPULL PB15.GPIO_Speed=GPIO_SPEED_FREQ_LOW PB15.Locked=true PB15.PinState=GPIO_PIN_RESET PB15.Signal=GPIO_Output -PB3.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PB3.GPIO_Label=RELAY3 -PB3.GPIO_Mode=GPIO_MODE_INPUT -PB3.GPIO_PuPd=GPIO_PULLDOWN -PB3.Locked=true -PB3.Signal=GPIO_Input -PB4.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PB4.GPIO_Label=RELAY2 -PB4.GPIO_Mode=GPIO_MODE_INPUT -PB4.GPIO_PuPd=GPIO_PULLDOWN -PB4.Locked=true -PB4.Signal=GPIO_Input -PB5.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_Mode -PB5.GPIO_Label=RELAY1 -PB5.GPIO_Mode=GPIO_MODE_INPUT -PB5.GPIO_PuPd=GPIO_PULLDOWN -PB5.Locked=true -PB5.Signal=GPIO_Input -PB6.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB6.GPIO_Label=LED5 +PB6.GPIOParameters=PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP +PB6.GPIO_Label=KEY_OUT5 PB6.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP PB6.GPIO_PuPd=GPIO_NOPULL -PB6.GPIO_Speed=GPIO_SPEED_FREQ_LOW PB6.Locked=true PB6.PinState=GPIO_PIN_RESET PB6.Signal=GPIO_Output PB7.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB7.GPIO_Label=LED6 +PB7.GPIO_Label=KEY_OUT6 PB7.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP PB7.GPIO_PuPd=GPIO_NOPULL PB7.GPIO_Speed=GPIO_SPEED_FREQ_LOW @@ -202,7 +145,7 @@ PB7.Locked=true PB7.PinState=GPIO_PIN_RESET PB7.Signal=GPIO_Output PB8.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB8.GPIO_Label=LED7 +PB8.GPIO_Label=KEY_OUT7 PB8.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP PB8.GPIO_PuPd=GPIO_NOPULL PB8.GPIO_Speed=GPIO_SPEED_FREQ_LOW @@ -210,7 +153,7 @@ PB8.Locked=true PB8.PinState=GPIO_PIN_RESET PB8.Signal=GPIO_Output PB9.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP -PB9.GPIO_Label=LED8 +PB9.GPIO_Label=KEY_OUT8 PB9.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP PB9.GPIO_PuPd=GPIO_NOPULL PB9.GPIO_Speed=GPIO_SPEED_FREQ_LOW @@ -252,7 +195,7 @@ ProjectManager.ToolChainLocation= ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_USB_PCD_Init-USB-false-HAL-true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_TIM6_Init-TIM6-false-HAL-true RCC.AHBFreq_Value=48000000 RCC.APB1Freq_Value=48000000 RCC.APB1TimFreq_Value=48000000 @@ -273,9 +216,15 @@ RCC.TimSysFreq_Value=48000000 RCC.USART1Freq_Value=48000000 RCC.USART2Freq_Value=48000000 RCC.VCOOutput2Freq_Value=48000000 +TIM6.IPParameters=Prescaler,Period +TIM6.IPParametersWithoutCheck=Prescaler +TIM6.Period=BSP_KEY_IN_OUT_INTERAEL_MS - 1 +TIM6.Prescaler=SystemCoreClock / 1000 -1 USART1.BaudRate=115200 USART1.IPParameters=VirtualMode-Asynchronous,BaudRate USART1.VirtualMode-Asynchronous=VM_ASYNC VP_SYS_VS_Systick.Mode=SysTick VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer +VP_TIM6_VS_ClockSourceINT.Signal=TIM6_VS_ClockSourceINT board=custom