diff --git a/stm32f0_cherryusb/.mxproject b/stm32f072_usb_mouse_keyboard/.mxproject similarity index 89% rename from stm32f0_cherryusb/.mxproject rename to stm32f072_usb_mouse_keyboard/.mxproject index 99f9713..1f7eddb 100644 --- a/stm32f0_cherryusb/.mxproject +++ b/stm32f072_usb_mouse_keyboard/.mxproject @@ -1,11 +1,3 @@ -[PreviousLibFiles] -LibFiles=Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_bus.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_crs.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_system.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_utils.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_def.h;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart_ex.h;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_bus.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_crs.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_system.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_utils.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_def.h;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart_ex.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\stm32f072xb.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\stm32f0xx.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\system_stm32f0xx.h;Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; - -[PreviousUsedKeilFiles] -SourceFiles=..\Core\Src\main.c;..\Core\Src\stm32f0xx_it.c;..\Core\Src\stm32f0xx_hal_msp.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;..\Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;..\Core\Src\system_stm32f0xx.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;..\Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;..\Core\Src\system_stm32f0xx.c;;; -HeaderPath=..\Drivers\STM32F0xx_HAL_Driver\Inc;..\Drivers\STM32F0xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F0xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc; -CDefines=USE_HAL_DRIVER;STM32F072xB;USE_HAL_DRIVER;USE_HAL_DRIVER; - [PreviousGenFiles] AdvancedFolderStructure=true HeaderFileListSize=3 @@ -23,3 +15,11 @@ SourceFolderListSize=1 SourcePath#0=..\Core\Src SourceFiles=; +[PreviousLibFiles] +LibFiles=Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_bus.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_crs.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_system.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_utils.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_def.h;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart_ex.h;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_tim_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_tim.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_rcc.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_rcc_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_bus.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_crs.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_system.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_utils.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_def.h;Drivers\STM32F0xx_HAL_Driver\Inc\Legacy\stm32_hal_legacy.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_i2c_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_gpio_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_gpio.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_dma.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_cortex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_pwr_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_pwr.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_flash_ex.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_exti.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_ll_usart.h;Drivers\STM32F0xx_HAL_Driver\Inc\stm32f0xx_hal_uart_ex.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\stm32f072xb.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\stm32f0xx.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\system_stm32f0xx.h;Drivers\CMSIS\Device\ST\STM32F0xx\Include\system_stm32f0xx.h;Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;Drivers\CMSIS\Include\cmsis_armcc.h;Drivers\CMSIS\Include\cmsis_armclang.h;Drivers\CMSIS\Include\cmsis_compiler.h;Drivers\CMSIS\Include\cmsis_gcc.h;Drivers\CMSIS\Include\cmsis_iccarm.h;Drivers\CMSIS\Include\cmsis_version.h;Drivers\CMSIS\Include\core_armv8mbl.h;Drivers\CMSIS\Include\core_armv8mml.h;Drivers\CMSIS\Include\core_cm0.h;Drivers\CMSIS\Include\core_cm0plus.h;Drivers\CMSIS\Include\core_cm1.h;Drivers\CMSIS\Include\core_cm23.h;Drivers\CMSIS\Include\core_cm3.h;Drivers\CMSIS\Include\core_cm33.h;Drivers\CMSIS\Include\core_cm4.h;Drivers\CMSIS\Include\core_cm7.h;Drivers\CMSIS\Include\core_sc000.h;Drivers\CMSIS\Include\core_sc300.h;Drivers\CMSIS\Include\mpu_armv7.h;Drivers\CMSIS\Include\mpu_armv8.h;Drivers\CMSIS\Include\tz_context.h; + +[PreviousUsedKeilFiles] +SourceFiles=..\Core\Src\main.c;..\Core\Src\stm32f0xx_it.c;..\Core\Src\stm32f0xx_hal_msp.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;..\Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;..\Core\Src\system_stm32f0xx.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_tim_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_rcc_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_i2c_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_gpio.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_dma.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_cortex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_pwr_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_flash_ex.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_exti.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart.c;..\Drivers\STM32F0xx_HAL_Driver\Src\stm32f0xx_hal_uart_ex.c;..\Drivers\CMSIS\Device\ST\STM32F0xx\Source\Templates\system_stm32f0xx.c;..\Core\Src\system_stm32f0xx.c;;; +HeaderPath=..\Drivers\STM32F0xx_HAL_Driver\Inc;..\Drivers\STM32F0xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F0xx\Include;..\Drivers\CMSIS\Include;..\Core\Inc; +CDefines=USE_HAL_DRIVER;STM32F072xB;USE_HAL_DRIVER;USE_HAL_DRIVER; + diff --git a/stm32f0_cherryusb/Core/Inc/bsp_key.h b/stm32f072_usb_mouse_keyboard/Core/Inc/bsp_key.h similarity index 100% rename from stm32f0_cherryusb/Core/Inc/bsp_key.h rename to stm32f072_usb_mouse_keyboard/Core/Inc/bsp_key.h diff --git a/stm32f0_cherryusb/Core/Inc/hid_keyboard_mouse.h b/stm32f072_usb_mouse_keyboard/Core/Inc/hid_keyboard_mouse.h similarity index 100% rename from stm32f0_cherryusb/Core/Inc/hid_keyboard_mouse.h rename to stm32f072_usb_mouse_keyboard/Core/Inc/hid_keyboard_mouse.h diff --git a/stm32f0_cherryusb/Core/Inc/main.h b/stm32f072_usb_mouse_keyboard/Core/Inc/main.h similarity index 100% rename from stm32f0_cherryusb/Core/Inc/main.h rename to stm32f072_usb_mouse_keyboard/Core/Inc/main.h diff --git a/stm32f0_cherryusb/Core/Inc/stm32f0xx_hal_conf.h b/stm32f072_usb_mouse_keyboard/Core/Inc/stm32f0xx_hal_conf.h similarity index 100% rename from stm32f0_cherryusb/Core/Inc/stm32f0xx_hal_conf.h rename to stm32f072_usb_mouse_keyboard/Core/Inc/stm32f0xx_hal_conf.h diff --git a/stm32f0_cherryusb/Core/Inc/stm32f0xx_it.h b/stm32f072_usb_mouse_keyboard/Core/Inc/stm32f0xx_it.h similarity index 92% rename from stm32f0_cherryusb/Core/Inc/stm32f0xx_it.h rename to stm32f072_usb_mouse_keyboard/Core/Inc/stm32f0xx_it.h index 109685b..ab2ead0 100644 --- a/stm32f0_cherryusb/Core/Inc/stm32f0xx_it.h +++ b/stm32f072_usb_mouse_keyboard/Core/Inc/stm32f0xx_it.h @@ -13,7 +13,7 @@ * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * - ****************************************************************************** + ****************************************************************************** */ /* USER CODE END Header */ diff --git a/stm32f072_usb_mouse_keyboard/Core/Inc/usb_config.h b/stm32f072_usb_mouse_keyboard/Core/Inc/usb_config.h new file mode 100644 index 0000000..875426a --- /dev/null +++ b/stm32f072_usb_mouse_keyboard/Core/Inc/usb_config.h @@ -0,0 +1,23 @@ +#ifndef CHERRYUSB_CONFIG_H +#define CHERRYUSB_CONFIG_H + +#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__) +#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO +#define CONFIG_USB_PRINTF_COLOR_ENABLE + +#define CONFIG_USB_ALIGN_SIZE 4 +#define USB_NOCACHE_RAM_SECTION + +/* ================ USB Device Port Configuration ================*/ + +#define CONFIG_USBDEV_MAX_BUS 1 +#define CONFIG_USBDEV_EP_NUM 8 + +/* ================= USB Device Stack Configuration ================ */ + +#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 256 + +/* ---------------- FSDEV Configuration ---------------- */ +#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 1 + +#endif diff --git a/stm32f0_cherryusb/Core/Src/bsp_key.c b/stm32f072_usb_mouse_keyboard/Core/Src/bsp_key.c similarity index 100% rename from stm32f0_cherryusb/Core/Src/bsp_key.c rename to stm32f072_usb_mouse_keyboard/Core/Src/bsp_key.c diff --git a/stm32f0_cherryusb/Core/Src/hid_keyboard_mouse.c b/stm32f072_usb_mouse_keyboard/Core/Src/hid_keyboard_mouse.c similarity index 100% rename from stm32f0_cherryusb/Core/Src/hid_keyboard_mouse.c rename to stm32f072_usb_mouse_keyboard/Core/Src/hid_keyboard_mouse.c diff --git a/stm32f0_cherryusb/Core/Src/main.c b/stm32f072_usb_mouse_keyboard/Core/Src/main.c similarity index 94% rename from stm32f0_cherryusb/Core/Src/main.c rename to stm32f072_usb_mouse_keyboard/Core/Src/main.c index 59b94fa..3663ec0 100644 --- a/stm32f0_cherryusb/Core/Src/main.c +++ b/stm32f072_usb_mouse_keyboard/Core/Src/main.c @@ -21,7 +21,7 @@ /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ -#include "usbd_core.h" +#include #include "usb_hid.h" #include "bsp_key.h" #include "hid_keyboard_mouse.h" @@ -62,20 +62,7 @@ static void MX_TIM6_Init(void); /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ -void usb_dc_low_level_init(void) -{ - __HAL_RCC_USB_CLK_ENABLE(); - HAL_NVIC_SetPriority(USB_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(USB_IRQn); -} - -int fputc(int c, FILE *f) -{ - uint8_t ch = c; - HAL_UART_Transmit(&huart1, &ch, 1, 10); - return c; -} /* USER CODE END 0 */ /** @@ -116,8 +103,7 @@ int main(void) /* Infinite loop */ /* USER CODE BEGIN WHILE */ - while (1) - { + while (1) { bsp_key_number_e key; bsp_key_event_type_e event; bsp_key_get_event(&key, &event); @@ -148,7 +134,6 @@ int main(void) } else { __WFI(); } - /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ @@ -319,7 +304,12 @@ static void MX_GPIO_Init(void) } /* USER CODE BEGIN 4 */ - +int fputc(int c, FILE *f) +{ + uint8_t ch = c; + HAL_UART_Transmit(&huart1, &ch, 1, 10); + return c; +} /* USER CODE END 4 */ /** diff --git a/stm32f0_cherryusb/Core/Src/stm32f0xx_hal_msp.c b/stm32f072_usb_mouse_keyboard/Core/Src/stm32f0xx_hal_msp.c similarity index 91% rename from stm32f0_cherryusb/Core/Src/stm32f0xx_hal_msp.c rename to stm32f072_usb_mouse_keyboard/Core/Src/stm32f0xx_hal_msp.c index 09c4859..630aff7 100644 --- a/stm32f0_cherryusb/Core/Src/stm32f0xx_hal_msp.c +++ b/stm32f072_usb_mouse_keyboard/Core/Src/stm32f0xx_hal_msp.c @@ -1,3 +1,4 @@ + /* USER CODE BEGIN Header */ /** ****************************************************************************** @@ -98,6 +99,7 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) /* USER CODE BEGIN TIM6_MspInit 1 */ /* USER CODE END TIM6_MspInit 1 */ + } } @@ -159,6 +161,7 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ + } } @@ -193,5 +196,18 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) } /* USER CODE BEGIN 1 */ +void usb_dc_low_level_init(void) +{ + __HAL_RCC_USB_CLK_ENABLE(); + HAL_NVIC_SetPriority(USB_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(USB_IRQn); +} + +void usb_dc_low_level_deinit(void) +{ + __HAL_RCC_USB_CLK_DISABLE(); + + HAL_NVIC_DisableIRQ(USB_IRQn); +} /* USER CODE END 1 */ diff --git a/stm32f0_cherryusb/Core/Src/stm32f0xx_it.c b/stm32f072_usb_mouse_keyboard/Core/Src/stm32f0xx_it.c similarity index 96% rename from stm32f0_cherryusb/Core/Src/stm32f0xx_it.c rename to stm32f072_usb_mouse_keyboard/Core/Src/stm32f0xx_it.c index 05e3603..a9b080a 100644 --- a/stm32f0_cherryusb/Core/Src/stm32f0xx_it.c +++ b/stm32f072_usb_mouse_keyboard/Core/Src/stm32f0xx_it.c @@ -22,6 +22,7 @@ #include "stm32f0xx_it.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ + /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -159,5 +160,5 @@ void TIM6_DAC_IRQHandler(void) void USB_IRQHandler(void) { USBD_IRQHandler(0); -} +} /* USER CODE END 1 */ diff --git a/stm32f0_cherryusb/Core/Src/system_stm32f0xx.c b/stm32f072_usb_mouse_keyboard/Core/Src/system_stm32f0xx.c similarity index 100% rename from stm32f0_cherryusb/Core/Src/system_stm32f0xx.c rename to stm32f072_usb_mouse_keyboard/Core/Src/system_stm32f0xx.c diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Device/ST/STM32F0xx/LICENSE.txt b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Device/ST/STM32F0xx/LICENSE.txt similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Device/ST/STM32F0xx/LICENSE.txt rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Device/ST/STM32F0xx/LICENSE.txt diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_armcc.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_armcc.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_armcc.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_armcc.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_armclang.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_armclang.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_armclang.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_armclang.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_compiler.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_compiler.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_compiler.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_compiler.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_gcc.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_gcc.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_gcc.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_gcc.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_iccarm.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_iccarm.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_iccarm.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_iccarm.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_version.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_version.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/cmsis_version.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/cmsis_version.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_armv8mbl.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_armv8mbl.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_armv8mbl.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_armv8mbl.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_armv8mml.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_armv8mml.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_armv8mml.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_armv8mml.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm0.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm0.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm0.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm0.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm0plus.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm0plus.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm0plus.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm0plus.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm1.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm1.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm1.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm1.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm23.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm23.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm23.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm23.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm3.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm3.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm3.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm3.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm33.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm33.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm33.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm33.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm4.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm4.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm4.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm4.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm7.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm7.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_cm7.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_cm7.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_sc000.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_sc000.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_sc000.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_sc000.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/core_sc300.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_sc300.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/core_sc300.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/core_sc300.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/mpu_armv7.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/mpu_armv7.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/mpu_armv7.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/mpu_armv7.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/mpu_armv8.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/mpu_armv8.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/mpu_armv8.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/mpu_armv8.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/Include/tz_context.h b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/tz_context.h similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/Include/tz_context.h rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/Include/tz_context.h diff --git a/stm32f0_cherryusb/Drivers/CMSIS/LICENSE.txt b/stm32f072_usb_mouse_keyboard/Drivers/CMSIS/LICENSE.txt similarity index 100% rename from stm32f0_cherryusb/Drivers/CMSIS/LICENSE.txt rename to stm32f072_usb_mouse_keyboard/Drivers/CMSIS/LICENSE.txt diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h similarity index 97% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index 1d04707..d415548 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -7,7 +7,7 @@ ****************************************************************************** * @attention * - * Copyright (c) 2023 STMicroelectronics. + * Copyright (c) 2021 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file @@ -37,16 +37,12 @@ extern "C" { #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR -#if defined(STM32U5) || defined(STM32H7) || defined(STM32MP1) +#if defined(STM32H7) || defined(STM32MP1) #define CRYP_DATATYPE_32B CRYP_NO_SWAP #define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP #define CRYP_DATATYPE_8B CRYP_BYTE_SWAP #define CRYP_DATATYPE_1B CRYP_BIT_SWAP -#if defined(STM32U5) -#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF -#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF -#endif /* STM32U5 */ -#endif /* STM32U5 || STM32H7 || STM32MP1 */ +#endif /* STM32H7 || STM32MP1 */ /** * @} */ @@ -279,7 +275,7 @@ extern "C" { #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE -#if defined(STM32G4) || defined(STM32L5) || defined(STM32H7) || defined (STM32U5) +#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5) #define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL #define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL #endif @@ -552,6 +548,16 @@ extern "C" { #define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE #define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE #endif /* STM32U5 */ +#if defined(STM32U0) +#define OB_USER_nRST_STOP OB_USER_NRST_STOP +#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY +#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW +#define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL +#define OB_USER_nBOOT0 OB_USER_NBOOT0 +#define OB_USER_nBOOT1 OB_USER_NBOOT1 +#define OB_nBOOT0_RESET OB_NBOOT0_RESET +#define OB_nBOOT0_SET OB_NBOOT0_SET +#endif /* STM32U0 */ /** * @} @@ -1243,10 +1249,10 @@ extern "C" { #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 -#if defined(STM32H5) +#if defined(STM32H5) || defined(STM32H7RS) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM -#endif /* STM32H5 */ +#endif /* STM32H5 || STM32H7RS */ #if defined(STM32WBA) #define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE @@ -1258,10 +1264,10 @@ extern "C" { #define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL #endif /* STM32WBA */ -#if defined(STM32H5) || defined(STM32WBA) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) #define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE #define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL -#endif /* STM32H5 || STM32WBA */ +#endif /* STM32H5 || STM32WBA || STM32H7RS */ #if defined(STM32F7) #define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK @@ -1599,6 +1605,8 @@ extern "C" { #define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */ #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */ +#define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef /* Transmit Packet Configuration structure definition */ + /** * @} */ @@ -1991,12 +1999,12 @@ extern "C" { /** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose * @{ */ -#if defined(STM32H5) || defined(STM32WBA) +#if defined(STM32H5) || defined(STM32WBA) || defined(STM32H7RS) #define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey #define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock #define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock #define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets -#endif /* STM32H5 || STM32WBA */ +#endif /* STM32H5 || STM32WBA || STM32H7RS */ /** * @} @@ -2311,8 +2319,8 @@ extern "C" { #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F302xE) || defined(STM32F302xC) +#endif +#if defined(STM32F302xE) || defined(STM32F302xC) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \ @@ -2345,8 +2353,8 @@ extern "C" { ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \ ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP6_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) +#endif +#if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \ ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \ @@ -2403,8 +2411,8 @@ extern "C" { ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \ ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP7_EXTI_CLEAR_FLAG()) -# endif -# if defined(STM32F373xC) ||defined(STM32F378xx) +#endif +#if defined(STM32F373xC) ||defined(STM32F378xx) #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \ @@ -2421,7 +2429,7 @@ extern "C" { __HAL_COMP_COMP2_EXTI_GET_FLAG()) #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \ __HAL_COMP_COMP2_EXTI_CLEAR_FLAG()) -# endif +#endif #else #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \ __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE()) @@ -2723,6 +2731,12 @@ extern "C" { #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET +#if defined(STM32C0) +#define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET +#define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET +#define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET +#define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET +#endif /* STM32C0 */ #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET @@ -3646,8 +3660,12 @@ extern "C" { #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2 +#if defined(STM32U0) +#define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK +#endif + #if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || \ - defined(STM32WL) || defined(STM32C0) + defined(STM32WL) || defined(STM32C0) || defined(STM32H7RS) || defined(STM32U0) #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE #else #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK @@ -3749,8 +3767,10 @@ extern "C" { #define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE #define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2 #define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1 +#if !defined(STM32U0) #define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1 #define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1 +#endif #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1 #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2 @@ -3896,7 +3916,8 @@ extern "C" { */ #if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || \ defined (STM32L4P5xx)|| defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) || \ - defined (STM32WBA) || defined (STM32H5) || defined (STM32C0) + defined (STM32WBA) || defined (STM32H5) || \ + defined (STM32C0) || defined (STM32H7RS) || defined (STM32U0) #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #endif @@ -3931,6 +3952,13 @@ extern "C" { __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT())) #endif /* STM32F1 */ +#if defined (STM32F0) || defined (STM32F2) || defined (STM32F3) || defined (STM32F4) || defined (STM32F7) || \ + defined (STM32H7) || \ + defined (STM32L0) || defined (STM32L1) || \ + defined (STM32WB) +#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG +#endif + #define IS_ALARM IS_RTC_ALARM #define IS_ALARM_MASK IS_RTC_ALARM_MASK #define IS_TAMPER IS_RTC_TAMPER @@ -4212,6 +4240,9 @@ extern "C" { #define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE #define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1 + +#define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1 +#define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2 /** * @} */ diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h similarity index 96% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h index ff828e3..bf179b7 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h @@ -236,8 +236,8 @@ typedef enum */ #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) -#define IS_GPIO_PIN(__PIN__) (((((uint32_t)__PIN__) & GPIO_PIN_MASK) != 0x00U) &&\ - ((((uint32_t)__PIN__) & ~GPIO_PIN_MASK) == 0x00U)) +#define IS_GPIO_PIN(__PIN__) (((((uint32_t)(__PIN__)) & GPIO_PIN_MASK) != 0x00U) &&\ + ((((uint32_t)(__PIN__)) & ~GPIO_PIN_MASK) == 0x00U)) #define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\ ((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\ diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h similarity index 97% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h index c55bc9e..bdb34ed 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h @@ -118,8 +118,6 @@ typedef enum HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception process is ongoing */ HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ - HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ - HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ } HAL_I2C_StateTypeDef; diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h similarity index 97% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h index 95a30eb..d82e4d9 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h @@ -385,29 +385,28 @@ typedef struct */ typedef enum { - HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */ - , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */ - , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */ - , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */ - , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */ - , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */ - , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */ - , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */ - , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */ - , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */ - , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */ - , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */ - , HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU /*!< TIM Hall Sensor MspDeInit Callback ID */ - , HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU /*!< TIM Hall Sensor MspDeInit Callback ID */ + HAL_TIM_BASE_MSPINIT_CB_ID = 0x00U /*!< TIM Base MspInit Callback ID */ + , HAL_TIM_BASE_MSPDEINIT_CB_ID = 0x01U /*!< TIM Base MspDeInit Callback ID */ + , HAL_TIM_IC_MSPINIT_CB_ID = 0x02U /*!< TIM IC MspInit Callback ID */ + , HAL_TIM_IC_MSPDEINIT_CB_ID = 0x03U /*!< TIM IC MspDeInit Callback ID */ + , HAL_TIM_OC_MSPINIT_CB_ID = 0x04U /*!< TIM OC MspInit Callback ID */ + , HAL_TIM_OC_MSPDEINIT_CB_ID = 0x05U /*!< TIM OC MspDeInit Callback ID */ + , HAL_TIM_PWM_MSPINIT_CB_ID = 0x06U /*!< TIM PWM MspInit Callback ID */ + , HAL_TIM_PWM_MSPDEINIT_CB_ID = 0x07U /*!< TIM PWM MspDeInit Callback ID */ + , HAL_TIM_ONE_PULSE_MSPINIT_CB_ID = 0x08U /*!< TIM One Pulse MspInit Callback ID */ + , HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID = 0x09U /*!< TIM One Pulse MspDeInit Callback ID */ + , HAL_TIM_ENCODER_MSPINIT_CB_ID = 0x0AU /*!< TIM Encoder MspInit Callback ID */ + , HAL_TIM_ENCODER_MSPDEINIT_CB_ID = 0x0BU /*!< TIM Encoder MspDeInit Callback ID */ + , HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID = 0x0CU /*!< TIM Hall Sensor MspDeInit Callback ID */ + , HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID = 0x0DU /*!< TIM Hall Sensor MspDeInit Callback ID */ , HAL_TIM_PERIOD_ELAPSED_CB_ID = 0x0EU /*!< TIM Period Elapsed Callback ID */ , HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID = 0x0FU /*!< TIM Period Elapsed half complete Callback ID */ , HAL_TIM_TRIGGER_CB_ID = 0x10U /*!< TIM Trigger Callback ID */ , HAL_TIM_TRIGGER_HALF_CB_ID = 0x11U /*!< TIM Trigger half complete Callback ID */ - , HAL_TIM_IC_CAPTURE_CB_ID = 0x12U /*!< TIM Input Capture Callback ID */ , HAL_TIM_IC_CAPTURE_HALF_CB_ID = 0x13U /*!< TIM Input Capture half complete Callback ID */ , HAL_TIM_OC_DELAY_ELAPSED_CB_ID = 0x14U /*!< TIM Output Compare Delay Elapsed Callback ID */ - , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */ + , HAL_TIM_PWM_PULSE_FINISHED_CB_ID = 0x15U /*!< TIM PWM Pulse Finished Callback ID */ , HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID = 0x16U /*!< TIM PWM Pulse Finished half complete Callback ID */ , HAL_TIM_ERROR_CB_ID = 0x17U /*!< TIM Error Callback ID */ , HAL_TIM_COMMUTATION_CB_ID = 0x18U /*!< TIM Commutation Callback ID */ @@ -1656,8 +1655,9 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to #define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ ((__CHANNEL__) == TIM_CHANNEL_2)) -#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) \ - ((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? (((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : ((__PERIOD__) > 0U)) +#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__) ((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? \ + (((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : \ + ((__PERIOD__) > 0U)) #define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ ((__CHANNEL__) == TIM_CHANNEL_2) || \ @@ -1710,7 +1710,6 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to #define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xFUL) - #define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \ ((__STATE__) == TIM_BREAK_DISABLE)) @@ -2048,7 +2047,8 @@ HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_S HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig); HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, const TIM_SlaveConfigTypeDef *sSlaveConfig); HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, - uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength); + uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, + uint32_t BurstLength); HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength); diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h similarity index 97% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h index fef655c..159a9a1 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h @@ -145,7 +145,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart); +HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart); /** diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h similarity index 97% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h index b2220b2..c55b222 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_tim.h @@ -559,10 +559,10 @@ typedef struct /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode * @{ */ -#define LL_TIM_COUNTERMODE_UP 0x00000000U /*!CR2, TIM_CR2_CCPC); } +/** + * @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is enabled. + * @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload + * @param TIMx Timer instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx) +{ + return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL); +} + /** * @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM). * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usart.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usart.h similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usart.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usart.h diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h similarity index 96% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h index 2a6091b..ec69ddb 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h @@ -213,7 +213,7 @@ __STATIC_INLINE uint32_t LL_GetFlashSize(void) * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro) * @note When a RTOS is used, it is recommended to avoid changing the SysTick * configuration by calling this function, for a delay use rather osDelay RTOS service. - * @param Ticks Number of ticks + * @param Ticks Frequency of Ticks (Hz) * @retval None */ __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks) diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/LICENSE.txt b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/LICENSE.txt similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/LICENSE.txt rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/LICENSE.txt diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c similarity index 96% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c index fdeb28a..78efc1f 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c @@ -56,7 +56,7 @@ */ #define __STM32F0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ #define __STM32F0xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */ -#define __STM32F0xx_HAL_VERSION_SUB2 (0x07U) /*!< [15:8] sub2 version */ +#define __STM32F0xx_HAL_VERSION_SUB2 (0x08U) /*!< [15:8] sub2 version */ #define __STM32F0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32F0xx_HAL_VERSION ((__STM32F0xx_HAL_VERSION_MAIN << 24U)\ |(__STM32F0xx_HAL_VERSION_SUB1 << 16U)\ diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c similarity index 96% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c index 2569e81..02262ec 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c @@ -133,10 +133,13 @@ * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) -{ +{ /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn,PreemptPriority); + + /* Prevent unused argument(s) compilation warning */ + UNUSED(SubPriority); } /** diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c similarity index 95% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c index 5247854..7a4c3f6 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c @@ -64,7 +64,7 @@ (++) Provide exiting handle as parameter. (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter. - (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine(). + (#) Clear Exti configuration of a dedicated line using HAL_EXTI_ClearConfigLine(). (++) Provide exiting handle as parameter. (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback(). @@ -75,7 +75,7 @@ (#) Get interrupt pending bit using HAL_EXTI_GetPending(). - (#) Clear interrupt pending bit using HAL_EXTI_GetPending(). + (#) Clear interrupt pending bit using HAL_EXTI_ClearPending(). (#) Generate software interrupt using HAL_EXTI_GenerateSWI(). diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c similarity index 96% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c index aa3a188..9c94691 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c @@ -456,7 +456,7 @@ void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) * until the next reset. * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family * @param GPIO_Pin specifies the port bits to be locked. -* This parameter can be any combination of GPIO_Pin_x where x can be (0..15). +* This parameter can be any combination of GPIO_PIN_x where x can be (0..15). * @retval None */ HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c similarity index 92% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c index 6a90c5f..47cd5d3 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c @@ -90,7 +90,7 @@ add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can add their own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. @@ -156,7 +156,7 @@ HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA() (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() - (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (++) Abort a master or memory IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() @@ -214,7 +214,7 @@ add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can add their own code by customization of function pointer HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (+) Abort a master or memory I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. @@ -608,7 +608,12 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) { - hi2c->Instance->CR2 = (I2C_CR2_ADD10); + SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); + } + else + { + /* Clear the I2C ADD10 bit */ + CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); @@ -1115,6 +1120,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA uint16_t Size, uint32_t Timeout) { uint32_t tickstart; + uint32_t xfermode; if (hi2c->State == HAL_I2C_STATE_READY) { @@ -1138,18 +1144,39 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA hi2c->XferCount = Size; hi2c->XferISR = NULL; - /* Send Slave Address */ - /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, - I2C_GENERATE_START_WRITE); + xfermode = I2C_RELOAD_MODE; } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + xfermode = I2C_AUTOEND_MODE; + } + + if (hi2c->XferSize > 0U) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + hi2c->XferCount--; + hi2c->XferSize--; + + /* Send Slave Address */ + /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, + I2C_GENERATE_START_WRITE); + } + else + { + /* Send Slave Address */ + /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); } @@ -1261,7 +1288,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); } @@ -1352,6 +1379,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData uint32_t Timeout) { uint32_t tickstart; + uint16_t tmpXferCount; + HAL_StatusTypeDef error; if (hi2c->State == HAL_I2C_STATE_READY) { @@ -1378,14 +1407,6 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData /* Enable Address Acknowledge */ hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - /* Wait until ADDR flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) - { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_ERROR; - } - /* Preload TX data if no stretch enable */ if (hi2c->Init.NoStretchMode == I2C_NOSTRETCH_ENABLE) { @@ -1399,6 +1420,18 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData hi2c->XferCount--; } + /* Wait until ADDR flag is set */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + + return HAL_ERROR; + } + /* Clear ADDR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); @@ -1410,6 +1443,10 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData { /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + return HAL_ERROR; } @@ -1422,6 +1459,10 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData { /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + return HAL_ERROR; } @@ -1445,31 +1486,48 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData } /* Wait until AF flag is set */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK) + error = I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart); + + if (error != HAL_OK) { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; - return HAL_ERROR; + /* Check that I2C transfer finished */ + /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ + /* Mean XferCount == 0 */ + + tmpXferCount = hi2c->XferCount; + if ((hi2c->ErrorCode == HAL_I2C_ERROR_AF) && (tmpXferCount == 0U)) + { + /* Reset ErrorCode to NONE */ + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + } + else + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; + return HAL_ERROR; + } } - - /* Flush TX register */ - I2C_Flush_TXDR(hi2c); - - /* Clear AF flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - - /* Wait until STOP flag is set */ - if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) + else { - /* Disable Address Acknowledge */ - hi2c->Instance->CR2 |= I2C_CR2_NACK; + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); - return HAL_ERROR; + /* Clear AF flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + + /* Wait until STOP flag is set */ + if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; + + return HAL_ERROR; + } + + /* Clear STOP flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); } - /* Clear STOP flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - /* Wait until BUSY flag is reset */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) { @@ -1672,7 +1730,26 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D /* Send Slave Address */ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); + if (hi2c->XferSize > 0U) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + hi2c->XferCount--; + hi2c->XferSize--; + + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, + I2C_GENERATE_START_WRITE); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, + I2C_GENERATE_START_WRITE); + } /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -1732,7 +1809,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; xfermode = I2C_RELOAD_MODE; } else @@ -1895,6 +1972,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t { uint32_t xfermode; HAL_StatusTypeDef dmaxferstatus; + uint32_t sizetoxfer = 0U; if (hi2c->State == HAL_I2C_STATE_READY) { @@ -1927,6 +2005,20 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t xfermode = I2C_AUTOEND_MODE; } + if (hi2c->XferSize > 0U) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + sizetoxfer = hi2c->XferSize; + hi2c->XferCount--; + hi2c->XferSize--; + } + if (hi2c->XferSize > 0U) { if (hi2c->hdmatx != NULL) @@ -1942,8 +2034,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, - hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, + (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); } else { @@ -1964,7 +2056,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t { /* Send Slave Address */ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), + xfermode, I2C_GENERATE_START_WRITE); /* Update XferCount value */ hi2c->XferCount -= hi2c->XferSize; @@ -2003,7 +2096,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t /* Send Slave Address */ /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); /* Process Unlocked */ @@ -2065,7 +2158,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; xfermode = I2C_RELOAD_MODE; } else @@ -2159,11 +2252,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D /* Note : The I2C interrupts must be enabled after unlocking current process to avoid the risk of I2C interrupt handle execution before current process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ + /* Enable ERR, TC, STOP, NACK, RXI interrupt */ /* possible to enable all of these */ /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); + I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); } return HAL_OK; @@ -2612,7 +2705,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); } @@ -2650,7 +2743,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + hi2c->XferSize = 1U; I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } @@ -2728,6 +2821,7 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr hi2c->ErrorCode = HAL_I2C_ERROR_NONE; /* Prepare transfer parameters */ + hi2c->XferSize = 0U; hi2c->pBuffPtr = pData; hi2c->XferCount = Size; hi2c->XferOptions = I2C_NO_OPTION_FRAME; @@ -2849,11 +2943,11 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre to avoid the risk of I2C interrupt handle execution before current process unlock */ - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ + /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, (I2C_XFER_TX_IT | I2C_XFER_RX_IT)); + I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); return HAL_OK; } @@ -3259,22 +3353,6 @@ HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAdd __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); } - /* Check if the maximum allowed number of trials has been reached */ - if (I2C_Trials == Trials) - { - /* Generate Stop */ - hi2c->Instance->CR2 |= I2C_CR2_STOP; - - /* Wait until STOPF flag is reset */ - if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) - { - return HAL_ERROR; - } - - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - } - /* Increment Trials */ I2C_Trials++; } while (I2C_Trials < Trials); @@ -3313,6 +3391,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 { uint32_t xfermode; uint32_t xferrequest = I2C_GENERATE_START_WRITE; + uint32_t sizetoxfer = 0U; /* Check the parameters */ assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); @@ -3344,6 +3423,21 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 xfermode = hi2c->XferOptions; } + if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ + (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + sizetoxfer = hi2c->XferSize; + hi2c->XferCount--; + hi2c->XferSize--; + } + /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ /* Mean Previous state is same as current state */ @@ -3365,7 +3459,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 } /* Send Slave Address and set NBYTES to write */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + } /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -3405,6 +3506,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 uint32_t xfermode; uint32_t xferrequest = I2C_GENERATE_START_WRITE; HAL_StatusTypeDef dmaxferstatus; + uint32_t sizetoxfer = 0U; /* Check the parameters */ assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); @@ -3436,6 +3538,21 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 xfermode = hi2c->XferOptions; } + if ((hi2c->XferSize > 0U) && ((XferOptions == I2C_FIRST_FRAME) || \ + (XferOptions == I2C_FIRST_AND_LAST_FRAME))) + { + /* Preload TX register */ + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + sizetoxfer = hi2c->XferSize; + hi2c->XferCount--; + hi2c->XferSize--; + } + /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ /* Mean Previous state is same as current state */ @@ -3471,8 +3588,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, - hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, + (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); } else { @@ -3492,7 +3609,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 if (dmaxferstatus == HAL_OK) { /* Send Slave Address and set NBYTES to write */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + } /* Update XferCount value */ hi2c->XferCount -= hi2c->XferSize; @@ -3531,8 +3655,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 /* Send Slave Address */ /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, - I2C_GENERATE_START_WRITE); + if ((XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_FIRST_AND_LAST_FRAME)) + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)sizetoxfer, xfermode, xferrequest); + } + else + { + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); + } /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -3795,11 +3925,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16 /* Note : The I2C interrupts must be enabled after unlocking current process to avoid the risk of I2C interrupt handle execution before current process unlock */ - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ + /* Enable ERR, TC, STOP, NACK, RXI interrupt */ /* possible to enable all of these */ /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ - I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); + I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); } return HAL_OK; @@ -4434,7 +4564,7 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) } /** - * @brief Abort a master I2C IT or DMA process communication with Interrupt. + * @brief Abort a master or memory I2C IT or DMA process communication with Interrupt. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @param DevAddress Target device address: The device 7 bits address value @@ -4443,7 +4573,9 @@ HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) */ HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) { - if (hi2c->Mode == HAL_I2C_MODE_MASTER) + HAL_I2C_ModeTypeDef tmp_mode = hi2c->Mode; + + if ((tmp_mode == HAL_I2C_MODE_MASTER) || (tmp_mode == HAL_I2C_MODE_MEM)) { /* Process Locked */ __HAL_LOCK(hi2c); @@ -4842,17 +4974,22 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin hi2c->XferSize--; hi2c->XferCount--; } - else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) == RESET) && \ + ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))) { /* Write data to TXDR */ - hi2c->Instance->TXDR = *hi2c->pBuffPtr; + if (hi2c->XferCount != 0U) + { + /* Write data to TXDR */ + hi2c->Instance->TXDR = *hi2c->pBuffPtr; - /* Increment Buffer pointer */ - hi2c->pBuffPtr++; + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; - hi2c->XferSize--; - hi2c->XferCount--; + hi2c->XferSize--; + hi2c->XferCount--; + } } else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) @@ -4863,7 +5000,15 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } else @@ -5018,7 +5163,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32 { if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } @@ -5039,6 +5192,12 @@ static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32 else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { + /* Disable Interrupt related to address step */ + I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + + /* Enable ERR, TC, STOP, NACK and RXI interrupts */ + I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); + if (hi2c->State == HAL_I2C_STATE_BUSY_RX) { direction = I2C_GENERATE_START_READ; @@ -5046,7 +5205,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32 if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, @@ -5103,9 +5270,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, tmpITFlags); } - - if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ @@ -5268,7 +5434,15 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui /* Prepare the new XferSize to transfer */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } xfermode = I2C_RELOAD_MODE; } else @@ -5405,6 +5579,9 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { + /* Disable Interrupt related to address step */ + I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + /* Enable only Error interrupt */ I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); @@ -5413,7 +5590,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 /* Prepare the new XferSize to transfer */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); } @@ -5447,6 +5632,12 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { + /* Disable Interrupt related to address step */ + I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + + /* Enable only Error and NACK interrupt for data transfer */ + I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); + if (hi2c->State == HAL_I2C_STATE_BUSY_RX) { direction = I2C_GENERATE_START_READ; @@ -5454,7 +5645,15 @@ static HAL_StatusTypeDef I2C_Mem_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint3 if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, @@ -5524,9 +5723,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, ITFlags); } - - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ - (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ @@ -6125,6 +6323,7 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) { uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); uint32_t tmpITFlags = ITFlags; + uint32_t tmpoptions = hi2c->XferOptions; HAL_I2C_StateTypeDef tmpstate = hi2c->State; /* Clear STOP Flag */ @@ -6141,6 +6340,11 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; } + else if (tmpstate == HAL_I2C_STATE_LISTEN) + { + I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); + hi2c->PreviousState = I2C_STATE_NONE; + } else { /* Do nothing */ @@ -6207,6 +6411,57 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) hi2c->ErrorCode |= HAL_I2C_ERROR_AF; } + if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) + { + /* Check that I2C transfer finished */ + /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ + /* Mean XferCount == 0*/ + /* So clear Flag NACKF only */ + if (hi2c->XferCount == 0U) + { + if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) + /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + Warning[Pa134]: left and right operands are identical */ + { + /* Call I2C Listen complete process */ + I2C_ITListenCplt(hi2c, tmpITFlags); + } + else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME)) + { + /* Clear NACK Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + + /* Last Byte is Transmitted */ + /* Call I2C Slave Sequential complete process */ + I2C_ITSlaveSeqCplt(hi2c); + } + else + { + /* Clear NACK Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + } + } + else + { + /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ + /* Clear NACK Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + + /* Set ErrorCode corresponding to a Non-Acknowledge */ + hi2c->ErrorCode |= HAL_I2C_ERROR_AF; + + if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) + { + /* Call the corresponding callback to inform upper layer of End of Transfer */ + I2C_ITError(hi2c, hi2c->ErrorCode); + } + } + } + hi2c->Mode = HAL_I2C_MODE_NONE; hi2c->XferISR = NULL; @@ -6624,7 +6879,15 @@ static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) /* Set the XferSize to transfer */ if (hi2c->XferCount > MAX_NBYTE_SIZE) { - hi2c->XferSize = MAX_NBYTE_SIZE; + /* Errata workaround 170323 */ + if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) + { + hi2c->XferSize = 1U; + } + else + { + hi2c->XferSize = MAX_NBYTE_SIZE; + } } else { @@ -6735,6 +6998,12 @@ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uin { while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) { + /* Check if an error is detected */ + if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) + { + return HAL_ERROR; + } + /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) { @@ -6846,16 +7115,18 @@ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) + HAL_StatusTypeDef status = HAL_OK; + + while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) && (status == HAL_OK)) { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) { - return HAL_ERROR; + status = HAL_ERROR; } /* Check if a STOPF is detected */ - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) + if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) && (status == HAL_OK)) { /* Check if an RXNE is pending */ /* Store Last receive data if any */ @@ -6863,19 +7134,14 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, { /* Return HAL_OK */ /* The Reading of data from RXDR will be done in caller function */ - return HAL_OK; + status = HAL_OK; } - else + + /* Check a no-acknowledge have been detected */ + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) - { - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); - hi2c->ErrorCode = HAL_I2C_ERROR_AF; - } - else - { - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - } + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + hi2c->ErrorCode = HAL_I2C_ERROR_AF; /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); @@ -6889,12 +7155,16 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Process Unlocked */ __HAL_UNLOCK(hi2c); - return HAL_ERROR; + status = HAL_ERROR; + } + else + { + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; } } /* Check for the Timeout */ - if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + if ((((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) && (status == HAL_OK)) { if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)) { @@ -6904,11 +7174,11 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, /* Process Unlocked */ __HAL_UNLOCK(hi2c); - return HAL_ERROR; + status = HAL_ERROR; } } } - return HAL_OK; + return status; } /** @@ -7103,13 +7373,13 @@ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ + /* Enable ERR, TC, STOP, NACK and TXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; } if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ + /* Enable ERR, TC, STOP, NACK and RXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; } @@ -7136,13 +7406,13 @@ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) { - /* Enable ERR, TC, STOP, NACK and RXI interrupts */ + /* Enable ERR, TC, STOP, NACK and TXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; } if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) { - /* Enable ERR, TC, STOP, NACK and TXI interrupts */ + /* Enable ERR, TC, STOP, NACK and RXI interrupts */ tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; } @@ -7158,7 +7428,7 @@ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) tmpisr |= (I2C_IT_STOPI | I2C_IT_TCI); } - if ((hi2c->XferISR != I2C_Mem_ISR_DMA) && (InterruptRequest == I2C_XFER_RELOAD_IT)) + if (InterruptRequest == I2C_XFER_RELOAD_IT) { /* Enable TC interrupts */ tmpisr |= I2C_IT_TCI; diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c similarity index 97% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c index 08ef73e..9900d89 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c @@ -1021,7 +1021,10 @@ void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_M assert_param(IS_RCC_MCO(RCC_MCOx)); assert_param(IS_RCC_MCODIV(RCC_MCODiv)); assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); - + + /* Prevent unused argument(s) compilation warning */ + UNUSED(RCC_MCOx); + /* Configure the MCO1 pin in alternate function mode */ gpio.Mode = GPIO_MODE_AF_PP; gpio.Speed = GPIO_SPEED_FREQ_HIGH; diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c similarity index 100% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c similarity index 96% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c index e9828d1..44e40a7 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c @@ -3822,13 +3822,16 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Cha */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { + uint32_t itsource = htim->Instance->DIER; + uint32_t itflag = htim->Instance->SR; + /* Capture compare 1 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) + if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) + if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) { { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; /* Input capture event */ @@ -3856,11 +3859,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* Capture compare 2 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) + if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) + if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) @@ -3886,11 +3889,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* Capture compare 3 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) + if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) + if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) @@ -3916,11 +3919,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* Capture compare 4 event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) + if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) + if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) @@ -3946,11 +3949,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM Update event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) + if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) + if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else @@ -3959,11 +3962,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM Break input event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) + if ((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) != RESET) + if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else @@ -3972,11 +3975,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM Trigger detection event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) + if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) + if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else @@ -3985,11 +3988,11 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) } } /* TIM commutation event */ - if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) + if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) { - if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) != RESET) + if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) { - __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); + __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else @@ -4476,7 +4479,8 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, - uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, uint32_t BurstLength) + uint32_t BurstRequestSrc, const uint32_t *BurstBuffer, + uint32_t BurstLength) { HAL_StatusTypeDef status; @@ -6819,6 +6823,13 @@ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; + + /* Check if the update flag is set after the Update Generation, if so clear the UIF flag */ + if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE)) + { + /* Clear the update flag */ + CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE); + } } /** @@ -6833,11 +6844,12 @@ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -6908,11 +6920,12 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -6941,7 +6954,6 @@ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) tmpccer |= (OC_Config->OCNPolarity << 4U); /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; - } if (IS_TIM_BREAK_INSTANCE(TIMx)) @@ -6984,11 +6996,12 @@ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -7058,11 +7071,12 @@ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Co uint32_t tmpccer; uint32_t tmpcr2; + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; @@ -7253,9 +7267,9 @@ void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC1E; tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; /* Select the Input */ if (IS_TIM_CC2_INSTANCE(TIMx) != RESET) @@ -7343,9 +7357,9 @@ static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC2E; tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; /* Select the Input */ tmpccmr1 &= ~TIM_CCMR1_CC2S; @@ -7382,9 +7396,9 @@ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC2E; tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; @@ -7426,9 +7440,9 @@ static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 3: Reset the CC3E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC3E; tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; /* Select the Input */ tmpccmr2 &= ~TIM_CCMR2_CC3S; @@ -7474,9 +7488,9 @@ static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32 uint32_t tmpccer; /* Disable the Channel 4: Reset the CC4E Bit */ + tmpccer = TIMx->CCER; TIMx->CCER &= ~TIM_CCER_CC4E; tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; /* Select the Input */ tmpccmr2 &= ~TIM_CCMR2_CC4S; diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c similarity index 95% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c index 1a3d770..6964b56 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c @@ -836,7 +836,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe /* Disable the TIM Break interrupt (only if no more channel is active) */ tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) { __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); } @@ -1082,17 +1082,6 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chann (+) Stop the Complementary PWM and disable interrupts. (+) Start the Complementary PWM and enable DMA transfers. (+) Stop the Complementary PWM and disable DMA transfers. - (+) Start the Complementary Input Capture measurement. - (+) Stop the Complementary Input Capture. - (+) Start the Complementary Input Capture and enable interrupts. - (+) Stop the Complementary Input Capture and disable interrupts. - (+) Start the Complementary Input Capture and enable DMA transfers. - (+) Stop the Complementary Input Capture and disable DMA transfers. - (+) Start the Complementary One Pulse generation. - (+) Stop the Complementary One Pulse. - (+) Start the Complementary One Pulse and enable interrupts. - (+) Stop the Complementary One Pulse and disable interrupts. - @endverbatim * @{ */ @@ -1318,7 +1307,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann /* Disable the TIM Break interrupt (only if no more channel is active) */ tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) + if ((tmpccer & TIM_CCER_CCxNE_MASK) == (uint32_t)RESET) { __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); } @@ -2113,7 +2102,7 @@ HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) */ /** - * @brief Hall commutation changed callback in non-blocking mode + * @brief Commutation callback in non-blocking mode * @param htim TIM handle * @retval None */ @@ -2127,7 +2116,7 @@ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) */ } /** - * @brief Hall commutation changed half complete callback in non-blocking mode + * @brief Commutation half complete callback in non-blocking mode * @param htim TIM handle * @retval None */ @@ -2142,7 +2131,7 @@ __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim) } /** - * @brief Hall Break detection callback in non-blocking mode + * @brief Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ @@ -2293,15 +2282,6 @@ static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma) TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); } } - else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - - if (hdma->Init.Mode == DMA_NORMAL) - { - TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); - } - } else { /* nothing to do */ @@ -2370,13 +2350,13 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha { uint32_t tmp; - tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ + tmp = TIM_CCER_CC1NE << (Channel & 0xFU); /* 0xFU = 15 bits max shift */ /* Reset the CCxNE Bit */ TIMx->CCER &= ~tmp; /* Set or reset the CCxNE Bit */ - TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ + TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */ } /** * @} diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c similarity index 96% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c index 1e59c23..b727a98 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c @@ -105,7 +105,7 @@ [..] Use function HAL_UART_UnRegisterCallback() to reset a callback to the default - weak (surcharged) function. + weak function. HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: @@ -127,10 +127,10 @@ [..] By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET - all callbacks are set to the corresponding weak (surcharged) functions: + all callbacks are set to the corresponding weak functions: examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the HAL_UART_Init() + reset to the legacy weak functions in the HAL_UART_Init() and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). @@ -147,7 +147,7 @@ [..] When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available - and weak (surcharged) callbacks are used. + and weak callbacks are used. @endverbatim @@ -191,8 +191,8 @@ /** @addtogroup UART_Private_Functions * @{ */ -static void UART_EndTxTransfer(UART_HandleTypeDef *huart); static void UART_EndRxTransfer(UART_HandleTypeDef *huart); +static void UART_EndTxTransfer(UART_HandleTypeDef *huart); static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma); static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); @@ -330,17 +330,19 @@ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* In asynchronous mode, the following bits must be kept cleared: - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register, - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register.*/ @@ -411,17 +413,19 @@ HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart) __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* In half-duplex mode, the following bits must be kept cleared: - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register, - SCEN (if Smartcard is supported) and IREN (if IrDA is supported) bits in the USART_CR3 register.*/ @@ -512,17 +516,19 @@ HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLe __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* In LIN mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN(if Smartcard is supported) and IREN(if IrDA is supported) bits in the USART_CR3 register.*/ @@ -609,17 +615,19 @@ HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Add __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* In multiprocessor mode, the following bits must be kept cleared: - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register, - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register. */ @@ -738,7 +746,7 @@ __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /** * @brief Register a User UART Callback - * To be used instead of the weak predefined callback + * To be used to override the weak predefined callback * @note The HAL_UART_RegisterCallback() may be called before HAL_UART_Init(), HAL_HalfDuplex_Init(), * HAL_LIN_Init(), HAL_MultiProcessor_Init() or HAL_RS485Ex_Init() in HAL_UART_STATE_RESET to register * callbacks for HAL_UART_MSPINIT_CB_ID and HAL_UART_MSPDEINIT_CB_ID @@ -994,10 +1002,7 @@ HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pU return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_READY) + if (huart->RxState == HAL_UART_STATE_READY) { huart->RxEventCallback = pCallback; } @@ -1008,9 +1013,6 @@ HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pU status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(huart); - return status; } @@ -1024,10 +1026,7 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) { HAL_StatusTypeDef status = HAL_OK; - /* Process locked */ - __HAL_LOCK(huart); - - if (huart->gState == HAL_UART_STATE_READY) + if (huart->RxState == HAL_UART_STATE_READY) { huart->RxEventCallback = HAL_UARTEx_RxEventCallback; /* Legacy weak UART Rx Event Callback */ } @@ -1038,8 +1037,6 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) status = HAL_ERROR; } - /* Release Lock */ - __HAL_UNLOCK(huart); return status; } @@ -3180,6 +3177,13 @@ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); + /* if required, configure RX/TX pins swap */ + if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) + { + assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); + MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); + } + /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) { @@ -3201,13 +3205,6 @@ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); } - /* if required, configure RX/TX pins swap */ - if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - { - assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); - MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - } - /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) { @@ -3333,24 +3330,24 @@ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_ return HAL_TIMEOUT; } - if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) + if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) { - /* Clear Overrun Error flag*/ - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); + /* Clear Overrun Error flag*/ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - /* Blocking error : transfer is aborted - Set the UART state ready to be able to start again the process, - Disable Rx Interrupts if ongoing */ - UART_EndRxTransfer(huart); + /* Blocking error : transfer is aborted + Set the UART state ready to be able to start again the process, + Disable Rx Interrupts if ongoing */ + UART_EndRxTransfer(huart); - huart->ErrorCode = HAL_UART_ERROR_ORE; + huart->ErrorCode = HAL_UART_ERROR_ORE; - /* Process Unlocked */ - __HAL_UNLOCK(huart); + /* Process Unlocked */ + __HAL_UNLOCK(huart); - return HAL_ERROR; + return HAL_ERROR; } if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) { diff --git a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c similarity index 94% rename from stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c rename to stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c index 6e91067..e120002 100644 --- a/stm32f0_cherryusb/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c +++ b/stm32f072_usb_mouse_keyboard/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c @@ -195,17 +195,19 @@ HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, /* Disable the Peripheral */ __HAL_UART_DISABLE(huart); + /* Perform advanced settings configuration */ + /* For some items, configuration requires to be done prior TE and RE bits are set */ + if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) + { + UART_AdvFeatureConfig(huart); + } + /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) { return HAL_ERROR; } - if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - { - UART_AdvFeatureConfig(huart); - } - /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */ SET_BIT(huart->Instance->CR3, USART_CR3_DEM); @@ -634,7 +636,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *p */ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { - HAL_StatusTypeDef status; + HAL_StatusTypeDef status = HAL_OK; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) @@ -659,24 +661,20 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; huart->RxEventType = HAL_UART_RXEVENT_TC; - status = UART_Start_Receive_IT(huart, pData, Size); + (void)UART_Start_Receive_IT(huart, pData, Size); - /* Check Rx process has been successfully started */ - if (status == HAL_OK) + if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - { - __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - } - else - { - /* In case of errors already pending when reception is started, - Interrupts may have already been raised and lead to reception abortion. - (Overrun error for instance). - In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ - status = HAL_ERROR; - } + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + } + else + { + /* In case of errors already pending when reception is started, + Interrupts may have already been raised and lead to reception abortion. + (Overrun error for instance). + In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ + status = HAL_ERROR; } return status; @@ -788,7 +786,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_ * @param huart UART handle. * @retval Rx Event Type (return vale will be a value of @ref UART_RxEvent_Type_Values) */ -HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart) +HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart) { /* Return Rx Event type value, as stored in UART handle */ return (huart->RxEventType); diff --git a/stm32f0_cherryusb/MDK-ARM/startup_stm32f072xb.s b/stm32f072_usb_mouse_keyboard/MDK-ARM/startup_stm32f072xb.s similarity index 100% rename from stm32f0_cherryusb/MDK-ARM/startup_stm32f072xb.s rename to stm32f072_usb_mouse_keyboard/MDK-ARM/startup_stm32f072xb.s diff --git a/stm32f0_cherryusb/MDK-ARM/stm32f0_cherryusb.uvprojx b/stm32f072_usb_mouse_keyboard/MDK-ARM/stm32f072_usb_mouse_keyboard.uvprojx similarity index 94% rename from stm32f0_cherryusb/MDK-ARM/stm32f0_cherryusb.uvprojx rename to stm32f072_usb_mouse_keyboard/MDK-ARM/stm32f072_usb_mouse_keyboard.uvprojx index e31e3f5..a20749c 100644 --- a/stm32f0_cherryusb/MDK-ARM/stm32f0_cherryusb.uvprojx +++ b/stm32f072_usb_mouse_keyboard/MDK-ARM/stm32f072_usb_mouse_keyboard.uvprojx @@ -7,7 +7,7 @@ - stm32f0_cherryusb + stm32f072_usb_mouse_keyboard 0x4 ARM-ADS 6160000::V6.16::ARMCLANG @@ -48,8 +48,8 @@ 0 1 - stm32f0_cherryusb\ - stm32f0_cherryusb + stm32f072_usb_mouse_keyboard\ + stm32f072_usb_mouse_keyboard 1 0 1 @@ -134,11 +134,11 @@ 0 1 1 - 4096 + 4101 1 - BIN\UL2CM3.DLL - "" () + BIN\UL2V8M.DLL + @@ -339,7 +339,7 @@ USE_HAL_DRIVER,STM32F072xB - ../Core/Inc;../Drivers/STM32F0xx_HAL_Driver/Inc;../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy;../Drivers/CMSIS/Device/ST/STM32F0xx/Include;../Drivers/CMSIS/Include;../3rdParty/CherryUSB/class/hid;../3rdParty/CherryUSB/common;../3rdParty/CherryUSB/core;../3rdParty/CherryUSB/port/fsdev + ../Core/Inc;../Drivers/STM32F0xx_HAL_Driver/Inc;../Drivers/STM32F0xx_HAL_Driver/Inc/Legacy;../Drivers/CMSIS/Device/ST/STM32F0xx/Include;../Drivers/CMSIS/Include;..\Third_Party\CherryUSB\class\hid;..\Third_Party\CherryUSB\common;..\Third_Party\CherryUSB\core;..\Third_Party\CherryUSB\port\fsdev @@ -393,16 +393,6 @@ Application/User/Core - - hid_keyboard_mouse.c - 1 - ..\Core\Src\hid_keyboard_mouse.c - - - bsp_key.c - 1 - ..\Core\Src\bsp_key.c - main.c 1 @@ -418,6 +408,16 @@ 1 ../Core/Src/stm32f0xx_hal_msp.c + + bsp_key.c + 1 + ..\Core\Src\bsp_key.c + + + hid_keyboard_mouse.c + 1 + ..\Core\Src\hid_keyboard_mouse.c + @@ -521,22 +521,27 @@ - 3rdParty/CherryUSB + Third_Party/CherryUSB - - usbd_core.c - 1 - ..\3rdParty\CherryUSB\core\usbd_core.c - usbd_hid.c 1 - ..\3rdParty\CherryUSB\class\hid\usbd_hid.c + ..\Third_Party\CherryUSB\class\hid\usbd_hid.c + + + usbd_core.c + 1 + ..\Third_Party\CherryUSB\core\usbd_core.c usb_dc_fsdev.c 1 - ..\3rdParty\CherryUSB\port\fsdev\usb_dc_fsdev.c + ..\Third_Party\CherryUSB\port\fsdev\usb_dc_fsdev.c + + + usb_config.h + 5 + ..\Core\Inc\usb_config.h @@ -553,7 +558,7 @@ - + @@ -563,7 +568,7 @@ - stm32f0_cherryusb + stm32f072_usb_mouse_keyboard 1 diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/LICENSE b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/LICENSE similarity index 100% rename from stm32f0_cherryusb/3rdParty/CherryUSB/LICENSE rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/LICENSE diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/README.md b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/README.md similarity index 70% rename from stm32f0_cherryusb/3rdParty/CherryUSB/README.md rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/README.md index ed382e3..b42a428 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/README.md +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/README.md @@ -17,7 +17,7 @@ In order to make it easier for users to learn USB basics, enumeration, driver lo - Class-drivers and porting-drivers are templating and simplification - Clear API classification (slave: initialisation, registration api, command callback api, data sending and receiving api; host: initialisation, lookup api, data sending and receiving api) -### Easy to use USB +### Easy to use USB In order to facilitate the use of the USB interface and to take into account the fact that users have learned about uart and dma, the following advantages have been designed for the data sending and receiving class of interface: @@ -34,29 +34,16 @@ Taking into account USB performance issues and trying to achieve the theoretical - Unlimited length make it easier to interface with hardware DMA and take advantage of DMA - Subcontracting function is handled in interrupt -## Directoy Structure - -``` -. -├── class -├── common -├── core -├── demo -├── docs -├── osal -├── packet capture -└── port -└── tools - -``` +## Directory Structure | Directory | Description | |:-------------:|:---------------------------:| |class | usb class driver | |common | usb spec macros and utils | |core | usb core implementation | -|demo | different chips demo | +|demo | usb device and host demo | |osal | os wrapper | +|platform | class support for other os | |docs | doc for guiding | |port | usb dcd and hcd porting | |tools | tool url | @@ -78,15 +65,17 @@ CherryUSB Device Stack has the following functions： - Support Device Firmware Upgrade CLASS (DFU) - Support USB MIDI CLASS (MIDI) - Support Remote NDIS (RNDIS) -- Support WINUSB1.0、WINUSB2.0(with BOS) +- Support WINUSB1.0、WINUSB2.0、WEBUSB、BOS - Support Vendor class +- Support UF2 +- Support Android Debug Bridge (Only support shell) - Support multi device with the same USB IP CherryUSB Device Stack resource usage (GCC 10.2 with -O2): | file | FLASH (Byte) | No Cache RAM (Byte) | RAM (Byte) | Heap (Byte) | |:-------------:|:--------------:|:-------------------------:|:-------------:|:----------------:| -|usbd_core.c | 3516 | 256(default) + 320 | 0 | 0 | +|usbd_core.c | 3516 | 512(default) + 320 | 0 | 0 | |usbd_cdc.c | 392 | 0 | 0 | 0 | |usbd_msc.c | 2839 | 128 + 512(default) | 16 | 0 | |usbd_hid.c | 364 | 0 | 0 | 0 | @@ -100,6 +89,7 @@ The CherryUSB Host Stack has a standard enumeration implementation for devices m CherryUSB Host Stack has the following functions： +- Support low speed, full speed, high speed and super speed devices - Automatic loading of supported Class drivers - Support blocking transfers and asynchronous transfers - Support Composite Device @@ -107,11 +97,11 @@ CherryUSB Host Stack has the following functions： - Support Communication Device Class (CDC_ACM, CDC_ECM) - Support Human Interface Device (HID) - Support Mass Storage Class (MSC) -- Support USB Video CLASS (commercial charge) -- Support USB Audio CLASS (commercial charge) +- Support USB Video CLASS (UVC1.0、UVC1.5) +- Support USB Audio CLASS (UAC1.0) - Support Remote NDIS (RNDIS) - Support USB Bluetooth class (support nimble and zephyr bluetooth stack, support **CLASS:0xE0** or vendor class like cdc acm) -- Support Vendor class +- Support Vendor class (serial, net, wifi) - Support USB modeswitch - Support multi host with the same USB IP @@ -121,14 +111,14 @@ CherryUSB Host Stack resource usage (GCC 10.2 with -O2): | file | FLASH (Byte) | No Cache RAM (Byte) | RAM (Byte) | Heap (Byte) | |:-------------:|:--------------:|:-------------------------------:|:---------------------------:|:------------:| -|usbh_core.c | ~7700 | 512 + 8 * (1+x) *n | 28 | 0 | +|usbh_core.c | ~7700 | 512 + 8 * (1+x) *n | 28 | raw_config_desc | |usbh_hub.c | ~5600 | 32 + 4* (1+x) | 12 + sizeof(struct usbh_hub) * (1+x) | 0 | |usbh_cdc_acm.c | ~1200 | 7 | 4 + sizeof(struct usbh_cdc_acm) * x | 0 | |usbh_msc.c | ~2500 | 32 | 4 + sizeof(struct usbh_msc) * x | 0 | |usbh_hid.c | ~1000 | 128 | 4 + sizeof(struct usbh_hid) * x | 0 | |usbh_video.c | ~3700 | 128 | 4 + sizeof(struct usbh_video) * x | 0 | |usbh_audio.c | ~3100 | 128 | 4 + sizeof(struct usbh_audio) * x | 0 | -|usbh_rndis.c | ~3900 | 4096 + 2 * 2048 | sizeof(struct usbh_rndis) * 1 | 0 | +|usbh_rndis.c | ~3900 | 4096 + 2 * 2048(default)| sizeof(struct usbh_rndis) * 1 | 0 | |usbh_cdc_ecm.c | ~2500 | 2 * 1514 | sizeof(struct usbh_cdc_ecm) * 1 | 0 | |usbh_bluetooth.c | ~2300 | 2 * 2048(default) | sizeof(struct usbh_bluetooth) * 1 | 0 | @@ -161,10 +151,11 @@ Only standard and commercial USB IP are listed. | OHCI(intel) | none | OHCI | × | | EHCI(intel) | none | EHCI | √ | | XHCI(intel) | none | XHCI | √ | -| UHCI(intel) | none | UHCI | × | +| UHCI(intel) | none | UHCI | × | | DWC2(synopsys) | DWC2 | DWC2 | √ | | MUSB(mentor) | MUSB | MUSB | √ | | FOTG210(faraday)| FOTG210 | EHCI | √ | +| CHIPIDEA(synopsys)| CHIPIDEA | EHCI | √ | | CDNS2(cadence) | CDNS2 | CDNS2 | √ | | CDNS3(cadence) | CDNS3 | XHCI | × | | DWC3(synopsys) | DWC3 | XHCI | × | @@ -186,17 +177,31 @@ USB basic concepts and how the CherryUSB Device stack is implemented, see [Cherr | Manufacturer | CHIP or Series | USB IP| Repo Url | Support version | Support status | |:--------------------:|:------------------:|:-----:|:--------:|:------------------:|:-------------:| |Bouffalolab | BL702/BL616/BL808 | bouffalolab/ehci|[bouffalo_sdk](https://github.com/CherryUSB/bouffalo_sdk)|<= latest | Long-term | -|ST | STM32F1x | fsdev |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | -|ST | STM32F4/STM32H7 | dwc2 |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | -|HPMicro | HPM6750 | hpm/ehci |[hpm_sdk](https://github.com/CherryUSB/hpm_sdk)|<= latest | Long-term | -|Essemi | ES32F36xx | musb |[es32f369_repo](https://github.com/CherryUSB/cherryusb_es32)|<= latest | Long-term | -|Phytium | e2000 | pusb2/xhci |[phytium_repo](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk)|v0.10.2 | Long-term | -|artinchip | d12x/d13x/d21x | dwc2/ehci/ohci |[luban-lite](https://gitee.com/artinchip/luban-lite)|<= latest | Long-term | -|Espressif | esp32s2/esp32s3 | dwc2 |[esp32_repo](https://github.com/CherryUSB/cherryusb_esp32)|<= latest | the same with ST | -|AllwinnerTech | F1C100S/F1C200S | musb |[cherryusb_rtt_f1c100s](https://github.com/CherryUSB/cherryusb_rtt_f1c100s)|<= latest | the same with Essemi | -|WCH | CH32V307/ch58x | ch32_usbfs/ch32_usbhs/ch58x |[wch_repo](https://github.com/CherryUSB/cherryusb_wch)|<= v0.10.2 | TBD | -|Nordicsemi | Nrf52840 | nrf5x |[nrf5x_repo](https://github.com/CherryUSB/cherryusb_nrf5x)|<= v0.10.2 | No more updated | -|Raspberry pi | rp2040 | rp2040 |[pico-examples](https://github.com/CherryUSB/pico-examples)|<= v0.10.2 | No more updated | +|ST | STM32F1x | fsdev |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | +|ST | STM32F4/STM32H7 | dwc2 |[stm32_repo](https://github.com/CherryUSB/cherryusb_stm32)|<= latest | Long-term | +|HPMicro | HPM6000/HPM5000 | hpm/ehci |[hpm_sdk](https://github.com/CherryUSB/hpm_sdk)|<= latest | Long-term | +|Essemi | ES32F36xx | musb |[es32f369_repo](https://github.com/CherryUSB/cherryusb_es32)|<= latest | Long-term | +|Phytium | e2000 | pusb2/xhci |[phytium_repo](https://gitee.com/phytium_embedded/phytium-free-rtos-sdk)|>=1.4.0 | Long-term | +|Artinchip | d12x/d13x/d21x | aic/ehci/ohci |[luban-lite](https://gitee.com/artinchip/luban-lite)|<= latest | Long-term | +|Espressif | esp32s2/esp32s3/esp32p4 | dwc2 |[esp32_repo](https://github.com/CherryUSB/cherryusb_esp32)|<= latest | Long-term | +|NXP | mcx | chipidea/ehci |[nxp_mcx_repo](https://github.com/CherryUSB/cherryusb_mcx)|<= latest | Long-term | +|AllwinnerTech | F1C100S/F1C200S | musb |[cherryusb_rtt_f1c100s](https://github.com/CherryUSB/cherryusb_rtt_f1c100s)|<= latest | the same with musb | +|Bekencorp | bk7256/bk7258 | musb |[bk_idk](https://github.com/CherryUSB/bk_idk)| v0.7.0 | the same with musb | +|Sophgo | cv18xx | dwc2 |[cvi_alios_open](https://github.com/CherryUSB/cvi_alios_open)| v0.7.0 | TBD | +|WCH | CH32V307/ch58x | ch32_usbfs/ch32_usbhs/ch58x |[wch_repo](https://github.com/CherryUSB/cherryusb_wch)|<= v0.10.2 | TBD | +|Raspberry pi | rp2040 | rp2040 |[pico-examples](https://github.com/CherryUSB/pico-examples)|<= v0.10.2 | No more updated | + +## Package Support + +CherryUSB package is available as follows: + +- [RT-Thread](https://packages.rt-thread.org/detail.html?package=CherryUSB) +- [YOC](https://www.xrvm.cn/document?temp=usb-host-protocol-stack-device-driver-adaptation-instructions&slug=yocbook) +- [ESP-Registry](https://components.espressif.com/components/cherry-embedded/cherryusb) + +## Commercial Support + +Refer to https://cherryusb.readthedocs.io/zh-cn/latest/support/index.html. ## Contact @@ -206,4 +211,4 @@ CherryUSB discord: https://discord.com/invite/wFfvrSAey8. Thanks to the following companies for their support (in no particular order). - \ No newline at end of file + diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/class/hid/usb_hid.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/class/hid/usb_hid.h similarity index 97% rename from stm32f0_cherryusb/3rdParty/CherryUSB/class/hid/usb_hid.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/class/hid/usb_hid.h index 4fd1f8e..b244d11 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/class/hid/usb_hid.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/class/hid/usb_hid.h @@ -1,585 +1,583 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USB_HID_H -#define USB_HID_H - -/* Subclass codes (HID 4.2) */ -#define HID_SUBCLASS_NONE 0 /* No subclass */ -#define HID_SUBCLASS_BOOTIF 1 /* Boot Interface Subclass */ - -/* HID Protocol Codes (HID 4.3) */ -#define HID_PROTOCOL_NONE 0x00 -#define HID_PROTOCOL_BOOT 0x00 -#define HID_PROTOCOL_KEYBOARD 0x01 -#define HID_PROTOCOL_REPORT 0x01 -#define HID_PROTOCOL_MOUSE 0x02 - -/* HID Class Descriptor Types (HID 7.1) */ -#define HID_DESCRIPTOR_TYPE_HID 0x21 -#define HID_DESCRIPTOR_TYPE_HID_REPORT 0x22 -#define HID_DESCRIPTOR_TYPE_HID_PHYSICAL 0x23 - -/* HID Class Specific Requests (HID 7.2) */ -#define HID_REQUEST_GET_REPORT 0x01 -#define HID_REQUEST_GET_IDLE 0x02 -#define HID_REQUEST_GET_PROTOCOL 0x03 -#define HID_REQUEST_SET_REPORT 0x09 -#define HID_REQUEST_SET_IDLE 0x0A -#define HID_REQUEST_SET_PROTOCOL 0x0B - -/* Report Type (MS byte of wValue for GET_REPORT) (HID 7.2.1) */ -#define HID_REPORT_INPUT 0x01 -#define HID_REPORT_OUTPUT 0x02 -#define HID_REPORT_FEATURE 0x03 - -/* HID Descriptor ***********************************************************/ - -#define HID_COUNTRY_NONE 0x00 /* Not Supported */ -#define HID_COUNTRY_ARABIC 0x01 /* Arabic */ -#define HID_COUNTRY_BELGIAN 0x02 /* Belgian */ -#define HID_COUNTRY_CANADA 0x03 /* Canadian-Bilingual */ -#define HID_COUNTRY_CANADRFR 0x04 /* Canadian-French */ -#define HID_COUNTRY_CZECH 0x05 /* Czech Republic */ -#define HID_COUNTRY_DANISH 0x06 /* Danish */ -#define HID_COUNTRY_FINNISH 0x07 /* Finnish */ -#define HID_COUNTRY_FRENCH 0x08 /* French */ -#define HID_COUNTRY_GERMAN 0x09 /* German */ -#define HID_COUNTRY_GREEK 0x10 /* Greek */ -#define HID_COUNTRY_HEBREW 0x11 /* Hebrew */ -#define HID_COUNTRY_HUNGARY 0x12 /* Hungary */ -#define HID_COUNTRY_ISO 0x13 /* International (ISO) */ -#define HID_COUNTRY_ITALIAN 0x14 /* Italian */ -#define HID_COUNTRY_JAPAN 0x15 /* Japan (Katakana) */ -#define HID_COUNTRY_KOREAN 0x16 /* Korean */ -#define HID_COUNTRY_LATINAM 0x17 /* Latin American */ -#define HID_COUNTRY_DUTCH 0x18 /* Netherlands/Dutch */ -#define HID_COUNTRY_NORWEGIAN 0x19 /* Norwegian */ -#define HID_COUNTRY_PERSIAN 0x20 /* Persian (Farsi) */ -#define HID_COUNTRY_POLAND 0x21 /* Poland */ -#define HID_COUNTRY_PORTUGUESE 0x22 /* Portuguese */ -#define HID_COUNTRY_RUSSIA 0x23 /* Russia */ -#define HID_COUNTRY_SLOVAKIA 0x24 /* Slovakia */ -#define HID_COUNTRY_SPANISH 0x25 /* Spanish */ -#define HID_COUNTRY_SWEDISH 0x26 /* Swedish */ -#define HID_COUNTRY_SWISSFR 0x27 /* Swiss/French */ -#define HID_COUNTRY_SWISSGR 0x28 /* Swiss/German */ -#define HID_COUNTRY_SWITZERLAND 0x29 /* Switzerland */ -#define HID_COUNTRY_TAIWAN 0x30 /* Taiwan */ -#define HID_COUNTRY_TURKISHQ 0x31 /* Turkish-Q */ -#define HID_COUNTRY_UK 0x32 /* UK */ -#define HID_COUNTRY_US 0x33 /* US */ -#define HID_COUNTRY_YUGOSLAVIA 0x34 /* Yugoslavia */ -#define HID_COUNTRY_TURKISHF 0x35 /* Turkish-F */ - -/* HID report items */ -#define HID_REPORT_ITEM_SIZE_MASK 0x03 -#define HID_REPORT_ITEM_SIZE_0 0x00 /* No data follows */ -#define HID_REPORT_ITEM_SIZE_1 0x01 /* 1 byte of data follows */ -#define HID_REPORT_ITEM_SIZE_2 0x02 /* 2 bytes of data follow */ -#define HID_REPORT_ITEM_SIZE_4 0x03 /* 4 bytes of data follow */ -#define HID_REPORT_ITEM_TYPE_MASK 0x0c -#define HID_REPORT_ITEM_TYPE_MAIN 0x00 -#define HID_REPORT_ITEM_TYPE_GLOBAL 0x04 -#define HID_REPORT_ITEM_TYPE_LOCAL 0x08 -#define HID_REPORT_ITEM_TAG_MASK 0xf0 - -/* Main Items (HID 6.2.2.4) */ -#define HID_MAIN_ITEM_CONSTANT (1 << 0) /* Constant(1) vs Data(0) */ -#define HID_MAIN_ITEM_VARIABLE (1 << 1) /* Variable(1) vs Array(0) */ -#define HID_MAIN_ITEM_RELATIVE (1 << 2) /* Relative(1) vs Absolute(0) */ -#define HID_MAIN_ITEM_WRAP (1 << 3) /* Wrap(1) vs No Wrap(0) */ -#define HID_MAIN_ITEM_NONLINEAR (1 << 4) /* Non Linear(1) vs Linear(0) */ -#define HID_MAIN_ITEM_NOPREFERRED (1 << 5) /* No Preferred (1) vs Preferred State(0) */ -#define HID_MAIN_ITEM_NULLSTATE (1 << 6) /* Null state(1) vs No Null position(0) */ -#define HID_MAIN_ITEM_VOLATILE (1 << 7) /* Volatile(1) vs Non volatile(0) */ -#define HID_MAIN_ITEM_BUFFEREDBYTES (1 << 8) /* Buffered Bytes(1) vs Bit Field(0) */ - -#define HID_MAIN_ITEM_SIZE(pfx) ((pfx)&HID_REPORT_ITEM_SIZE_MASK) -#define HID_MAIN_ITEM_INPUT_PREFIX 0x80 -#define HID_MAIN_ITEM_INPUT_CONSTANT HID_MAIN_ITEM_CONSTANT -#define HID_MAIN_ITEM_INPUT_VARIABLE HID_MAIN_ITEM_VARIABLE -#define HID_MAIN_ITEM_INPUT_RELATIVE HID_MAIN_ITEM_RELATIVE -#define HID_MAIN_ITEM_INPUT_WRAP HID_MAIN_ITEM_WRAP -#define HID_MAIN_ITEM_INPUT_NONLINEAR HID_MAIN_ITEM_NONLINEAR -#define HID_MAIN_ITEM_INPUT_NOPREFERRED HID_MAIN_ITEM_NOPREFERRED -#define HID_MAIN_ITEM_INPUT_NULLSTATE HID_MAIN_ITEM_NULLSTATE -#define HID_MAIN_ITEM_INPUT_BUFFEREDBYTES HID_MAIN_ITEM_BUFFEREDBYTES - -#define HID_MAIN_ITEM_OUTPUT_PREFIX 0x90 -#define HID_MAIN_ITEM_OUTPUT_CONSTANT HID_MAIN_ITEM_CONSTANT -#define HID_MAIN_ITEM_OUTPUT_VARIABLE HID_MAIN_ITEM_VARIABLE -#define HID_MAIN_ITEM_OUTPUT_RELATIVE HID_MAIN_ITEM_RELATIVE -#define HID_MAIN_ITEM_OUTPUT_WRAP HID_MAIN_ITEM_WRAP -#define HID_MAIN_ITEM_OUTPUT_NONLINEAR HID_MAIN_ITEM_NONLINEAR -#define HID_MAIN_ITEM_OUTPUT_NOPREFERRED HID_MAIN_ITEM_NOPREFERRED -#define HID_MAIN_ITEM_OUTPUT_NULLSTATE HID_MAIN_ITEM_NULLSTATE -#define HID_MAIN_ITEM_OUTPUT_VOLATILE HID_MAIN_ITEM_VOLATILE -#define HID_MAIN_ITEM_OUTPUT_BUFFEREDBYTES HID_MAIN_ITEM_BUFFEREDBYTES - -#define HID_MAIN_ITEM_FEATURE_PREFIX 0xb0 -#define HID_MAIN_ITEM_FEATURE_CONSTANT HID_MAIN_ITEM_CONSTANT -#define HID_MAIN_ITEM_FEATURE_VARIABLE HID_MAIN_ITEM_VARIABLE -#define HID_MAIN_ITEM_FEATURE_RELATIVE HID_MAIN_ITEM_RELATIVE -#define HID_MAIN_ITEM_FEATURE_WRAP HID_MAIN_ITEM_WRAP -#define HID_MAIN_ITEM_FEATURE_NONLINEAR HID_MAIN_ITEM_NONLINEAR -#define HID_MAIN_ITEM_FEATURE_NOPREFERRED HID_MAIN_ITEM_NOPREFERRED -#define HID_MAIN_ITEM_FEATURE_NULLSTATE HID_MAIN_ITEM_NULLSTATE -#define HID_MAIN_ITEM_FEATURE_VOLATILE HID_MAIN_ITEM_VOLATILE -#define HID_MAIN_ITEM_FEATURE_BUFFEREDBYTES HID_MAIN_ITEM_BUFFEREDBYTES - -#define HID_MAIN_ITEM_COLLECTION_PREFIX 0xa0 -#define HID_MAIN_ITEM_COLLECTION_PHYSICAL 0x00 /* Physical (group of axes) */ -#define HID_MAIN_ITEM_COLLECTION_APPL 0x01 /* Application (mouse, keyboard) */ -#define HID_MAIN_ITEM_COLLECTION_LOGICAL 0x02 /* Logical (interrelated data) */ -#define HID_MAIN_ITEM_COLLECTION_REPORT 0x03 /* Report */ -#define HID_MAIN_ITEM_COLLECTION_ARRAY 0x04 /* Named Array */ -#define HID_MAIN_ITEM_COLLECTION_SWITCH 0x05 /* Usage Switch */ -#define HID_MAIN_ITEM_COLLECTION_MODIFIER 0x06 /* Usage Modifier */ -#define HID_MAIN_ITEM_ENDCOLLECTION_PREFIX 0xc0 - -/* Global Items (HID 6.2.2.7) */ -#define HID_GLOBAL_ITEM_SIZE(pfx) ((pfx)&HID_REPORT_ITEM_SIZE_MASK) -#define HID_GLOBAL_ITEM_USAGEPAGE_PREFIX 0x04 /* Usage Page */ -#define HID_GLOBAL_ITEM_LOGICALMIN_PREFIX 0x14 /* Logical Minimum */ -#define HID_GLOBAL_ITEM_LOGICALMAX_PREFIX 0x24 /* Logical Maximum */ -#define HID_GLOBAL_ITEM_PHYSICALMIN_PREFIX 0x34 /* Physical Minimum */ -#define HID_GLOBAL_ITEM_PHYSMICALAX_PREFIX 0x44 /* Physical Maximum */ -#define HID_GLOBAL_ITEM_UNITEXP_PREFIX 0x54 /* Unit Exponent */ -#define HID_GLOBAL_ITEM_UNIT_PREFIX 0x64 /* Unit */ -#define HID_GLOBAL_ITEM_REPORTSIZE_PREFIX 0x74 /* Report Size */ -#define HID_GLOBAL_ITEM_REPORTID_PREFIX 0x84 /* Report ID */ -#define HID_GLOBAL_ITEM_REPORTCOUNT_PREFIX 0x94 /* Report Count */ -#define HID_GLOBAL_ITEM_PUSH_PREFIX 0xa4 /* Push */ -#define HID_GLOBAL_ITEM_POP_PREFIX 0xb4 /* Pop */ - -/* Local Items (HID 6.2.2.8) */ -#define HID_LOCAL_ITEM_SIZE(pfx) ((pfx)&HID_REPORT_ITEM_SIZE_MASK) -#define HID_LOCAL_ITEM_USAGE_PREFIX 0x08 /* Usage */ -#define HID_LOCAL_ITEM_USAGEMIN_PREFIX 0x18 /* Usage Minimum */ -#define HID_LOCAL_ITEM_USAGEMAX_PREFIX 0x28 /* Usage Maximum */ -#define HID_LOCAL_ITEM_DESIGNATORIDX_PREFIX 0x38 /* Designator Index */ -#define HID_LOCAL_ITEM_DESIGNATORMIN_PREFIX 0x48 /* Designator Minimum */ -#define HID_LOCAL_ITEM_DESIGNATORMAX_PREFIX 0x58 /* Designator Maximum */ -#define HID_LOCAL_ITEM_STRINGIDX_PREFIX 0x78 /* String Index */ -#define HID_LOCAL_ITEM_STRINGMIN_PREFIX 0x88 /* String Minimum */ -#define HID_LOCAL_ITEM_STRINGMAX_PREFIX 0x98 /* xx */ -#define HID_LOCAL_ITEM_DELIMITER_PREFIX 0xa8 /* Delimiter */ - -/* Modifier Keys (HID 8.3) */ -#define HID_MODIFER_LCTRL (1 << 0) /* Left Ctrl */ -#define HID_MODIFER_LSHIFT (1 << 1) /* Left Shift */ -#define HID_MODIFER_LALT (1 << 2) /* Left Alt */ -#define HID_MODIFER_LGUI (1 << 3) /* Left GUI */ -#define HID_MODIFER_RCTRL (1 << 4) /* Right Ctrl */ -#define HID_MODIFER_RSHIFT (1 << 5) /* Right Shift */ -#define HID_MODIFER_RALT (1 << 6) /* Right Alt */ -#define HID_MODIFER_RGUI (1 << 7) /* Right GUI */ - -/* Keyboard output report (1 byte) (HID B.1) */ -#define HID_KBD_OUTPUT_REPORT_NUMLOCK (1 << 0) -#define HID_KBD_OUTPUT_REPORT_CAPSLOCK (1 << 1) -#define HID_KBD_OUTPUT_REPORT_SCROLLLOCK (1 << 2) -#define HID_KBD_OUTPUT_REPORT_COMPOSE (1 << 3) -#define HID_KBD_OUTPUT_REPORT_KANA (1 << 4) - -/* Mouse input report (HID B.2) */ -#define HID_MOUSE_INPUT_REPORT_BUTTON1 (1 << 0) -#define HID_MOUSE_INPUT_REPORT_BUTTON2 (1 << 1) -#define HID_MOUSE_INPUT_REPORT_BUTTON3 (1 << 2) -#define HID_MOUSE_INPUT_REPORT_BUTTON_MASK (7) - -#define HID_MOUSE_INPUT_BUTTON_LEFT (1 << 0) -#define HID_MOUSE_INPUT_BUTTON_RIGHT (1 << 1) -#define HID_MOUSE_INPUT_BUTTON_MIDDLE (1 << 2) -#define HID_MOUSE_INPUT_BUTTON_BACKWARD (1 << 3) -#define HID_MOUSE_INPUT_BUTTON_FORWARD (1 << 4) - -/* Joystick input report (4 bytes) (HID D.1) */ -#define HID_JS_INPUT_REPORT_HATSWITCH_SHIFT (0) -#define HID_JS_INPUT_REPORT_HATSWITCH_MASK (15 << HID_JSIN_HATSWITCH_SHIFT) -#define HID_JS_INPUT_REPORT_BUTTON1 (1 << 4) -#define HID_JS_INPUT_REPORT_BUTTON2 (1 << 5) -#define HID_JS_INPUT_REPORT_BUTTON3 (1 << 6) -#define HID_JS_INPUT_REPORT_BUTTON4 (1 << 7) - -/* Usage pages (HuT 3) */ -#define HID_USAGE_PAGE_UNDEFINED 0x00 /* Undefined */ -#define HID_USAGE_PAGE_GENERIC_DCTRL 0x01 /* Generic Desktop Controls */ -#define HID_USAGE_PAGE_SIMCTRL 0x02 /* Simulation Controls */ -#define HID_USAGE_PAGE_VRCTRL 0x03 /* VR Controls */ -#define HID_USAGE_PAGE_SPORTCTRL 0x04 /* Sport Controls */ -#define HID_USAGE_PAGE_GAMECTRL 0x05 /* Game Controls */ -#define HID_USAGE_PAGE_GENERIC_DEVCTRL 0x06 /* Generic Device Controls */ -#define HID_USAGE_PAGE_KBD 0x07 /* Keyboard/Keypad */ -#define HID_USAGE_PAGE_LEDS 0x08 /* LEDs */ -#define HID_USAGE_PAGE_BUTTON 0x09 /* Button */ -#define HID_USAGE_PAGE_ORDINAL 0x0a /* Ordinal */ -#define HID_USAGE_PAGE_TELEPHONY 0x0b /* Telephony */ -#define HID_USAGE_PAGE_CONSUMER 0x0c /* Consumer */ -#define HID_USAGE_PAGE_DIGITIZER 0x0d /* Digitizer */ - /* 0x0e Reserved */ -#define HID_USAGE_PAGE_PIDPAGE 0x0f /* PID Page Physical Interface Device */ -#define HID_USAGE_PAGE_UNICODE 0x10 /* Unicode */ - /* 0x11-13 Reserved */ -#define HID_USAGE_PAGE_ALPHA_DISPLAY 0x14 /* Alphanumeric Display */ - /* 0x15-3f Reserved */ -#define HID_USAGE_PAGE_MEDICAL 0x40 /* Medical Instruments */ - /* 0x41-7f Reserved */ - /* 0x80-83 Monitor Devices */ - /* 0x84-87 Power Devices */ - /* 0x88-8b Reserved */ -#define HID_USAGE_PAGE_BARCODE_SCANNER 0x8c /* Bar Code Scanner page */ -#define HID_USAGE_PAGE_SCALE 0x8d /* Scale page */ -#define HID_USAGE_PAGE_MSR 0x8e /* Magnetic Stripe Reading (MSR) Devices */ -#define HID_USAGE_PAGE_POS 0x8f /* Point of Sale devices */ -#define HID_USAGE_PAGE_CAMERA_CTRL 0x90 /* Camera Control Page */ - -/* Generic Desktop Page Usage IDs (HuT 4) */ -#define HID_DESKTOP_USAGE_UNDEFINED 0x00 /* Undefined */ -#define HID_DESKTOP_USAGE_POINTER 0x01 /* Pointer */ -#define HID_DESKTOP_USAGE_MOUSE 0x02 /* Mouse */ - /* 0x03 Reserved */ -#define HID_DESKTOP_USAGE_JOYSTICK 0x04 /* Joystick */ -#define HID_DESKTOP_USAGE_GAMEPAD 0x05 /* Game Pad */ -#define HID_DESKTOP_USAGE_KEYBOARD 0x06 /* Keyboard */ -#define HID_DESKTOP_USAGE_KEYPAD 0x07 /* Keypad */ -#define HID_DESKTOP_USAGE_MULTIAXIS 0x08 /* Multi-axis Controller */ -#define HID_DESKTOP_USAGE_TABLET 0x09 /* Tablet PC System Controls */ - /* 0x0a-2f Reserved */ -#define HID_DESKTOP_USAGE_X 0x30 /* X */ -#define HID_DESKTOP_USAGE_Y 0x31 /* Y */ -#define HID_DESKTOP_USAGE_Z 0x32 /* Z */ -#define HID_DESKTOP_USAGE_RX 0x33 /* Rx */ -#define HID_DESKTOP_USAGE_RY 0x34 /* Ry */ -#define HID_DESKTOP_USAGE_RZ 0x35 /* Rz */ -#define HID_DESKTOP_USAGE_SLIDER 0x36 /* Slider */ -#define HID_DESKTOP_USAGE_DIAL 0x37 /* Dial */ -#define HID_DESKTOP_USAGE_WHEEL 0x38 /* Wheel */ -#define HID_DESKTOP_USAGE_HATSWITCH 0x39 /* Hat switch */ -#define HID_DESKTOP_USAGE_COUNTED 0x3a /* Counted Buffer */ -#define HID_DESKTOP_USAGE_BYTECOUNT 0x3b /* Byte Count */ -#define HID_DESKTOP_USAGE_MOTION 0x3c /* Motion Wakeup */ -#define HID_DESKTOP_USAGE_START 0x3d /* Start */ -#define HID_DESKTOP_USAGE_SELECT 0x3e /* Select */ - /* 0x3f Reserved */ -#define HID_DESKTOP_USAGE_VX 0x40 /* Vx */ -#define HID_DESKTOP_USAGE_VY 0x41 /* Vy */ -#define HID_DESKTOP_USAGE_VZ 0x42 /* Vz */ -#define HID_DESKTOP_USAGE_VBRX 0x43 /* Vbrx */ -#define HID_DESKTOP_USAGE_VBRY 0x44 /* Vbry */ -#define HID_DESKTOP_USAGE_VBRZ 0x45 /* Vbrz */ -#define HID_DESKTOP_USAGE_VNO 0x46 /* Vno */ -#define HID_DESKTOP_USAGE_FEATURE 0x47 /* Feature Notification */ -#define HID_DESKTOP_USAGE_RESOLUTION 0x48 /* Resolution Multiplier */ - /* 0x49-7f Reserved */ -#define HID_DESKTOP_USAGE_CONTROL 0x80 /* System Control */ -#define HID_DESKTOP_USAGE_POWERDOWN 0x81 /* System Power Down */ -#define HID_DESKTOP_USAGE_SLEEP 0x82 /* System Sleep */ -#define HID_DESKTOP_USAGE_WAKEUP 0x83 /* System Wake Up */ -#define HID_DESKTOP_USAGE_CONTEXT_MENU 0x84 /* System Context Menu */ -#define HID_DESKTOP_USAGE_MAIN_MENU 0x85 /* System Main Menu */ -#define HID_DESKTOP_USAGE_APP_MENU 0x86 /* System App Menu */ -#define HID_DESKTOP_USAGE_MENU_HELP 0x87 /* System Menu Help */ -#define HID_DESKTOP_USAGE_MENU_EXIT 0x88 /* System Menu Exit */ -#define HID_DESKTOP_USAGE_MENU_SELECT 0x89 /* System Menu Select */ -#define HID_DESKTOP_USAGE_MENU_RIGHT 0x8a /* System Menu Right */ -#define HID_DESKTOP_USAGE_MENU_LEFT 0x8b /* System Menu Left */ -#define HID_DESKTOP_USAGE_MENU_UP 0x8c /* System Menu Up */ -#define HID_DESKTOP_USAGE_MENU_DOWN 0x8d /* System Menu Down */ -#define HID_DESKTOP_USAGE_COLD_RESTART 0x8e /* System Cold Restart */ -#define HID_DESKTOP_USAGE_WARM_RESTART 0x8f /* System Warm Restart */ -#define HID_DESKTOP_USAGE_DPAD_UP 0x90 /* D-pad Up */ -#define HID_DESKTOP_USAGE_DPAD_DOWN 0x91 /* D-pad Down */ -#define HID_DESKTOP_USAGE_DPAD_RIGHT 0x92 /* D-pad Right */ -#define HID_DESKTOP_USAGE_DPAD_LEFT 0x93 /* D-pad Left */ - /* 0x94-9f Reserved */ -#define HID_DESKTOP_USAGE_DOCK 0xa0 /* System Dock */ -#define HID_DESKTOP_USAGE_UNDOCK 0xa1 /* System Undock */ -#define HID_DESKTOP_USAGE_SETUP 0xa2 /* System Setup */ -#define HID_DESKTOP_USAGE_BREAK 0xa3 /* System Break */ -#define HID_DESKTOP_USAGE_DEBUG_BREAK 0xa4 /* System Debugger Break */ -#define HID_DESKTOP_USAGE_APP_BREAK 0xa5 /* Application Break */ -#define HID_DESKTOP_USAGE_APP_DEBUG_BREAK 0xa6 /* Application Debugger Break */ -#define HID_DESKTOP_USAGE_MUTE 0xa7 /* System Speaker Mute */ -#define HID_DESKTOP_USAGE_HIBERNATE 0xa8 /* System Hibernate */ - /* 0xa9-af Reserved */ -#define HID_DESKTOP_USAGE_DISPLAY_INVERT 0xb0 /* System Display Invert */ -#define HID_DESKTOP_USAGE_DISPALY_INTERNAL 0xb1 /* System Display Internal */ -#define HID_DESKTOP_USAGE_DISPLAY_EXTERNAL 0xb2 /* System Display External */ -#define HID_DESKTOP_USAGE_DISPLAY_BOTH 0xb3 /* System Display Both */ -#define HID_DESKTOP_USAGE_DISPLAY_DUAL 0xb4 /* System Display Dual */ -#define HID_DESKTOP_USAGE_DISPLAY_TOGGLE 0xb5 /* System Display Toggle Int/Ext */ -#define HID_DESKTOP_USAGE_DISPLAY_SWAP 0xb6 /* System Display Swap */ -#define HID_DESKTOP_USAGE_ 0xb7 /* System Display LCD Autoscale */ - /* 0xb8-ffff Reserved */ - -/* Keyboard usage IDs (HuT 10) */ -#define HID_KBD_USAGE_NONE 0x00 /* Reserved (no event indicated) */ -#define HID_KBD_USAGE_ERRORROLLOVER 0x01 /* Keyboard ErrorRollOver */ -#define HID_KBD_USAGE_POSTFAIL 0x02 /* Keyboard POSTFail */ -#define HID_KBD_USAGE_ERRUNDEF 0x03 /* Keyboard ErrorUndefined */ -#define HID_KBD_USAGE_A 0x04 /* Keyboard a or A (B-Z follow) */ -#define HID_KBD_USAGE_1 0x1e /* Keyboard 1 (2-9 follow) */ -#define HID_KBD_USAGE_EXCLAM 0x1e /* Keyboard 1 and ! */ -#define HID_KBD_USAGE_AT 0x1f /* Keyboard 2 and @ */ -#define HID_KBD_USAGE_POUND 0x20 /* Keyboard 3 and # */ -#define HID_KBD_USAGE_DOLLAR 0x21 /* Keyboard 4 and $ */ -#define HID_KBD_USAGE_PERCENT 0x22 /* Keyboard 5 and % */ -#define HID_KBD_USAGE_CARAT 0x23 /* Keyboard 6 and ^ */ -#define HID_KBD_USAGE_AMPERSAND 0x24 /* Keyboard 7 and & */ -#define HID_KBD_USAGE_ASTERISK 0x25 /* Keyboard 8 and * */ -#define HID_KBD_USAGE_LPAREN 0x26 /* Keyboard 9 and ( */ -#define HID_KBD_USAGE_0 0x27 /* Keyboard 0 and ) */ -#define HID_KBD_USAGE_RPAREN 0x27 /* Keyboard 0 and ) */ -#define HID_KBD_USAGE_ENTER 0x28 /* Keyboard Return (ENTER) */ -#define HID_KBD_USAGE_ESCAPE 0x29 /* Keyboard ESCAPE */ -#define HID_KBD_USAGE_DELETE 0x2a /* Keyboard DELETE (Backspace) */ -#define HID_KBD_USAGE_TAB 0x2b /* Keyboard Tab */ -#define HID_KBD_USAGE_SPACE 0x2c /* Keyboard Spacebar */ -#define HID_KBD_USAGE_HYPHEN 0x2d /* Keyboard - and (underscore) */ -#define HID_KBD_USAGE_UNDERSCORE 0x2d /* Keyboard - and (underscore) */ -#define HID_KBD_USAGE_EQUAL 0x2e /* Keyboard = and + */ -#define HID_KBD_USAGE_PLUS 0x2e /* Keyboard = and + */ -#define HID_KBD_USAGE_LBRACKET 0x2f /* Keyboard [ and { */ -#define HID_KBD_USAGE_LBRACE 0x2f /* Keyboard [ and { */ -#define HID_KBD_USAGE_RBRACKET 0x30 /* Keyboard ] and } */ -#define HID_KBD_USAGE_RBRACE 0x30 /* Keyboard ] and } */ -#define HID_KBD_USAGE_BSLASH 0x31 /* Keyboard \ and | */ -#define HID_KBD_USAGE_VERTBAR 0x31 /* Keyboard \ and | */ -#define HID_KBD_USAGE_NONUSPOUND 0x32 /* Keyboard Non-US # and ~ */ -#define HID_KBD_USAGE_TILDE 0x32 /* Keyboard Non-US # and ~ */ -#define HID_KBD_USAGE_SEMICOLON 0x33 /* Keyboard ; and : */ -#define HID_KBD_USAGE_COLON 0x33 /* Keyboard ; and : */ -#define HID_KBD_USAGE_SQUOTE 0x34 /* Keyboard ' and " */ -#define HID_KBD_USAGE_DQUOUTE 0x34 /* Keyboard ' and " */ -#define HID_KBD_USAGE_GACCENT 0x35 /* Keyboard Grave Accent and Tilde */ -#define HID_KBD_USAGE_GTILDE 0x35 /* Keyboard Grave Accent and Tilde */ -#define HID_KBD_USAGE_COMMON 0x36 /* Keyboard , and < */ -#define HID_KBD_USAGE_LT 0x36 /* Keyboard , and < */ -#define HID_KBD_USAGE_PERIOD 0x37 /* Keyboard . and > */ -#define HID_KBD_USAGE_GT 0x37 /* Keyboard . and > */ -#define HID_KBD_USAGE_DIV 0x38 /* Keyboard / and ? */ -#define HID_KBD_USAGE_QUESTION 0x38 /* Keyboard / and ? */ -#define HID_KBD_USAGE_CAPSLOCK 0x39 /* Keyboard Caps Lock */ -#define HID_KBD_USAGE_F1 0x3a /* Keyboard F1 */ -#define HID_KBD_USAGE_F2 0x3b /* Keyboard F2 */ -#define HID_KBD_USAGE_F3 0x3c /* Keyboard F3 */ -#define HID_KBD_USAGE_F4 0x3d /* Keyboard F4 */ -#define HID_KBD_USAGE_F5 0x3e /* Keyboard F5 */ -#define HID_KBD_USAGE_F6 0x3f /* Keyboard F6 */ -#define HID_KBD_USAGE_F7 0x40 /* Keyboard F7 */ -#define HID_KBD_USAGE_F8 0x41 /* Keyboard F8 */ -#define HID_KBD_USAGE_F9 0x42 /* Keyboard F9 */ -#define HID_KBD_USAGE_F10 0x43 /* Keyboard F10 */ -#define HID_KBD_USAGE_F11 0x44 /* Keyboard F11 */ -#define HID_KBD_USAGE_F12 0x45 /* Keyboard F12 */ -#define HID_KBD_USAGE_PRINTSCN 0x46 /* Keyboard PrintScreen */ -#define HID_KBD_USAGE_SCROLLLOCK 0x47 /* Keyboard Scroll Lock */ -#define HID_KBD_USAGE_PAUSE 0x48 /* Keyboard Pause */ -#define HID_KBD_USAGE_INSERT 0x49 /* Keyboard Insert */ -#define HID_KBD_USAGE_HOME 0x4a /* Keyboard Home */ -#define HID_KBD_USAGE_PAGEUP 0x4b /* Keyboard PageUp */ -#define HID_KBD_USAGE_DELFWD 0x4c /* Keyboard Delete Forward */ -#define HID_KBD_USAGE_END 0x4d /* Keyboard End */ -#define HID_KBD_USAGE_PAGEDOWN 0x4e /* Keyboard PageDown */ -#define HID_KBD_USAGE_RIGHT 0x4f /* eyboard RightArrow */ -#define HID_KBD_USAGE_LEFT 0x50 /* Keyboard LeftArrow */ -#define HID_KBD_USAGE_DOWN 0x51 /* Keyboard DownArrow */ -#define HID_KBD_USAGE_UP 0x52 /* Keyboard UpArrow */ -#define HID_KBD_USAGE_KPDNUMLOCK 0x53 /* Keypad Num Lock and Clear */ -#define HID_KBD_USAGE_KPDNUMLOCKCLEAR 0x53 /* Keypad Num Lock and Clear */ -#define HID_KBD_USAGE_KPDDIV 0x54 /* Keypad / */ -#define HID_KBD_USAGE_KPDMUL 0x55 /* Keypad * */ -#define HID_KBD_USAGE_KPDHMINUS 0x56 /* Keypad - */ -#define HID_KBD_USAGE_KPDPLUS 0x57 /* Keypad + */ -#define HID_KBD_USAGE_KPDEMTER 0x58 /* Keypad ENTER */ -#define HID_KBD_USAGE_KPD1 0x59 /* Keypad 1 (2-9 follow) */ -#define HID_KBD_USAGE_KPDEND 0x59 /* Keypad 1 and End */ -#define HID_KBD_USAGE_KPDDOWN 0x5a /* Keypad 2 and Down Arrow */ -#define HID_KBD_USAGE_KPDPAGEDN 0x5b /* Keypad 3 and PageDn */ -#define HID_KBD_USAGE_KPDLEFT 0x5c /* Keypad 4 and Left Arrow */ -#define HID_KBD_USAGE_KPDRIGHT 0x5e /* Keypad 6 and Right Arrow */ -#define HID_KBD_USAGE_KPDHOME 0x5f /* Keypad 7 and Home */ -#define HID_KBD_USAGE_KPDUP 0x60 /* Keypad 8 and Up Arrow */ -#define HID_KBD_USAGE_KPDPAGEUP 0x61 /* Keypad 9 and PageUp */ -#define HID_KBD_USAGE_KPD0 0x62 /* Keypad 0 and Insert */ -#define HID_KBD_USAGE_KPDINSERT 0x62 /* Keypad 0 and Insert */ -#define HID_KBD_USAGE_KPDDECIMALPT 0x63 /* Keypad . and Delete */ -#define HID_KBD_USAGE_KPDDELETE 0x63 /* Keypad . and Delete */ -#define HID_KBD_USAGE_NONSLASH 0x64 /* Keyboard Non-US \ and | */ -#define HID_KBD_USAGE_NONUSVERT 0x64 /* Keyboard Non-US \ and | */ -#define HID_KBD_USAGE_APPLICATION 0x65 /* Keyboard Application */ -#define HID_KBD_USAGE_POWER 0x66 /* Keyboard Power */ -#define HID_KBD_USAGE_KPDEQUAL 0x67 /* Keypad = */ -#define HID_KBD_USAGE_F13 0x68 /* Keyboard F13 */ -#define HID_KBD_USAGE_F14 0x69 /* Keyboard F14 */ -#define HID_KBD_USAGE_F15 0x6a /* Keyboard F15 */ -#define HID_KBD_USAGE_F16 0x6b /* Keyboard F16 */ -#define HID_KBD_USAGE_F17 0x6c /* Keyboard F17 */ -#define HID_KBD_USAGE_F18 0x6d /* Keyboard F18 */ -#define HID_KBD_USAGE_F19 0x6e /* Keyboard F19 */ -#define HID_KBD_USAGE_F20 0x6f /* Keyboard F20 */ -#define HID_KBD_USAGE_F21 0x70 /* Keyboard F21 */ -#define HID_KBD_USAGE_F22 0x71 /* Keyboard F22 */ -#define HID_KBD_USAGE_F23 0x72 /* Keyboard F23 */ -#define HID_KBD_USAGE_F24 0x73 /* Keyboard F24 */ -#define HID_KBD_USAGE_EXECUTE 0x74 /* Keyboard Execute */ -#define HID_KBD_USAGE_HELP 0x75 /* Keyboard Help */ -#define HID_KBD_USAGE_MENU 0x76 /* Keyboard Menu */ -#define HID_KBD_USAGE_SELECT 0x77 /* Keyboard Select */ -#define HID_KBD_USAGE_STOP 0x78 /* Keyboard Stop */ -#define HID_KBD_USAGE_AGAIN 0x79 /* Keyboard Again */ -#define HID_KBD_USAGE_UNDO 0x7a /* Keyboard Undo */ -#define HID_KBD_USAGE_CUT 0x7b /* Keyboard Cut */ -#define HID_KBD_USAGE_COPY 0x7c /* Keyboard Copy */ -#define HID_KBD_USAGE_PASTE 0x7d /* Keyboard Paste */ -#define HID_KBD_USAGE_FIND 0x7e /* Keyboard Find */ -#define HID_KBD_USAGE_MUTE 0x7f /* Keyboard Mute */ -#define HID_KBD_USAGE_VOLUP 0x80 /* Keyboard Volume Up */ -#define HID_KBD_USAGE_VOLDOWN 0x81 /* Keyboard Volume Down */ -#define HID_KBD_USAGE_LCAPSLOCK 0x82 /* Keyboard Locking Caps Lock */ -#define HID_KBD_USAGE_LNUMLOCK 0x83 /* Keyboard Locking Num Lock */ -#define HID_KBD_USAGE_LSCROLLLOCK 0x84 /* Keyboard Locking Scroll Lock */ -#define HID_KBD_USAGE_KPDCOMMA 0x85 /* Keypad Comma */ -#define HID_KBD_USAGE_KPDEQUALSIGN 0x86 /* Keypad Equal Sign */ -#define HID_KBD_USAGE_INTERNATIONAL1 0x87 /* Keyboard International 1 */ -#define HID_KBD_USAGE_INTERNATIONAL2 0x88 /* Keyboard International 2 */ -#define HID_KBD_USAGE_INTERNATIONAL3 0x89 /* Keyboard International 3 */ -#define HID_KBD_USAGE_INTERNATIONAL4 0x8a /* Keyboard International 4 */ -#define HID_KBD_USAGE_INTERNATIONAL5 0x8b /* Keyboard International 5 */ -#define HID_KBD_USAGE_INTERNATIONAL6 0x8c /* Keyboard International 6 */ -#define HID_KBD_USAGE_INTERNATIONAL7 0x8d /* Keyboard International 7 */ -#define HID_KBD_USAGE_INTERNATIONAL8 0x8e /* Keyboard International 8 */ -#define HID_KBD_USAGE_INTERNATIONAL9 0x8f /* Keyboard International 9 */ -#define HID_KBD_USAGE_LANG1 0x90 /* Keyboard LANG1 */ -#define HID_KBD_USAGE_LANG2 0x91 /* Keyboard LANG2 */ -#define HID_KBD_USAGE_LANG3 0x92 /* Keyboard LANG3 */ -#define HID_KBD_USAGE_LANG4 0x93 /* Keyboard LANG4 */ -#define HID_KBD_USAGE_LANG5 0x94 /* Keyboard LANG5 */ -#define HID_KBD_USAGE_LANG6 0x95 /* Keyboard LANG6 */ -#define HID_KBD_USAGE_LANG7 0x96 /* Keyboard LANG7 */ -#define HID_KBD_USAGE_LANG8 0x97 /* Keyboard LANG8 */ -#define HID_KBD_USAGE_LANG9 0x98 /* Keyboard LANG9 */ -#define HID_KBD_USAGE_ALTERASE 0x99 /* Keyboard Alternate Erase */ -#define HID_KBD_USAGE_SYSREQ 0x9a /* Keyboard SysReq/Attention */ -#define HID_KBD_USAGE_CANCEL 0x9b /* Keyboard Cancel */ -#define HID_KBD_USAGE_CLEAR 0x9c /* Keyboard Clear */ -#define HID_KBD_USAGE_PRIOR 0x9d /* Keyboard Prior */ -#define HID_KBD_USAGE_RETURN 0x9e /* Keyboard Return */ -#define HID_KBD_USAGE_SEPARATOR 0x9f /* Keyboard Separator */ -#define HID_KBD_USAGE_OUT 0xa0 /* Keyboard Out */ -#define HID_KBD_USAGE_OPER 0xa1 /* Keyboard Oper */ -#define HID_KBD_USAGE_CLEARAGAIN 0xa2 /* Keyboard Clear/Again */ -#define HID_KBD_USAGE_CLRSEL 0xa3 /* Keyboard CrSel/Props */ -#define HID_KBD_USAGE_EXSEL 0xa4 /* Keyboard ExSel */ -#define HID_KBD_USAGE_KPD00 0xb0 /* Keypad 00 */ -#define HID_KBD_USAGE_KPD000 0xb1 /* Keypad 000 */ -#define HID_KBD_USAGE_THOUSEPARATOR 0xb2 /* Thousands Separator */ -#define HID_KBD_USAGE_DECSEPARATOR 0xb3 /* Decimal Separator */ -#define HID_KBD_USAGE_CURRUNIT 0xb4 /* Currency Unit */ -#define HID_KBD_USAGE_CURRSUBUNIT 0xb5 /* Currency Sub-unit */ -#define HID_KBD_USAGE_KPDLPAREN 0xb6 /* Keypad ( */ -#define HID_KBD_USAGE_KPDRPAREN 0xb7 /* Keypad ) */ -#define HID_KBD_USAGE_KPDLBRACE 0xb8 /* Keypad { */ -#define HID_KBD_USAGE_KPDRBRACE 0xb9 /* Keypad } */ -#define HID_KBD_USAGE_KPDTAB 0xba /* Keypad Tab */ -#define HID_KBD_USAGE_KPDBACKSPACE 0xbb /* Keypad Backspace */ -#define HID_KBD_USAGE_KPDA 0xbc /* Keypad A (B-F follow) */ -#define HID_KBD_USAGE_KPDXOR 0xc2 /* Keypad XOR */ -#define HID_KBD_USAGE_KPDEXP 0xc3 /* Keypad ^ */ -#define HID_KBD_USAGE_KPDPERCENT 0xc4 /* Keypad % */ -#define HID_KBD_USAGE_KPDLT 0xc5 /* Keypad < */ -#define HID_KBD_USAGE_KPDGT 0xc6 /* Keypad > */ -#define HID_KBD_USAGE_KPDAMPERSAND 0xc7 /* Keypad & */ -#define HID_KBD_USAGE_KPDAND 0xc8 /* Keypad && */ -#define HID_KBD_USAGE_KPDVERT 0xc9 /* Keypad | */ -#define HID_KBD_USAGE_KPDOR 0xca /* Keypad || */ -#define HID_KBD_USAGE_KPDCOLON 0xcb /* Keypad : */ -#define HID_KBD_USAGE_KPDPOUND 0xcc /* Keypad # */ -#define HID_KBD_USAGE_KPDSPACE 0xcd /* Keypad Space */ -#define HID_KBD_USAGE_KPDAT 0xce /* Keypad @ */ -#define HID_KBD_USAGE_KPDEXCLAM 0xcf /* Keypad ! */ -#define HID_KBD_USAGE_KPDMEMSTORE 0xd0 /* Keypad Memory Store */ -#define HID_KBD_USAGE_KPDMEMRECALL 0xd1 /* Keypad Memory Recall */ -#define HID_KBD_USAGE_KPDMEMCLEAR 0xd2 /* Keypad Memory Clear */ -#define HID_KBD_USAGE_KPDMEMADD 0xd3 /* Keypad Memory Add */ -#define HID_KBD_USAGE_KPDMEMSUB 0xd4 /* Keypad Memory Subtract */ -#define HID_KBD_USAGE_KPDMEMMULT 0xd5 /* Keypad Memory Multiply */ -#define HID_KBD_USAGE_KPDMEMDIV 0xd6 /* Keypad Memory Divide */ -#define HID_KBD_USAGE_KPDPLUSMINUS 0xd7 /* Keypad +/- */ -#define HID_KBD_USAGE_KPDCLEAR 0xd8 /* Keypad Clear */ -#define HID_KBD_USAGE_KPDCLEARENTRY 0xd9 /* Keypad Clear Entry */ -#define HID_KBD_USAGE_KPDBINARY 0xda /* Keypad Binary */ -#define HID_KBD_USAGE_KPDOCTAL 0xdb /* Keypad Octal */ -#define HID_KBD_USAGE_KPDDECIMAL 0xdc /* Keypad Decimal */ -#define HID_KBD_USAGE_KPDHEXADECIMAL 0xdd /* Keypad Hexadecimal */ -#define HID_KBD_USAGE_LCTRL 0xe0 /* Keyboard LeftControl */ -#define HID_KBD_USAGE_LSHIFT 0xe1 /* Keyboard LeftShift */ -#define HID_KBD_USAGE_LALT 0xe2 /* Keyboard LeftAlt */ -#define HID_KBD_USAGE_LGUI 0xe3 /* Keyboard Left GUI */ -#define HID_KBD_USAGE_RCTRL 0xe4 /* Keyboard RightControl */ -#define HID_KBD_USAGE_RSHIFT 0xe5 /* Keyboard RightShift */ -#define HID_KBD_USAGE_RALT 0xe6 /* Keyboard RightAlt */ -#define HID_KBD_USAGE_RGUI 0xe7 /* Keyboard Right GUI */ - -#define HID_KBD_USAGE_MAX 0xe7 - -/* HID Report Definitions */ -struct usb_hid_class_subdescriptor { - uint8_t bDescriptorType;/* Class descriptor type (See 7.1) */ - uint16_t wDescriptorLength;/* Size of the report descriptor */ -} __PACKED; - -struct usb_hid_descriptor { - uint8_t bLength; /* Size of the HID descriptor */ - uint8_t bDescriptorType;/* HID descriptor type */ - uint16_t bcdHID;/* HID class specification release */ - uint8_t bCountryCode;/* Country code */ - uint8_t bNumDescriptors;/* Number of descriptors (>=1) */ - - /* - * Specification says at least one Class Descriptor needs to - * be present (Report Descriptor). - */ - struct usb_hid_class_subdescriptor subdesc[1]; -} __PACKED; - -/* Standard Reports *********************************************************/ - -/* Keyboard input report (8 bytes) (HID B.1) */ -struct usb_hid_kbd_report -{ - uint8_t modifier; /* Modifier keys. See HID_MODIFER_* definitions */ - uint8_t reserved; - uint8_t key[6]; /* Keycode 1-6 */ -}; - -/* Keyboard output report (1 byte) (HID B.1), - * see USBHID_KBDOUT_* definitions - */ - -/* Mouse input report (HID B.2) */ -struct usb_hid_mouse_report -{ - uint8_t buttons; /* See HID_MOUSE_INPUT_BUTTON_* definitions */ - uint8_t xdisp; /* X displacement */ - uint8_t ydisp; /* y displacement */ - /* Device specific additional bytes may follow */ -#ifdef CONFIG_INPUT_MOUSE_WHEEL - uint8_t wdisp; /* Wheel displacement */ -#endif -}; - -/* Joystick input report (1 bytes) (HID D.1) */ -struct usb_hid_js_report -{ - uint8_t xpos; /* X position */ - uint8_t ypos; /* X position */ - uint8_t buttons; /* See USBHID_JSIN_* definitions */ - uint8_t throttle; /* Throttle */ -}; - -#endif /* USB_HID_H */ +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_HID_H +#define USB_HID_H + +/* Subclass codes (HID 4.2) */ +#define HID_SUBCLASS_NONE 0 /* No subclass */ +#define HID_SUBCLASS_BOOTIF 1 /* Boot Interface Subclass */ + +/* HID Protocol Codes (HID 4.3) */ +#define HID_PROTOCOL_NONE 0x00 +#define HID_PROTOCOL_BOOT 0x00 +#define HID_PROTOCOL_KEYBOARD 0x01 +#define HID_PROTOCOL_REPORT 0x01 +#define HID_PROTOCOL_MOUSE 0x02 + +/* HID Class Descriptor Types (HID 7.1) */ +#define HID_DESCRIPTOR_TYPE_HID 0x21 +#define HID_DESCRIPTOR_TYPE_HID_REPORT 0x22 +#define HID_DESCRIPTOR_TYPE_HID_PHYSICAL 0x23 + +/* HID Class Specific Requests (HID 7.2) */ +#define HID_REQUEST_GET_REPORT 0x01 +#define HID_REQUEST_GET_IDLE 0x02 +#define HID_REQUEST_GET_PROTOCOL 0x03 +#define HID_REQUEST_SET_REPORT 0x09 +#define HID_REQUEST_SET_IDLE 0x0A +#define HID_REQUEST_SET_PROTOCOL 0x0B + +/* Report Type (MS byte of wValue for GET_REPORT) (HID 7.2.1) */ +#define HID_REPORT_INPUT 0x01 +#define HID_REPORT_OUTPUT 0x02 +#define HID_REPORT_FEATURE 0x03 + +/* HID Descriptor ***********************************************************/ + +#define HID_COUNTRY_NONE 0x00 /* Not Supported */ +#define HID_COUNTRY_ARABIC 0x01 /* Arabic */ +#define HID_COUNTRY_BELGIAN 0x02 /* Belgian */ +#define HID_COUNTRY_CANADA 0x03 /* Canadian-Bilingual */ +#define HID_COUNTRY_CANADRFR 0x04 /* Canadian-French */ +#define HID_COUNTRY_CZECH 0x05 /* Czech Republic */ +#define HID_COUNTRY_DANISH 0x06 /* Danish */ +#define HID_COUNTRY_FINNISH 0x07 /* Finnish */ +#define HID_COUNTRY_FRENCH 0x08 /* French */ +#define HID_COUNTRY_GERMAN 0x09 /* German */ +#define HID_COUNTRY_GREEK 0x10 /* Greek */ +#define HID_COUNTRY_HEBREW 0x11 /* Hebrew */ +#define HID_COUNTRY_HUNGARY 0x12 /* Hungary */ +#define HID_COUNTRY_ISO 0x13 /* International (ISO) */ +#define HID_COUNTRY_ITALIAN 0x14 /* Italian */ +#define HID_COUNTRY_JAPAN 0x15 /* Japan (Katakana) */ +#define HID_COUNTRY_KOREAN 0x16 /* Korean */ +#define HID_COUNTRY_LATINAM 0x17 /* Latin American */ +#define HID_COUNTRY_DUTCH 0x18 /* Netherlands/Dutch */ +#define HID_COUNTRY_NORWEGIAN 0x19 /* Norwegian */ +#define HID_COUNTRY_PERSIAN 0x20 /* Persian (Farsi) */ +#define HID_COUNTRY_POLAND 0x21 /* Poland */ +#define HID_COUNTRY_PORTUGUESE 0x22 /* Portuguese */ +#define HID_COUNTRY_RUSSIA 0x23 /* Russia */ +#define HID_COUNTRY_SLOVAKIA 0x24 /* Slovakia */ +#define HID_COUNTRY_SPANISH 0x25 /* Spanish */ +#define HID_COUNTRY_SWEDISH 0x26 /* Swedish */ +#define HID_COUNTRY_SWISSFR 0x27 /* Swiss/French */ +#define HID_COUNTRY_SWISSGR 0x28 /* Swiss/German */ +#define HID_COUNTRY_SWITZERLAND 0x29 /* Switzerland */ +#define HID_COUNTRY_TAIWAN 0x30 /* Taiwan */ +#define HID_COUNTRY_TURKISHQ 0x31 /* Turkish-Q */ +#define HID_COUNTRY_UK 0x32 /* UK */ +#define HID_COUNTRY_US 0x33 /* US */ +#define HID_COUNTRY_YUGOSLAVIA 0x34 /* Yugoslavia */ +#define HID_COUNTRY_TURKISHF 0x35 /* Turkish-F */ + +/* HID report items */ +#define HID_REPORT_ITEM_SIZE_MASK 0x03 +#define HID_REPORT_ITEM_SIZE_0 0x00 /* No data follows */ +#define HID_REPORT_ITEM_SIZE_1 0x01 /* 1 byte of data follows */ +#define HID_REPORT_ITEM_SIZE_2 0x02 /* 2 bytes of data follow */ +#define HID_REPORT_ITEM_SIZE_4 0x03 /* 4 bytes of data follow */ +#define HID_REPORT_ITEM_TYPE_MASK 0x0c +#define HID_REPORT_ITEM_TYPE_MAIN 0x00 +#define HID_REPORT_ITEM_TYPE_GLOBAL 0x04 +#define HID_REPORT_ITEM_TYPE_LOCAL 0x08 +#define HID_REPORT_ITEM_TAG_MASK 0xf0 + +/* Main Items (HID 6.2.2.4) */ +#define HID_MAIN_ITEM_CONSTANT (1 << 0) /* Constant(1) vs Data(0) */ +#define HID_MAIN_ITEM_VARIABLE (1 << 1) /* Variable(1) vs Array(0) */ +#define HID_MAIN_ITEM_RELATIVE (1 << 2) /* Relative(1) vs Absolute(0) */ +#define HID_MAIN_ITEM_WRAP (1 << 3) /* Wrap(1) vs No Wrap(0) */ +#define HID_MAIN_ITEM_NONLINEAR (1 << 4) /* Non Linear(1) vs Linear(0) */ +#define HID_MAIN_ITEM_NOPREFERRED (1 << 5) /* No Preferred (1) vs Preferred State(0) */ +#define HID_MAIN_ITEM_NULLSTATE (1 << 6) /* Null state(1) vs No Null position(0) */ +#define HID_MAIN_ITEM_VOLATILE (1 << 7) /* Volatile(1) vs Non volatile(0) */ +#define HID_MAIN_ITEM_BUFFEREDBYTES (1 << 8) /* Buffered Bytes(1) vs Bit Field(0) */ + +#define HID_MAIN_ITEM_SIZE(pfx) ((pfx)&HID_REPORT_ITEM_SIZE_MASK) +#define HID_MAIN_ITEM_INPUT_PREFIX 0x80 +#define HID_MAIN_ITEM_INPUT_CONSTANT HID_MAIN_ITEM_CONSTANT +#define HID_MAIN_ITEM_INPUT_VARIABLE HID_MAIN_ITEM_VARIABLE +#define HID_MAIN_ITEM_INPUT_RELATIVE HID_MAIN_ITEM_RELATIVE +#define HID_MAIN_ITEM_INPUT_WRAP HID_MAIN_ITEM_WRAP +#define HID_MAIN_ITEM_INPUT_NONLINEAR HID_MAIN_ITEM_NONLINEAR +#define HID_MAIN_ITEM_INPUT_NOPREFERRED HID_MAIN_ITEM_NOPREFERRED +#define HID_MAIN_ITEM_INPUT_NULLSTATE HID_MAIN_ITEM_NULLSTATE +#define HID_MAIN_ITEM_INPUT_BUFFEREDBYTES HID_MAIN_ITEM_BUFFEREDBYTES + +#define HID_MAIN_ITEM_OUTPUT_PREFIX 0x90 +#define HID_MAIN_ITEM_OUTPUT_CONSTANT HID_MAIN_ITEM_CONSTANT +#define HID_MAIN_ITEM_OUTPUT_VARIABLE HID_MAIN_ITEM_VARIABLE +#define HID_MAIN_ITEM_OUTPUT_RELATIVE HID_MAIN_ITEM_RELATIVE +#define HID_MAIN_ITEM_OUTPUT_WRAP HID_MAIN_ITEM_WRAP +#define HID_MAIN_ITEM_OUTPUT_NONLINEAR HID_MAIN_ITEM_NONLINEAR +#define HID_MAIN_ITEM_OUTPUT_NOPREFERRED HID_MAIN_ITEM_NOPREFERRED +#define HID_MAIN_ITEM_OUTPUT_NULLSTATE HID_MAIN_ITEM_NULLSTATE +#define HID_MAIN_ITEM_OUTPUT_VOLATILE HID_MAIN_ITEM_VOLATILE +#define HID_MAIN_ITEM_OUTPUT_BUFFEREDBYTES HID_MAIN_ITEM_BUFFEREDBYTES + +#define HID_MAIN_ITEM_FEATURE_PREFIX 0xb0 +#define HID_MAIN_ITEM_FEATURE_CONSTANT HID_MAIN_ITEM_CONSTANT +#define HID_MAIN_ITEM_FEATURE_VARIABLE HID_MAIN_ITEM_VARIABLE +#define HID_MAIN_ITEM_FEATURE_RELATIVE HID_MAIN_ITEM_RELATIVE +#define HID_MAIN_ITEM_FEATURE_WRAP HID_MAIN_ITEM_WRAP +#define HID_MAIN_ITEM_FEATURE_NONLINEAR HID_MAIN_ITEM_NONLINEAR +#define HID_MAIN_ITEM_FEATURE_NOPREFERRED HID_MAIN_ITEM_NOPREFERRED +#define HID_MAIN_ITEM_FEATURE_NULLSTATE HID_MAIN_ITEM_NULLSTATE +#define HID_MAIN_ITEM_FEATURE_VOLATILE HID_MAIN_ITEM_VOLATILE +#define HID_MAIN_ITEM_FEATURE_BUFFEREDBYTES HID_MAIN_ITEM_BUFFEREDBYTES + +#define HID_MAIN_ITEM_COLLECTION_PREFIX 0xa0 +#define HID_MAIN_ITEM_COLLECTION_PHYSICAL 0x00 /* Physical (group of axes) */ +#define HID_MAIN_ITEM_COLLECTION_APPL 0x01 /* Application (mouse, keyboard) */ +#define HID_MAIN_ITEM_COLLECTION_LOGICAL 0x02 /* Logical (interrelated data) */ +#define HID_MAIN_ITEM_COLLECTION_REPORT 0x03 /* Report */ +#define HID_MAIN_ITEM_COLLECTION_ARRAY 0x04 /* Named Array */ +#define HID_MAIN_ITEM_COLLECTION_SWITCH 0x05 /* Usage Switch */ +#define HID_MAIN_ITEM_COLLECTION_MODIFIER 0x06 /* Usage Modifier */ +#define HID_MAIN_ITEM_ENDCOLLECTION_PREFIX 0xc0 + +/* Global Items (HID 6.2.2.7) */ +#define HID_GLOBAL_ITEM_SIZE(pfx) ((pfx)&HID_REPORT_ITEM_SIZE_MASK) +#define HID_GLOBAL_ITEM_USAGEPAGE_PREFIX 0x04 /* Usage Page */ +#define HID_GLOBAL_ITEM_LOGICALMIN_PREFIX 0x14 /* Logical Minimum */ +#define HID_GLOBAL_ITEM_LOGICALMAX_PREFIX 0x24 /* Logical Maximum */ +#define HID_GLOBAL_ITEM_PHYSICALMIN_PREFIX 0x34 /* Physical Minimum */ +#define HID_GLOBAL_ITEM_PHYSMICALAX_PREFIX 0x44 /* Physical Maximum */ +#define HID_GLOBAL_ITEM_UNITEXP_PREFIX 0x54 /* Unit Exponent */ +#define HID_GLOBAL_ITEM_UNIT_PREFIX 0x64 /* Unit */ +#define HID_GLOBAL_ITEM_REPORTSIZE_PREFIX 0x74 /* Report Size */ +#define HID_GLOBAL_ITEM_REPORTID_PREFIX 0x84 /* Report ID */ +#define HID_GLOBAL_ITEM_REPORTCOUNT_PREFIX 0x94 /* Report Count */ +#define HID_GLOBAL_ITEM_PUSH_PREFIX 0xa4 /* Push */ +#define HID_GLOBAL_ITEM_POP_PREFIX 0xb4 /* Pop */ + +/* Local Items (HID 6.2.2.8) */ +#define HID_LOCAL_ITEM_SIZE(pfx) ((pfx)&HID_REPORT_ITEM_SIZE_MASK) +#define HID_LOCAL_ITEM_USAGE_PREFIX 0x08 /* Usage */ +#define HID_LOCAL_ITEM_USAGEMIN_PREFIX 0x18 /* Usage Minimum */ +#define HID_LOCAL_ITEM_USAGEMAX_PREFIX 0x28 /* Usage Maximum */ +#define HID_LOCAL_ITEM_DESIGNATORIDX_PREFIX 0x38 /* Designator Index */ +#define HID_LOCAL_ITEM_DESIGNATORMIN_PREFIX 0x48 /* Designator Minimum */ +#define HID_LOCAL_ITEM_DESIGNATORMAX_PREFIX 0x58 /* Designator Maximum */ +#define HID_LOCAL_ITEM_STRINGIDX_PREFIX 0x78 /* String Index */ +#define HID_LOCAL_ITEM_STRINGMIN_PREFIX 0x88 /* String Minimum */ +#define HID_LOCAL_ITEM_STRINGMAX_PREFIX 0x98 /* xx */ +#define HID_LOCAL_ITEM_DELIMITER_PREFIX 0xa8 /* Delimiter */ + +/* Modifier Keys (HID 8.3) */ +#define HID_MODIFER_LCTRL (1 << 0) /* Left Ctrl */ +#define HID_MODIFER_LSHIFT (1 << 1) /* Left Shift */ +#define HID_MODIFER_LALT (1 << 2) /* Left Alt */ +#define HID_MODIFER_LGUI (1 << 3) /* Left GUI */ +#define HID_MODIFER_RCTRL (1 << 4) /* Right Ctrl */ +#define HID_MODIFER_RSHIFT (1 << 5) /* Right Shift */ +#define HID_MODIFER_RALT (1 << 6) /* Right Alt */ +#define HID_MODIFER_RGUI (1 << 7) /* Right GUI */ + +/* Keyboard output report (1 byte) (HID B.1) */ +#define HID_KBD_OUTPUT_REPORT_NUMLOCK (1 << 0) +#define HID_KBD_OUTPUT_REPORT_CAPSLOCK (1 << 1) +#define HID_KBD_OUTPUT_REPORT_SCROLLLOCK (1 << 2) +#define HID_KBD_OUTPUT_REPORT_COMPOSE (1 << 3) +#define HID_KBD_OUTPUT_REPORT_KANA (1 << 4) + +/* Mouse input report (HID B.2) */ +#define HID_MOUSE_INPUT_REPORT_BUTTON1 (1 << 0) +#define HID_MOUSE_INPUT_REPORT_BUTTON2 (1 << 1) +#define HID_MOUSE_INPUT_REPORT_BUTTON3 (1 << 2) +#define HID_MOUSE_INPUT_REPORT_BUTTON_MASK (7) + +#define HID_MOUSE_INPUT_BUTTON_LEFT (1 << 0) +#define HID_MOUSE_INPUT_BUTTON_RIGHT (1 << 1) +#define HID_MOUSE_INPUT_BUTTON_MIDDLE (1 << 2) +#define HID_MOUSE_INPUT_BUTTON_BACKWARD (1 << 3) +#define HID_MOUSE_INPUT_BUTTON_FORWARD (1 << 4) + +/* Joystick input report (4 bytes) (HID D.1) */ +#define HID_JS_INPUT_REPORT_HATSWITCH_SHIFT (0) +#define HID_JS_INPUT_REPORT_HATSWITCH_MASK (15 << HID_JSIN_HATSWITCH_SHIFT) +#define HID_JS_INPUT_REPORT_BUTTON1 (1 << 4) +#define HID_JS_INPUT_REPORT_BUTTON2 (1 << 5) +#define HID_JS_INPUT_REPORT_BUTTON3 (1 << 6) +#define HID_JS_INPUT_REPORT_BUTTON4 (1 << 7) + +/* Usage pages (HuT 3) */ +#define HID_USAGE_PAGE_UNDEFINED 0x00 /* Undefined */ +#define HID_USAGE_PAGE_GENERIC_DCTRL 0x01 /* Generic Desktop Controls */ +#define HID_USAGE_PAGE_SIMCTRL 0x02 /* Simulation Controls */ +#define HID_USAGE_PAGE_VRCTRL 0x03 /* VR Controls */ +#define HID_USAGE_PAGE_SPORTCTRL 0x04 /* Sport Controls */ +#define HID_USAGE_PAGE_GAMECTRL 0x05 /* Game Controls */ +#define HID_USAGE_PAGE_GENERIC_DEVCTRL 0x06 /* Generic Device Controls */ +#define HID_USAGE_PAGE_KBD 0x07 /* Keyboard/Keypad */ +#define HID_USAGE_PAGE_LEDS 0x08 /* LEDs */ +#define HID_USAGE_PAGE_BUTTON 0x09 /* Button */ +#define HID_USAGE_PAGE_ORDINAL 0x0a /* Ordinal */ +#define HID_USAGE_PAGE_TELEPHONY 0x0b /* Telephony */ +#define HID_USAGE_PAGE_CONSUMER 0x0c /* Consumer */ +#define HID_USAGE_PAGE_DIGITIZER 0x0d /* Digitizer */ + /* 0x0e Reserved */ +#define HID_USAGE_PAGE_PIDPAGE 0x0f /* PID Page Physical Interface Device */ +#define HID_USAGE_PAGE_UNICODE 0x10 /* Unicode */ + /* 0x11-13 Reserved */ +#define HID_USAGE_PAGE_ALPHA_DISPLAY 0x14 /* Alphanumeric Display */ + /* 0x15-3f Reserved */ +#define HID_USAGE_PAGE_MEDICAL 0x40 /* Medical Instruments */ + /* 0x41-7f Reserved */ + /* 0x80-83 Monitor Devices */ + /* 0x84-87 Power Devices */ + /* 0x88-8b Reserved */ +#define HID_USAGE_PAGE_BARCODE_SCANNER 0x8c /* Bar Code Scanner page */ +#define HID_USAGE_PAGE_SCALE 0x8d /* Scale page */ +#define HID_USAGE_PAGE_MSR 0x8e /* Magnetic Stripe Reading (MSR) Devices */ +#define HID_USAGE_PAGE_POS 0x8f /* Point of Sale devices */ +#define HID_USAGE_PAGE_CAMERA_CTRL 0x90 /* Camera Control Page */ + +/* Generic Desktop Page Usage IDs (HuT 4) */ +#define HID_DESKTOP_USAGE_UNDEFINED 0x00 /* Undefined */ +#define HID_DESKTOP_USAGE_POINTER 0x01 /* Pointer */ +#define HID_DESKTOP_USAGE_MOUSE 0x02 /* Mouse */ + /* 0x03 Reserved */ +#define HID_DESKTOP_USAGE_JOYSTICK 0x04 /* Joystick */ +#define HID_DESKTOP_USAGE_GAMEPAD 0x05 /* Game Pad */ +#define HID_DESKTOP_USAGE_KEYBOARD 0x06 /* Keyboard */ +#define HID_DESKTOP_USAGE_KEYPAD 0x07 /* Keypad */ +#define HID_DESKTOP_USAGE_MULTIAXIS 0x08 /* Multi-axis Controller */ +#define HID_DESKTOP_USAGE_TABLET 0x09 /* Tablet PC System Controls */ + /* 0x0a-2f Reserved */ +#define HID_DESKTOP_USAGE_X 0x30 /* X */ +#define HID_DESKTOP_USAGE_Y 0x31 /* Y */ +#define HID_DESKTOP_USAGE_Z 0x32 /* Z */ +#define HID_DESKTOP_USAGE_RX 0x33 /* Rx */ +#define HID_DESKTOP_USAGE_RY 0x34 /* Ry */ +#define HID_DESKTOP_USAGE_RZ 0x35 /* Rz */ +#define HID_DESKTOP_USAGE_SLIDER 0x36 /* Slider */ +#define HID_DESKTOP_USAGE_DIAL 0x37 /* Dial */ +#define HID_DESKTOP_USAGE_WHEEL 0x38 /* Wheel */ +#define HID_DESKTOP_USAGE_HATSWITCH 0x39 /* Hat switch */ +#define HID_DESKTOP_USAGE_COUNTED 0x3a /* Counted Buffer */ +#define HID_DESKTOP_USAGE_BYTECOUNT 0x3b /* Byte Count */ +#define HID_DESKTOP_USAGE_MOTION 0x3c /* Motion Wakeup */ +#define HID_DESKTOP_USAGE_START 0x3d /* Start */ +#define HID_DESKTOP_USAGE_SELECT 0x3e /* Select */ + /* 0x3f Reserved */ +#define HID_DESKTOP_USAGE_VX 0x40 /* Vx */ +#define HID_DESKTOP_USAGE_VY 0x41 /* Vy */ +#define HID_DESKTOP_USAGE_VZ 0x42 /* Vz */ +#define HID_DESKTOP_USAGE_VBRX 0x43 /* Vbrx */ +#define HID_DESKTOP_USAGE_VBRY 0x44 /* Vbry */ +#define HID_DESKTOP_USAGE_VBRZ 0x45 /* Vbrz */ +#define HID_DESKTOP_USAGE_VNO 0x46 /* Vno */ +#define HID_DESKTOP_USAGE_FEATURE 0x47 /* Feature Notification */ +#define HID_DESKTOP_USAGE_RESOLUTION 0x48 /* Resolution Multiplier */ + /* 0x49-7f Reserved */ +#define HID_DESKTOP_USAGE_CONTROL 0x80 /* System Control */ +#define HID_DESKTOP_USAGE_POWERDOWN 0x81 /* System Power Down */ +#define HID_DESKTOP_USAGE_SLEEP 0x82 /* System Sleep */ +#define HID_DESKTOP_USAGE_WAKEUP 0x83 /* System Wake Up */ +#define HID_DESKTOP_USAGE_CONTEXT_MENU 0x84 /* System Context Menu */ +#define HID_DESKTOP_USAGE_MAIN_MENU 0x85 /* System Main Menu */ +#define HID_DESKTOP_USAGE_APP_MENU 0x86 /* System App Menu */ +#define HID_DESKTOP_USAGE_MENU_HELP 0x87 /* System Menu Help */ +#define HID_DESKTOP_USAGE_MENU_EXIT 0x88 /* System Menu Exit */ +#define HID_DESKTOP_USAGE_MENU_SELECT 0x89 /* System Menu Select */ +#define HID_DESKTOP_USAGE_MENU_RIGHT 0x8a /* System Menu Right */ +#define HID_DESKTOP_USAGE_MENU_LEFT 0x8b /* System Menu Left */ +#define HID_DESKTOP_USAGE_MENU_UP 0x8c /* System Menu Up */ +#define HID_DESKTOP_USAGE_MENU_DOWN 0x8d /* System Menu Down */ +#define HID_DESKTOP_USAGE_COLD_RESTART 0x8e /* System Cold Restart */ +#define HID_DESKTOP_USAGE_WARM_RESTART 0x8f /* System Warm Restart */ +#define HID_DESKTOP_USAGE_DPAD_UP 0x90 /* D-pad Up */ +#define HID_DESKTOP_USAGE_DPAD_DOWN 0x91 /* D-pad Down */ +#define HID_DESKTOP_USAGE_DPAD_RIGHT 0x92 /* D-pad Right */ +#define HID_DESKTOP_USAGE_DPAD_LEFT 0x93 /* D-pad Left */ + /* 0x94-9f Reserved */ +#define HID_DESKTOP_USAGE_DOCK 0xa0 /* System Dock */ +#define HID_DESKTOP_USAGE_UNDOCK 0xa1 /* System Undock */ +#define HID_DESKTOP_USAGE_SETUP 0xa2 /* System Setup */ +#define HID_DESKTOP_USAGE_BREAK 0xa3 /* System Break */ +#define HID_DESKTOP_USAGE_DEBUG_BREAK 0xa4 /* System Debugger Break */ +#define HID_DESKTOP_USAGE_APP_BREAK 0xa5 /* Application Break */ +#define HID_DESKTOP_USAGE_APP_DEBUG_BREAK 0xa6 /* Application Debugger Break */ +#define HID_DESKTOP_USAGE_MUTE 0xa7 /* System Speaker Mute */ +#define HID_DESKTOP_USAGE_HIBERNATE 0xa8 /* System Hibernate */ + /* 0xa9-af Reserved */ +#define HID_DESKTOP_USAGE_DISPLAY_INVERT 0xb0 /* System Display Invert */ +#define HID_DESKTOP_USAGE_DISPALY_INTERNAL 0xb1 /* System Display Internal */ +#define HID_DESKTOP_USAGE_DISPLAY_EXTERNAL 0xb2 /* System Display External */ +#define HID_DESKTOP_USAGE_DISPLAY_BOTH 0xb3 /* System Display Both */ +#define HID_DESKTOP_USAGE_DISPLAY_DUAL 0xb4 /* System Display Dual */ +#define HID_DESKTOP_USAGE_DISPLAY_TOGGLE 0xb5 /* System Display Toggle Int/Ext */ +#define HID_DESKTOP_USAGE_DISPLAY_SWAP 0xb6 /* System Display Swap */ +#define HID_DESKTOP_USAGE_ 0xb7 /* System Display LCD Autoscale */ + /* 0xb8-ffff Reserved */ + +/* Keyboard usage IDs (HuT 10) */ +#define HID_KBD_USAGE_NONE 0x00 /* Reserved (no event indicated) */ +#define HID_KBD_USAGE_ERRORROLLOVER 0x01 /* Keyboard ErrorRollOver */ +#define HID_KBD_USAGE_POSTFAIL 0x02 /* Keyboard POSTFail */ +#define HID_KBD_USAGE_ERRUNDEF 0x03 /* Keyboard ErrorUndefined */ +#define HID_KBD_USAGE_A 0x04 /* Keyboard a or A (B-Z follow) */ +#define HID_KBD_USAGE_1 0x1e /* Keyboard 1 (2-9 follow) */ +#define HID_KBD_USAGE_EXCLAM 0x1e /* Keyboard 1 and ! */ +#define HID_KBD_USAGE_AT 0x1f /* Keyboard 2 and @ */ +#define HID_KBD_USAGE_POUND 0x20 /* Keyboard 3 and # */ +#define HID_KBD_USAGE_DOLLAR 0x21 /* Keyboard 4 and $ */ +#define HID_KBD_USAGE_PERCENT 0x22 /* Keyboard 5 and % */ +#define HID_KBD_USAGE_CARAT 0x23 /* Keyboard 6 and ^ */ +#define HID_KBD_USAGE_AMPERSAND 0x24 /* Keyboard 7 and & */ +#define HID_KBD_USAGE_ASTERISK 0x25 /* Keyboard 8 and * */ +#define HID_KBD_USAGE_LPAREN 0x26 /* Keyboard 9 and ( */ +#define HID_KBD_USAGE_0 0x27 /* Keyboard 0 and ) */ +#define HID_KBD_USAGE_RPAREN 0x27 /* Keyboard 0 and ) */ +#define HID_KBD_USAGE_ENTER 0x28 /* Keyboard Return (ENTER) */ +#define HID_KBD_USAGE_ESCAPE 0x29 /* Keyboard ESCAPE */ +#define HID_KBD_USAGE_DELETE 0x2a /* Keyboard DELETE (Backspace) */ +#define HID_KBD_USAGE_TAB 0x2b /* Keyboard Tab */ +#define HID_KBD_USAGE_SPACE 0x2c /* Keyboard Spacebar */ +#define HID_KBD_USAGE_HYPHEN 0x2d /* Keyboard - and (underscore) */ +#define HID_KBD_USAGE_UNDERSCORE 0x2d /* Keyboard - and (underscore) */ +#define HID_KBD_USAGE_EQUAL 0x2e /* Keyboard = and + */ +#define HID_KBD_USAGE_PLUS 0x2e /* Keyboard = and + */ +#define HID_KBD_USAGE_LBRACKET 0x2f /* Keyboard [ and { */ +#define HID_KBD_USAGE_LBRACE 0x2f /* Keyboard [ and { */ +#define HID_KBD_USAGE_RBRACKET 0x30 /* Keyboard ] and } */ +#define HID_KBD_USAGE_RBRACE 0x30 /* Keyboard ] and } */ +#define HID_KBD_USAGE_BSLASH 0x31 /* Keyboard \ and | */ +#define HID_KBD_USAGE_VERTBAR 0x31 /* Keyboard \ and | */ +#define HID_KBD_USAGE_NONUSPOUND 0x32 /* Keyboard Non-US # and ~ */ +#define HID_KBD_USAGE_TILDE 0x32 /* Keyboard Non-US # and ~ */ +#define HID_KBD_USAGE_SEMICOLON 0x33 /* Keyboard ; and : */ +#define HID_KBD_USAGE_COLON 0x33 /* Keyboard ; and : */ +#define HID_KBD_USAGE_SQUOTE 0x34 /* Keyboard ' and " */ +#define HID_KBD_USAGE_DQUOUTE 0x34 /* Keyboard ' and " */ +#define HID_KBD_USAGE_GACCENT 0x35 /* Keyboard Grave Accent and Tilde */ +#define HID_KBD_USAGE_GTILDE 0x35 /* Keyboard Grave Accent and Tilde */ +#define HID_KBD_USAGE_COMMON 0x36 /* Keyboard , and < */ +#define HID_KBD_USAGE_LT 0x36 /* Keyboard , and < */ +#define HID_KBD_USAGE_PERIOD 0x37 /* Keyboard . and > */ +#define HID_KBD_USAGE_GT 0x37 /* Keyboard . and > */ +#define HID_KBD_USAGE_DIV 0x38 /* Keyboard / and ? */ +#define HID_KBD_USAGE_QUESTION 0x38 /* Keyboard / and ? */ +#define HID_KBD_USAGE_CAPSLOCK 0x39 /* Keyboard Caps Lock */ +#define HID_KBD_USAGE_F1 0x3a /* Keyboard F1 */ +#define HID_KBD_USAGE_F2 0x3b /* Keyboard F2 */ +#define HID_KBD_USAGE_F3 0x3c /* Keyboard F3 */ +#define HID_KBD_USAGE_F4 0x3d /* Keyboard F4 */ +#define HID_KBD_USAGE_F5 0x3e /* Keyboard F5 */ +#define HID_KBD_USAGE_F6 0x3f /* Keyboard F6 */ +#define HID_KBD_USAGE_F7 0x40 /* Keyboard F7 */ +#define HID_KBD_USAGE_F8 0x41 /* Keyboard F8 */ +#define HID_KBD_USAGE_F9 0x42 /* Keyboard F9 */ +#define HID_KBD_USAGE_F10 0x43 /* Keyboard F10 */ +#define HID_KBD_USAGE_F11 0x44 /* Keyboard F11 */ +#define HID_KBD_USAGE_F12 0x45 /* Keyboard F12 */ +#define HID_KBD_USAGE_PRINTSCN 0x46 /* Keyboard PrintScreen */ +#define HID_KBD_USAGE_SCROLLLOCK 0x47 /* Keyboard Scroll Lock */ +#define HID_KBD_USAGE_PAUSE 0x48 /* Keyboard Pause */ +#define HID_KBD_USAGE_INSERT 0x49 /* Keyboard Insert */ +#define HID_KBD_USAGE_HOME 0x4a /* Keyboard Home */ +#define HID_KBD_USAGE_PAGEUP 0x4b /* Keyboard PageUp */ +#define HID_KBD_USAGE_DELFWD 0x4c /* Keyboard Delete Forward */ +#define HID_KBD_USAGE_END 0x4d /* Keyboard End */ +#define HID_KBD_USAGE_PAGEDOWN 0x4e /* Keyboard PageDown */ +#define HID_KBD_USAGE_RIGHT 0x4f /* eyboard RightArrow */ +#define HID_KBD_USAGE_LEFT 0x50 /* Keyboard LeftArrow */ +#define HID_KBD_USAGE_DOWN 0x51 /* Keyboard DownArrow */ +#define HID_KBD_USAGE_UP 0x52 /* Keyboard UpArrow */ +#define HID_KBD_USAGE_KPDNUMLOCK 0x53 /* Keypad Num Lock and Clear */ +#define HID_KBD_USAGE_KPDNUMLOCKCLEAR 0x53 /* Keypad Num Lock and Clear */ +#define HID_KBD_USAGE_KPDDIV 0x54 /* Keypad / */ +#define HID_KBD_USAGE_KPDMUL 0x55 /* Keypad * */ +#define HID_KBD_USAGE_KPDHMINUS 0x56 /* Keypad - */ +#define HID_KBD_USAGE_KPDPLUS 0x57 /* Keypad + */ +#define HID_KBD_USAGE_KPDEMTER 0x58 /* Keypad ENTER */ +#define HID_KBD_USAGE_KPD1 0x59 /* Keypad 1 (2-9 follow) */ +#define HID_KBD_USAGE_KPDEND 0x59 /* Keypad 1 and End */ +#define HID_KBD_USAGE_KPDDOWN 0x5a /* Keypad 2 and Down Arrow */ +#define HID_KBD_USAGE_KPDPAGEDN 0x5b /* Keypad 3 and PageDn */ +#define HID_KBD_USAGE_KPDLEFT 0x5c /* Keypad 4 and Left Arrow */ +#define HID_KBD_USAGE_KPDRIGHT 0x5e /* Keypad 6 and Right Arrow */ +#define HID_KBD_USAGE_KPDHOME 0x5f /* Keypad 7 and Home */ +#define HID_KBD_USAGE_KPDUP 0x60 /* Keypad 8 and Up Arrow */ +#define HID_KBD_USAGE_KPDPAGEUP 0x61 /* Keypad 9 and PageUp */ +#define HID_KBD_USAGE_KPD0 0x62 /* Keypad 0 and Insert */ +#define HID_KBD_USAGE_KPDINSERT 0x62 /* Keypad 0 and Insert */ +#define HID_KBD_USAGE_KPDDECIMALPT 0x63 /* Keypad . and Delete */ +#define HID_KBD_USAGE_KPDDELETE 0x63 /* Keypad . and Delete */ +#define HID_KBD_USAGE_NONSLASH 0x64 /* Keyboard Non-US \ and | */ +#define HID_KBD_USAGE_NONUSVERT 0x64 /* Keyboard Non-US \ and | */ +#define HID_KBD_USAGE_APPLICATION 0x65 /* Keyboard Application */ +#define HID_KBD_USAGE_POWER 0x66 /* Keyboard Power */ +#define HID_KBD_USAGE_KPDEQUAL 0x67 /* Keypad = */ +#define HID_KBD_USAGE_F13 0x68 /* Keyboard F13 */ +#define HID_KBD_USAGE_F14 0x69 /* Keyboard F14 */ +#define HID_KBD_USAGE_F15 0x6a /* Keyboard F15 */ +#define HID_KBD_USAGE_F16 0x6b /* Keyboard F16 */ +#define HID_KBD_USAGE_F17 0x6c /* Keyboard F17 */ +#define HID_KBD_USAGE_F18 0x6d /* Keyboard F18 */ +#define HID_KBD_USAGE_F19 0x6e /* Keyboard F19 */ +#define HID_KBD_USAGE_F20 0x6f /* Keyboard F20 */ +#define HID_KBD_USAGE_F21 0x70 /* Keyboard F21 */ +#define HID_KBD_USAGE_F22 0x71 /* Keyboard F22 */ +#define HID_KBD_USAGE_F23 0x72 /* Keyboard F23 */ +#define HID_KBD_USAGE_F24 0x73 /* Keyboard F24 */ +#define HID_KBD_USAGE_EXECUTE 0x74 /* Keyboard Execute */ +#define HID_KBD_USAGE_HELP 0x75 /* Keyboard Help */ +#define HID_KBD_USAGE_MENU 0x76 /* Keyboard Menu */ +#define HID_KBD_USAGE_SELECT 0x77 /* Keyboard Select */ +#define HID_KBD_USAGE_STOP 0x78 /* Keyboard Stop */ +#define HID_KBD_USAGE_AGAIN 0x79 /* Keyboard Again */ +#define HID_KBD_USAGE_UNDO 0x7a /* Keyboard Undo */ +#define HID_KBD_USAGE_CUT 0x7b /* Keyboard Cut */ +#define HID_KBD_USAGE_COPY 0x7c /* Keyboard Copy */ +#define HID_KBD_USAGE_PASTE 0x7d /* Keyboard Paste */ +#define HID_KBD_USAGE_FIND 0x7e /* Keyboard Find */ +#define HID_KBD_USAGE_MUTE 0x7f /* Keyboard Mute */ +#define HID_KBD_USAGE_VOLUP 0x80 /* Keyboard Volume Up */ +#define HID_KBD_USAGE_VOLDOWN 0x81 /* Keyboard Volume Down */ +#define HID_KBD_USAGE_LCAPSLOCK 0x82 /* Keyboard Locking Caps Lock */ +#define HID_KBD_USAGE_LNUMLOCK 0x83 /* Keyboard Locking Num Lock */ +#define HID_KBD_USAGE_LSCROLLLOCK 0x84 /* Keyboard Locking Scroll Lock */ +#define HID_KBD_USAGE_KPDCOMMA 0x85 /* Keypad Comma */ +#define HID_KBD_USAGE_KPDEQUALSIGN 0x86 /* Keypad Equal Sign */ +#define HID_KBD_USAGE_INTERNATIONAL1 0x87 /* Keyboard International 1 */ +#define HID_KBD_USAGE_INTERNATIONAL2 0x88 /* Keyboard International 2 */ +#define HID_KBD_USAGE_INTERNATIONAL3 0x89 /* Keyboard International 3 */ +#define HID_KBD_USAGE_INTERNATIONAL4 0x8a /* Keyboard International 4 */ +#define HID_KBD_USAGE_INTERNATIONAL5 0x8b /* Keyboard International 5 */ +#define HID_KBD_USAGE_INTERNATIONAL6 0x8c /* Keyboard International 6 */ +#define HID_KBD_USAGE_INTERNATIONAL7 0x8d /* Keyboard International 7 */ +#define HID_KBD_USAGE_INTERNATIONAL8 0x8e /* Keyboard International 8 */ +#define HID_KBD_USAGE_INTERNATIONAL9 0x8f /* Keyboard International 9 */ +#define HID_KBD_USAGE_LANG1 0x90 /* Keyboard LANG1 */ +#define HID_KBD_USAGE_LANG2 0x91 /* Keyboard LANG2 */ +#define HID_KBD_USAGE_LANG3 0x92 /* Keyboard LANG3 */ +#define HID_KBD_USAGE_LANG4 0x93 /* Keyboard LANG4 */ +#define HID_KBD_USAGE_LANG5 0x94 /* Keyboard LANG5 */ +#define HID_KBD_USAGE_LANG6 0x95 /* Keyboard LANG6 */ +#define HID_KBD_USAGE_LANG7 0x96 /* Keyboard LANG7 */ +#define HID_KBD_USAGE_LANG8 0x97 /* Keyboard LANG8 */ +#define HID_KBD_USAGE_LANG9 0x98 /* Keyboard LANG9 */ +#define HID_KBD_USAGE_ALTERASE 0x99 /* Keyboard Alternate Erase */ +#define HID_KBD_USAGE_SYSREQ 0x9a /* Keyboard SysReq/Attention */ +#define HID_KBD_USAGE_CANCEL 0x9b /* Keyboard Cancel */ +#define HID_KBD_USAGE_CLEAR 0x9c /* Keyboard Clear */ +#define HID_KBD_USAGE_PRIOR 0x9d /* Keyboard Prior */ +#define HID_KBD_USAGE_RETURN 0x9e /* Keyboard Return */ +#define HID_KBD_USAGE_SEPARATOR 0x9f /* Keyboard Separator */ +#define HID_KBD_USAGE_OUT 0xa0 /* Keyboard Out */ +#define HID_KBD_USAGE_OPER 0xa1 /* Keyboard Oper */ +#define HID_KBD_USAGE_CLEARAGAIN 0xa2 /* Keyboard Clear/Again */ +#define HID_KBD_USAGE_CLRSEL 0xa3 /* Keyboard CrSel/Props */ +#define HID_KBD_USAGE_EXSEL 0xa4 /* Keyboard ExSel */ +#define HID_KBD_USAGE_KPD00 0xb0 /* Keypad 00 */ +#define HID_KBD_USAGE_KPD000 0xb1 /* Keypad 000 */ +#define HID_KBD_USAGE_THOUSEPARATOR 0xb2 /* Thousands Separator */ +#define HID_KBD_USAGE_DECSEPARATOR 0xb3 /* Decimal Separator */ +#define HID_KBD_USAGE_CURRUNIT 0xb4 /* Currency Unit */ +#define HID_KBD_USAGE_CURRSUBUNIT 0xb5 /* Currency Sub-unit */ +#define HID_KBD_USAGE_KPDLPAREN 0xb6 /* Keypad ( */ +#define HID_KBD_USAGE_KPDRPAREN 0xb7 /* Keypad ) */ +#define HID_KBD_USAGE_KPDLBRACE 0xb8 /* Keypad { */ +#define HID_KBD_USAGE_KPDRBRACE 0xb9 /* Keypad } */ +#define HID_KBD_USAGE_KPDTAB 0xba /* Keypad Tab */ +#define HID_KBD_USAGE_KPDBACKSPACE 0xbb /* Keypad Backspace */ +#define HID_KBD_USAGE_KPDA 0xbc /* Keypad A (B-F follow) */ +#define HID_KBD_USAGE_KPDXOR 0xc2 /* Keypad XOR */ +#define HID_KBD_USAGE_KPDEXP 0xc3 /* Keypad ^ */ +#define HID_KBD_USAGE_KPDPERCENT 0xc4 /* Keypad % */ +#define HID_KBD_USAGE_KPDLT 0xc5 /* Keypad < */ +#define HID_KBD_USAGE_KPDGT 0xc6 /* Keypad > */ +#define HID_KBD_USAGE_KPDAMPERSAND 0xc7 /* Keypad & */ +#define HID_KBD_USAGE_KPDAND 0xc8 /* Keypad && */ +#define HID_KBD_USAGE_KPDVERT 0xc9 /* Keypad | */ +#define HID_KBD_USAGE_KPDOR 0xca /* Keypad || */ +#define HID_KBD_USAGE_KPDCOLON 0xcb /* Keypad : */ +#define HID_KBD_USAGE_KPDPOUND 0xcc /* Keypad # */ +#define HID_KBD_USAGE_KPDSPACE 0xcd /* Keypad Space */ +#define HID_KBD_USAGE_KPDAT 0xce /* Keypad @ */ +#define HID_KBD_USAGE_KPDEXCLAM 0xcf /* Keypad ! */ +#define HID_KBD_USAGE_KPDMEMSTORE 0xd0 /* Keypad Memory Store */ +#define HID_KBD_USAGE_KPDMEMRECALL 0xd1 /* Keypad Memory Recall */ +#define HID_KBD_USAGE_KPDMEMCLEAR 0xd2 /* Keypad Memory Clear */ +#define HID_KBD_USAGE_KPDMEMADD 0xd3 /* Keypad Memory Add */ +#define HID_KBD_USAGE_KPDMEMSUB 0xd4 /* Keypad Memory Subtract */ +#define HID_KBD_USAGE_KPDMEMMULT 0xd5 /* Keypad Memory Multiply */ +#define HID_KBD_USAGE_KPDMEMDIV 0xd6 /* Keypad Memory Divide */ +#define HID_KBD_USAGE_KPDPLUSMINUS 0xd7 /* Keypad +/- */ +#define HID_KBD_USAGE_KPDCLEAR 0xd8 /* Keypad Clear */ +#define HID_KBD_USAGE_KPDCLEARENTRY 0xd9 /* Keypad Clear Entry */ +#define HID_KBD_USAGE_KPDBINARY 0xda /* Keypad Binary */ +#define HID_KBD_USAGE_KPDOCTAL 0xdb /* Keypad Octal */ +#define HID_KBD_USAGE_KPDDECIMAL 0xdc /* Keypad Decimal */ +#define HID_KBD_USAGE_KPDHEXADECIMAL 0xdd /* Keypad Hexadecimal */ +#define HID_KBD_USAGE_LCTRL 0xe0 /* Keyboard LeftControl */ +#define HID_KBD_USAGE_LSHIFT 0xe1 /* Keyboard LeftShift */ +#define HID_KBD_USAGE_LALT 0xe2 /* Keyboard LeftAlt */ +#define HID_KBD_USAGE_LGUI 0xe3 /* Keyboard Left GUI */ +#define HID_KBD_USAGE_RCTRL 0xe4 /* Keyboard RightControl */ +#define HID_KBD_USAGE_RSHIFT 0xe5 /* Keyboard RightShift */ +#define HID_KBD_USAGE_RALT 0xe6 /* Keyboard RightAlt */ +#define HID_KBD_USAGE_RGUI 0xe7 /* Keyboard Right GUI */ + +#define HID_KBD_USAGE_MAX 0xe7 + +/* HID Report Definitions */ +struct usb_hid_class_subdescriptor { + uint8_t bDescriptorType;/* Class descriptor type (See 7.1) */ + uint16_t wDescriptorLength;/* Size of the report descriptor */ +} __PACKED; + +struct usb_hid_descriptor { + uint8_t bLength; /* Size of the HID descriptor */ + uint8_t bDescriptorType;/* HID descriptor type */ + uint16_t bcdHID;/* HID class specification release */ + uint8_t bCountryCode;/* Country code */ + uint8_t bNumDescriptors;/* Number of descriptors (>=1) */ + + /* + * Specification says at least one Class Descriptor needs to + * be present (Report Descriptor). + */ + struct usb_hid_class_subdescriptor subdesc[1]; +} __PACKED; + +/* Standard Reports *********************************************************/ + +/* Keyboard input report (8 bytes) (HID B.1) */ +struct usb_hid_kbd_report +{ + uint8_t modifier; /* Modifier keys. See HID_MODIFER_* definitions */ + uint8_t reserved; + uint8_t key[6]; /* Keycode 1-6 */ +}; + +/* Keyboard output report (1 byte) (HID B.1), + * see HID_KBD_OUTPUT_* definitions + */ + +/* Mouse input report (HID B.2) */ +struct usb_hid_mouse_report +{ + uint8_t buttons; /* See HID_MOUSE_INPUT_BUTTON_* definitions */ + int8_t xdisp; /* X displacement */ + int8_t ydisp; /* y displacement */ + /* Device specific additional bytes may follow */ + uint8_t wdisp; /* Wheel displacement */ +}; + +/* Joystick input report (1 bytes) (HID D.1) */ +struct usb_hid_js_report +{ + int8_t xpos; /* X position */ + int8_t ypos; /* X position */ + uint8_t buttons; /* See USBHID_JSIN_* definitions */ + uint8_t throttle; /* Throttle */ +}; + +#endif /* USB_HID_H */ diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/class/hid/usbd_hid.c b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/class/hid/usbd_hid.c similarity index 69% rename from stm32f0_cherryusb/3rdParty/CherryUSB/class/hid/usbd_hid.c rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/class/hid/usbd_hid.c index 711a96b..fed749f 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/class/hid/usbd_hid.c +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/class/hid/usbd_hid.c @@ -1,89 +1,126 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#include "usbd_core.h" -#include "usbd_hid.h" - -static int hid_class_interface_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) -{ - USB_LOG_DBG("HID Class request: " - "bRequest 0x%02x\r\n", - setup->bRequest); - - uint8_t intf_num = LO_BYTE(setup->wIndex); - - switch (setup->bRequest) { - case HID_REQUEST_GET_REPORT: - /* report id ,report type */ - usbd_hid_get_report(busid, intf_num, LO_BYTE(setup->wValue), HI_BYTE(setup->wValue), data, len); - break; - case HID_REQUEST_GET_IDLE: - (*data)[0] = usbd_hid_get_idle(busid, intf_num, LO_BYTE(setup->wValue)); - *len = 1; - break; - case HID_REQUEST_GET_PROTOCOL: - (*data)[0] = usbd_hid_get_protocol(busid, intf_num); - *len = 1; - break; - case HID_REQUEST_SET_REPORT: - /* report id ,report type, report, report len */ - usbd_hid_set_report(busid, intf_num, LO_BYTE(setup->wValue), HI_BYTE(setup->wValue), *data, *len); - break; - case HID_REQUEST_SET_IDLE: - /* report id, duration */ - usbd_hid_set_idle(busid, intf_num, LO_BYTE(setup->wValue), HI_BYTE(setup->wValue)); - break; - case HID_REQUEST_SET_PROTOCOL: - /* protocol */ - usbd_hid_set_protocol(busid, intf_num, LO_BYTE(setup->wValue)); - break; - - default: - USB_LOG_WRN("Unhandled HID Class bRequest 0x%02x\r\n", setup->bRequest); - return -1; - } - - return 0; -} - -struct usbd_interface *usbd_hid_init_intf(uint8_t busid, struct usbd_interface *intf, const uint8_t *desc, uint32_t desc_len) -{ - intf->class_interface_handler = hid_class_interface_request_handler; - intf->class_endpoint_handler = NULL; - intf->vendor_handler = NULL; - intf->notify_handler = NULL; - - intf->hid_report_descriptor = desc; - intf->hid_report_descriptor_len = desc_len; - return intf; -} - -__WEAK void usbd_hid_get_report(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t report_type, uint8_t **data, uint32_t *len) -{ - (*data[0]) = 0; - *len = 1; -} - -__WEAK uint8_t usbd_hid_get_idle(uint8_t busid, uint8_t intf, uint8_t report_id) -{ - return 0; -} - -__WEAK uint8_t usbd_hid_get_protocol(uint8_t busid, uint8_t intf) -{ - return 0; -} - -__WEAK void usbd_hid_set_report(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t report_type, uint8_t *report, uint32_t report_len) -{ -} - -__WEAK void usbd_hid_set_idle(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t duration) -{ -} - -__WEAK void usbd_hid_set_protocol(uint8_t busid, uint8_t intf, uint8_t protocol) -{ +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include "usbd_core.h" +#include "usbd_hid.h" + +static int hid_class_interface_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) +{ + USB_LOG_DBG("HID Class request: " + "bRequest 0x%02x\r\n", + setup->bRequest); + + uint8_t intf_num = LO_BYTE(setup->wIndex); + + switch (setup->bRequest) { + case HID_REQUEST_GET_REPORT: + /* report id ,report type */ + usbd_hid_get_report(busid, intf_num, LO_BYTE(setup->wValue), HI_BYTE(setup->wValue), data, len); + break; + case HID_REQUEST_GET_IDLE: + (*data)[0] = usbd_hid_get_idle(busid, intf_num, LO_BYTE(setup->wValue)); + *len = 1; + break; + case HID_REQUEST_GET_PROTOCOL: + (*data)[0] = usbd_hid_get_protocol(busid, intf_num); + *len = 1; + break; + case HID_REQUEST_SET_REPORT: + /* report id ,report type, report, report len */ + usbd_hid_set_report(busid, intf_num, LO_BYTE(setup->wValue), HI_BYTE(setup->wValue), *data, *len); + break; + case HID_REQUEST_SET_IDLE: + /* report id, duration */ + usbd_hid_set_idle(busid, intf_num, LO_BYTE(setup->wValue), HI_BYTE(setup->wValue)); + break; + case HID_REQUEST_SET_PROTOCOL: + /* protocol */ + usbd_hid_set_protocol(busid, intf_num, LO_BYTE(setup->wValue)); + break; + + default: + USB_LOG_WRN("Unhandled HID Class bRequest 0x%02x\r\n", setup->bRequest); + return -1; + } + + return 0; +} + +struct usbd_interface *usbd_hid_init_intf(uint8_t busid, struct usbd_interface *intf, const uint8_t *desc, uint32_t desc_len) +{ + (void)busid; + + intf->class_interface_handler = hid_class_interface_request_handler; + intf->class_endpoint_handler = NULL; + intf->vendor_handler = NULL; + intf->notify_handler = NULL; + + intf->hid_report_descriptor = desc; + intf->hid_report_descriptor_len = desc_len; + return intf; +} + +/* + * Appendix G: HID Request Support Requirements + * + * The following table enumerates the requests that need to be supported by various types of HID class devices. + * Device type GetReport SetReport GetIdle SetIdle GetProtocol SetProtocol + * ------------------------------------------------------------------------------------------ + * Boot Mouse Required Optional Optional Optional Required Required + * Non-Boot Mouse Required Optional Optional Optional Optional Optional + * Boot Keyboard Required Optional Required Required Required Required + * Non-Boot Keybrd Required Optional Required Required Optional Optional + * Other Device Required Optional Optional Optional Optional Optional + */ + +__WEAK void usbd_hid_get_report(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t report_type, uint8_t **data, uint32_t *len) +{ + (void)busid; + (void)intf; + (void)report_id; + (void)report_type; + (*data[0]) = 0; + *len = 1; +} + +__WEAK uint8_t usbd_hid_get_idle(uint8_t busid, uint8_t intf, uint8_t report_id) +{ + (void)busid; + (void)intf; + (void)report_id; + return 0; +} + +__WEAK uint8_t usbd_hid_get_protocol(uint8_t busid, uint8_t intf) +{ + (void)busid; + (void)intf; + return 0; +} + +__WEAK void usbd_hid_set_report(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t report_type, uint8_t *report, uint32_t report_len) +{ + (void)busid; + (void)intf; + (void)report_id; + (void)report_type; + (void)report; + (void)report_len; +} + +__WEAK void usbd_hid_set_idle(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t duration) +{ + (void)busid; + (void)intf; + (void)report_id; + (void)duration; +} + +__WEAK void usbd_hid_set_protocol(uint8_t busid, uint8_t intf, uint8_t protocol) +{ + (void)busid; + (void)intf; + (void)protocol; } \ No newline at end of file diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/class/hid/usbd_hid.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/class/hid/usbd_hid.h similarity index 97% rename from stm32f0_cherryusb/3rdParty/CherryUSB/class/hid/usbd_hid.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/class/hid/usbd_hid.h index 59067a0..d5c3484 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/class/hid/usbd_hid.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/class/hid/usbd_hid.h @@ -1,34 +1,34 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USBD_HID_H -#define USBD_HID_H - -#include "usb_hid.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Init hid interface driver */ -struct usbd_interface *usbd_hid_init_intf(uint8_t busid, struct usbd_interface *intf, const uint8_t *desc, uint32_t desc_len); - -/* Register desc api */ -void usbd_hid_descriptor_register(uint8_t busid, uint8_t intf_num, const uint8_t *desc); -void usbd_hid_report_descriptor_register(uint8_t busid, uint8_t intf_num, const uint8_t *desc, uint32_t desc_len); - -/* Setup request command callback api */ -void usbd_hid_get_report(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t report_type, uint8_t **data, uint32_t *len); -uint8_t usbd_hid_get_idle(uint8_t busid, uint8_t intf, uint8_t report_id); -uint8_t usbd_hid_get_protocol(uint8_t busid, uint8_t intf); -void usbd_hid_set_report(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t report_type, uint8_t *report, uint32_t report_len); -void usbd_hid_set_idle(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t duration); -void usbd_hid_set_protocol(uint8_t busid, uint8_t intf, uint8_t protocol); - -#ifdef __cplusplus -} -#endif - -#endif /* USBD_HID_H */ +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USBD_HID_H +#define USBD_HID_H + +#include "usb_hid.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Init hid interface driver */ +struct usbd_interface *usbd_hid_init_intf(uint8_t busid, struct usbd_interface *intf, const uint8_t *desc, uint32_t desc_len); + +/* Register desc api */ +void usbd_hid_descriptor_register(uint8_t busid, uint8_t intf_num, const uint8_t *desc); +void usbd_hid_report_descriptor_register(uint8_t busid, uint8_t intf_num, const uint8_t *desc, uint32_t desc_len); + +/* Setup request command callback api */ +void usbd_hid_get_report(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t report_type, uint8_t **data, uint32_t *len); +uint8_t usbd_hid_get_idle(uint8_t busid, uint8_t intf, uint8_t report_id); +uint8_t usbd_hid_get_protocol(uint8_t busid, uint8_t intf); +void usbd_hid_set_report(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t report_type, uint8_t *report, uint32_t report_len); +void usbd_hid_set_idle(uint8_t busid, uint8_t intf, uint8_t report_id, uint8_t duration); +void usbd_hid_set_protocol(uint8_t busid, uint8_t intf, uint8_t protocol); + +#ifdef __cplusplus +} +#endif + +#endif /* USBD_HID_H */ diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_dc.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_dc.h similarity index 94% rename from stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_dc.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_dc.h index 9105823..a10869a 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_dc.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_dc.h @@ -1,194 +1,194 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USB_DC_H -#define USB_DC_H - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief init device controller registers. - * @return On success will return 0, and others indicate fail. - */ -int usb_dc_init(uint8_t busid); - -/** - * @brief deinit device controller registers. - * @return On success will return 0, and others indicate fail. - */ -int usb_dc_deinit(uint8_t busid); - -/** - * @brief Set USB device address - * - * @param[in] addr Device address - * - * @return On success will return 0, and others indicate fail. - */ -int usbd_set_address(uint8_t busid, const uint8_t addr); - -/** - * @brief Get USB device speed - * - * @param[in] port port index - * - * @return port speed, USB_SPEED_LOW or USB_SPEED_FULL or USB_SPEED_HIGH - */ -uint8_t usbd_get_port_speed(uint8_t busid, const uint8_t port); - -/** - * @brief configure and enable endpoint. - * - * @param [in] ep_cfg Endpoint config. - * - * @return On success will return 0, and others indicate fail. - */ -int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep); - -/** - * @brief Disable the selected endpoint - * - * @param[in] ep Endpoint address - * - * @return On success will return 0, and others indicate fail. - */ -int usbd_ep_close(uint8_t busid, const uint8_t ep); - -/** - * @brief Set stall condition for the selected endpoint - * - * @param[in] ep Endpoint address - * - * - * @return On success will return 0, and others indicate fail. - */ -int usbd_ep_set_stall(uint8_t busid, const uint8_t ep); - -/** - * @brief Clear stall condition for the selected endpoint - * - * @param[in] ep Endpoint address corresponding to the one - * listed in the device configuration table - * - * @return On success will return 0, and others indicate fail. - */ -int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep); - -/** - * @brief Check if the selected endpoint is stalled - * - * @param[in] ep Endpoint address - * - * @param[out] stalled Endpoint stall status - * - * @return On success will return 0, and others indicate fail. - */ -int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled); - -/** - * @brief Setup in ep transfer setting and start transfer. - * - * This function is asynchronous. - * This function is similar to uart with tx dma. - * - * This function is called to write data to the specified endpoint. The - * supplied usbd_endpoint_callback function will be called when data is transmitted - * out. - * - * @param[in] ep Endpoint address corresponding to the one - * listed in the device configuration table - * @param[in] data Pointer to data to write - * @param[in] data_len Length of the data requested to write. This may - * be zero for a zero length status packet. - * @return 0 on success, negative errno code on fail. - */ -int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len); - -/** - * @brief Setup out ep transfer setting and start transfer. - * - * This function is asynchronous. - * This function is similar to uart with rx dma. - * - * This function is called to read data to the specified endpoint. The - * supplied usbd_endpoint_callback function will be called when data is received - * in. - * - * @param[in] ep Endpoint address corresponding to the one - * listed in the device configuration table - * @param[in] data Pointer to data to read - * @param[in] data_len Max length of the data requested to read. - * - * @return 0 on success, negative errno code on fail. - */ -int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len); - -/* usb dcd irq callback */ - -/** - * @brief Usb connect irq callback. - */ -void usbd_event_connect_handler(uint8_t busid); - -/** - * @brief Usb disconnect irq callback. - */ -void usbd_event_disconnect_handler(uint8_t busid); - -/** - * @brief Usb resume irq callback. - */ -void usbd_event_resume_handler(uint8_t busid); - -/** - * @brief Usb suspend irq callback. - */ -void usbd_event_suspend_handler(uint8_t busid); - -/** - * @brief Usb reset irq callback. - */ -void usbd_event_reset_handler(uint8_t busid); - -/** - * @brief Usb setup packet recv irq callback. - * @param[in] psetup setup packet. - */ -void usbd_event_ep0_setup_complete_handler(uint8_t busid, uint8_t *psetup); - -/** - * @brief In ep transfer complete irq callback. - * @param[in] ep Endpoint address corresponding to the one - * listed in the device configuration table - * @param[in] nbytes How many nbytes have transferred. - */ -void usbd_event_ep_in_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes); - -/** - * @brief Out ep transfer complete irq callback. - * @param[in] ep Endpoint address corresponding to the one - * listed in the device configuration table - * @param[in] nbytes How many nbytes have transferred. - */ -void usbd_event_ep_out_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes); - -#ifdef CONFIG_USBDEV_TEST_MODE -/** - * @brief Usb execute test mode - * @param[in] busid device busid - * @param[in] test_mode usb test mode - */ -void usbd_execute_test_mode(uint8_t busid, uint8_t test_mode); -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* USB_DC_H */ +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_DC_H +#define USB_DC_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief init device controller registers. + * @return On success will return 0, and others indicate fail. + */ +int usb_dc_init(uint8_t busid); + +/** + * @brief deinit device controller registers. + * @return On success will return 0, and others indicate fail. + */ +int usb_dc_deinit(uint8_t busid); + +/** + * @brief Set USB device address + * + * @param[in] addr Device address + * + * @return On success will return 0, and others indicate fail. + */ +int usbd_set_address(uint8_t busid, const uint8_t addr); + +/** + * @brief Get USB device speed + * + * @param[in] busid bus index + * + * @return port speed, USB_SPEED_LOW or USB_SPEED_FULL or USB_SPEED_HIGH + */ +uint8_t usbd_get_port_speed(uint8_t busid); + +/** + * @brief configure and enable endpoint. + * + * @param [in] ep_cfg Endpoint config. + * + * @return On success will return 0, and others indicate fail. + */ +int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep); + +/** + * @brief Disable the selected endpoint + * + * @param[in] ep Endpoint address + * + * @return On success will return 0, and others indicate fail. + */ +int usbd_ep_close(uint8_t busid, const uint8_t ep); + +/** + * @brief Set stall condition for the selected endpoint + * + * @param[in] ep Endpoint address + * + * + * @return On success will return 0, and others indicate fail. + */ +int usbd_ep_set_stall(uint8_t busid, const uint8_t ep); + +/** + * @brief Clear stall condition for the selected endpoint + * + * @param[in] ep Endpoint address corresponding to the one + * listed in the device configuration table + * + * @return On success will return 0, and others indicate fail. + */ +int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep); + +/** + * @brief Check if the selected endpoint is stalled + * + * @param[in] ep Endpoint address + * + * @param[out] stalled Endpoint stall status + * + * @return On success will return 0, and others indicate fail. + */ +int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled); + +/** + * @brief Setup in ep transfer setting and start transfer. + * + * This function is asynchronous. + * This function is similar to uart with tx dma. + * + * This function is called to write data to the specified endpoint. The + * supplied usbd_endpoint_callback function will be called when data is transmitted + * out. + * + * @param[in] ep Endpoint address corresponding to the one + * listed in the device configuration table + * @param[in] data Pointer to data to write + * @param[in] data_len Length of the data requested to write. This may + * be zero for a zero length status packet. + * @return 0 on success, negative errno code on fail. + */ +int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len); + +/** + * @brief Setup out ep transfer setting and start transfer. + * + * This function is asynchronous. + * This function is similar to uart with rx dma. + * + * This function is called to read data to the specified endpoint. The + * supplied usbd_endpoint_callback function will be called when data is received + * in. + * + * @param[in] ep Endpoint address corresponding to the one + * listed in the device configuration table + * @param[in] data Pointer to data to read + * @param[in] data_len Max length of the data requested to read. + * + * @return 0 on success, negative errno code on fail. + */ +int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len); + +/* usb dcd irq callback */ + +/** + * @brief Usb connect irq callback. + */ +void usbd_event_connect_handler(uint8_t busid); + +/** + * @brief Usb disconnect irq callback. + */ +void usbd_event_disconnect_handler(uint8_t busid); + +/** + * @brief Usb resume irq callback. + */ +void usbd_event_resume_handler(uint8_t busid); + +/** + * @brief Usb suspend irq callback. + */ +void usbd_event_suspend_handler(uint8_t busid); + +/** + * @brief Usb reset irq callback. + */ +void usbd_event_reset_handler(uint8_t busid); + +/** + * @brief Usb setup packet recv irq callback. + * @param[in] psetup setup packet. + */ +void usbd_event_ep0_setup_complete_handler(uint8_t busid, uint8_t *psetup); + +/** + * @brief In ep transfer complete irq callback. + * @param[in] ep Endpoint address corresponding to the one + * listed in the device configuration table + * @param[in] nbytes How many nbytes have transferred. + */ +void usbd_event_ep_in_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes); + +/** + * @brief Out ep transfer complete irq callback. + * @param[in] ep Endpoint address corresponding to the one + * listed in the device configuration table + * @param[in] nbytes How many nbytes have transferred. + */ +void usbd_event_ep_out_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes); + +#ifdef CONFIG_USBDEV_TEST_MODE +/** + * @brief Usb execute test mode + * @param[in] busid device busid + * @param[in] test_mode usb test mode + */ +void usbd_execute_test_mode(uint8_t busid, uint8_t test_mode); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* USB_DC_H */ diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_def.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_def.h similarity index 93% rename from stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_def.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_def.h index 86e52b8..aea3d6a 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_def.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_def.h @@ -1,699 +1,724 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USB_DEF_H -#define USB_DEF_H - -/* Useful define */ -#define USB_1_1 0x0110 -#define USB_2_0 0x0200 -/* Set USB version to 2.1 so that the host will request the BOS descriptor */ -#define USB_2_1 0x0210 -#define USB_3_0 0x0300 -#define USB_3_1 0x0310 -#define USB_3_2 0x0320 - -/* Device speeds */ -#define USB_SPEED_UNKNOWN 0 /* Transfer rate not yet set */ -#define USB_SPEED_LOW 1 /* USB 1.1 */ -#define USB_SPEED_FULL 2 /* USB 1.1 */ -#define USB_SPEED_HIGH 3 /* USB 2.0 */ -#define USB_SPEED_WIRELESS 4 /* Wireless USB 2.5 */ -#define USB_SPEED_SUPER 5 /* USB 3.0 */ -#define USB_SPEED_SUPER_PLUS 6 /* USB 3.1 */ - -/* Maximum number of devices per controller */ -#define USB_MAX_DEVICES (127) - -/* Default USB control EP, always 0 and 0x80 */ -#define USB_CONTROL_OUT_EP0 0 -#define USB_CONTROL_IN_EP0 0x80 - -/**< maximum packet size (MPS) for EP 0 */ -#define USB_CTRL_EP_MPS 64 - -/* USB PID Types */ -#define USB_PID_OUT (0x01) /* Tokens */ -#define USB_PID_IN (0x09) -#define USB_PID_SOF (0x05) -#define USB_PID_SETUP (0x0d) - -#define USB_PID_DATA0 (0x03) /* Data */ -#define USB_PID_DATA1 (0x0b) -#define USB_PID_DATA2 (0x07) -#define USB_PID_MDATA (0x0f) - -#define USB_PID_ACK (0x02) /* Handshake */ -#define USB_PID_NAK (0x0a) -#define USB_PID_STALL (0x0e) -#define USB_PID_NYET (0x06) - -#define USB_PID_PRE (0x0c) /* Special */ -#define USB_PID_ERR (0x0c) -#define USB_PID_SPLIT (0x08) -#define USB_PID_PING (0x04) -#define USB_PID_RESERVED (0x00) - -#define USB_REQUEST_DIR_SHIFT 7U /* Bits 7: Request dir */ -#define USB_REQUEST_DIR_OUT (0U << USB_REQUEST_DIR_SHIFT) /* Bit 7=0: Host-to-device */ -#define USB_REQUEST_DIR_IN (1U << USB_REQUEST_DIR_SHIFT) /* Bit 7=1: Device-to-host */ -#define USB_REQUEST_DIR_MASK (1U << USB_REQUEST_DIR_SHIFT) /* Bit 7=1: Direction bit */ - -#define USB_REQUEST_TYPE_SHIFT 5U /* Bits 5:6: Request type */ -#define USB_REQUEST_STANDARD (0U << USB_REQUEST_TYPE_SHIFT) -#define USB_REQUEST_CLASS (1U << USB_REQUEST_TYPE_SHIFT) -#define USB_REQUEST_VENDOR (2U << USB_REQUEST_TYPE_SHIFT) -#define USB_REQUEST_RESERVED (3U << USB_REQUEST_TYPE_SHIFT) -#define USB_REQUEST_TYPE_MASK (3U << USB_REQUEST_TYPE_SHIFT) - -#define USB_REQUEST_RECIPIENT_SHIFT 0U /* Bits 0:4: Recipient */ -#define USB_REQUEST_RECIPIENT_DEVICE (0U << USB_REQUEST_RECIPIENT_SHIFT) -#define USB_REQUEST_RECIPIENT_INTERFACE (1U << USB_REQUEST_RECIPIENT_SHIFT) -#define USB_REQUEST_RECIPIENT_ENDPOINT (2U << USB_REQUEST_RECIPIENT_SHIFT) -#define USB_REQUEST_RECIPIENT_OTHER (3U << USB_REQUEST_RECIPIENT_SHIFT) -#define USB_REQUEST_RECIPIENT_MASK (3U << USB_REQUEST_RECIPIENT_SHIFT) - -/* USB Standard Request Codes */ -#define USB_REQUEST_GET_STATUS 0x00 -#define USB_REQUEST_CLEAR_FEATURE 0x01 -#define USB_REQUEST_SET_FEATURE 0x03 -#define USB_REQUEST_SET_ADDRESS 0x05 -#define USB_REQUEST_GET_DESCRIPTOR 0x06 -#define USB_REQUEST_SET_DESCRIPTOR 0x07 -#define USB_REQUEST_GET_CONFIGURATION 0x08 -#define USB_REQUEST_SET_CONFIGURATION 0x09 -#define USB_REQUEST_GET_INTERFACE 0x0A -#define USB_REQUEST_SET_INTERFACE 0x0B -#define USB_REQUEST_SYNCH_FRAME 0x0C -#define USB_REQUEST_SET_ENCRYPTION 0x0D -#define USB_REQUEST_GET_ENCRYPTION 0x0E -#define USB_REQUEST_RPIPE_ABORT 0x0E -#define USB_REQUEST_SET_HANDSHAKE 0x0F -#define USB_REQUEST_RPIPE_RESET 0x0F -#define USB_REQUEST_GET_HANDSHAKE 0x10 -#define USB_REQUEST_SET_CONNECTION 0x11 -#define USB_REQUEST_SET_SECURITY_DATA 0x12 -#define USB_REQUEST_GET_SECURITY_DATA 0x13 -#define USB_REQUEST_SET_WUSB_DATA 0x14 -#define USB_REQUEST_LOOPBACK_DATA_WRITE 0x15 -#define USB_REQUEST_LOOPBACK_DATA_READ 0x16 -#define USB_REQUEST_SET_INTERFACE_DS 0x17 - -/* USB Standard Feature selectors */ -#define USB_FEATURE_ENDPOINT_HALT 0 -#define USB_FEATURE_SELF_POWERED 0 -#define USB_FEATURE_REMOTE_WAKEUP 1 -#define USB_FEATURE_TEST_MODE 2 -#define USB_FEATURE_BATTERY 2 -#define USB_FEATURE_BHNPENABLE 3 -#define USB_FEATURE_WUSBDEVICE 3 -#define USB_FEATURE_AHNPSUPPORT 4 -#define USB_FEATURE_AALTHNPSUPPORT 5 -#define USB_FEATURE_DEBUGMODE 6 - -/* USB GET_STATUS Bit Values */ -#define USB_GETSTATUS_ENDPOINT_HALT 0x01 -#define USB_GETSTATUS_SELF_POWERED 0x01 -#define USB_GETSTATUS_REMOTE_WAKEUP 0x02 - -/* USB Descriptor Types */ -#define USB_DESCRIPTOR_TYPE_DEVICE 0x01U -#define USB_DESCRIPTOR_TYPE_CONFIGURATION 0x02U -#define USB_DESCRIPTOR_TYPE_STRING 0x03U -#define USB_DESCRIPTOR_TYPE_INTERFACE 0x04U -#define USB_DESCRIPTOR_TYPE_ENDPOINT 0x05U -#define USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER 0x06U -#define USB_DESCRIPTOR_TYPE_OTHER_SPEED 0x07U -#define USB_DESCRIPTOR_TYPE_INTERFACE_POWER 0x08U -#define USB_DESCRIPTOR_TYPE_OTG 0x09U -#define USB_DESCRIPTOR_TYPE_DEBUG 0x0AU -#define USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION 0x0BU -#define USB_DESCRIPTOR_TYPE_BINARY_OBJECT_STORE 0x0FU -#define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY 0x10U -#define USB_DESCRIPTOR_TYPE_WIRELESS_ENDPOINTCOMP 0x11U - -/* Class Specific Descriptor */ -#define USB_CS_DESCRIPTOR_TYPE_DEVICE 0x21U -#define USB_CS_DESCRIPTOR_TYPE_CONFIGURATION 0x22U -#define USB_CS_DESCRIPTOR_TYPE_STRING 0x23U -#define USB_CS_DESCRIPTOR_TYPE_INTERFACE 0x24U -#define USB_CS_DESCRIPTOR_TYPE_ENDPOINT 0x25U - -#define USB_DESCRIPTOR_TYPE_SUPERSPEED_ENDPOINT_COMPANION 0x30U -#define USB_DESCRIPTOR_TYPE_SUPERSPEED_ISO_ENDPOINT_COMPANION 0x31U - -/* USB Device Classes */ -#define USB_DEVICE_CLASS_RESERVED 0x00 -#define USB_DEVICE_CLASS_AUDIO 0x01 -#define USB_DEVICE_CLASS_CDC 0x02 -#define USB_DEVICE_CLASS_HID 0x03 -#define USB_DEVICE_CLASS_MONITOR 0x04 -#define USB_DEVICE_CLASS_PHYSICAL 0x05 -#define USB_DEVICE_CLASS_IMAGE 0x06 -#define USB_DEVICE_CLASS_PRINTER 0x07 -#define USB_DEVICE_CLASS_MASS_STORAGE 0x08 -#define USB_DEVICE_CLASS_HUB 0x09 -#define USB_DEVICE_CLASS_CDC_DATA 0x0a -#define USB_DEVICE_CLASS_SMART_CARD 0x0b -#define USB_DEVICE_CLASS_SECURITY 0x0d -#define USB_DEVICE_CLASS_VIDEO 0x0e -#define USB_DEVICE_CLASS_HEALTHCARE 0x0f -#define USB_DEVICE_CLASS_DIAG_DEVICE 0xdc -#define USB_DEVICE_CLASS_WIRELESS 0xe0 -#define USB_DEVICE_CLASS_MISC 0xef -#define USB_DEVICE_CLASS_APP_SPECIFIC 0xfe -#define USB_DEVICE_CLASS_VEND_SPECIFIC 0xff - -/* usb string index define */ -#define USB_STRING_LANGID_INDEX 0x00 -#define USB_STRING_MFC_INDEX 0x01 -#define USB_STRING_PRODUCT_INDEX 0x02 -#define USB_STRING_SERIAL_INDEX 0x03 -#define USB_STRING_CONFIG_INDEX 0x04 -#define USB_STRING_INTERFACE_INDEX 0x05 -#define USB_STRING_OS_INDEX 0x06 -#define USB_STRING_MAX USB_STRING_OS_INDEX -/* - * Devices supporting Microsoft OS Descriptors store special string - * descriptor at fixed index (0xEE). It is read when a new device is - * attached to a computer for the first time. - */ -#define USB_OSDESC_STRING_DESC_INDEX 0xEE - -/* bmAttributes in Configuration Descriptor */ -#define USB_CONFIG_REMOTE_WAKEUP 0x20 -#define USB_CONFIG_POWERED_MASK 0x40 -#define USB_CONFIG_BUS_POWERED 0x80 -#define USB_CONFIG_SELF_POWERED 0xC0 - -/* bMaxPower in Configuration Descriptor */ -#define USB_CONFIG_POWER_MA(mA) ((mA) / 2) - -/* bEndpointAddress in Endpoint Descriptor */ -#define USB_ENDPOINT_DIRECTION_MASK 0x80 -#define USB_ENDPOINT_OUT(addr) ((addr) | 0x00) -#define USB_ENDPOINT_IN(addr) ((addr) | 0x80) - -/** - * USB endpoint direction and number. - */ -#define USB_EP_DIR_MASK 0x80U -#define USB_EP_DIR_IN 0x80U -#define USB_EP_DIR_OUT 0x00U - -/** Get endpoint index (number) from endpoint address */ -#define USB_EP_GET_IDX(ep) ((ep) & ~USB_EP_DIR_MASK) -/** Get direction from endpoint address */ -#define USB_EP_GET_DIR(ep) ((ep)&USB_EP_DIR_MASK) -/** Get endpoint address from endpoint index and direction */ -#define USB_EP_GET_ADDR(idx, dir) ((idx) | ((dir)&USB_EP_DIR_MASK)) -/** True if the endpoint is an IN endpoint */ -#define USB_EP_DIR_IS_IN(ep) (USB_EP_GET_DIR(ep) == USB_EP_DIR_IN) -/** True if the endpoint is an OUT endpoint */ -#define USB_EP_DIR_IS_OUT(ep) (USB_EP_GET_DIR(ep) == USB_EP_DIR_OUT) - -/* bmAttributes in Endpoint Descriptor */ -#define USB_ENDPOINT_TYPE_SHIFT 0 -#define USB_ENDPOINT_TYPE_CONTROL (0 << USB_ENDPOINT_TYPE_SHIFT) -#define USB_ENDPOINT_TYPE_ISOCHRONOUS (1 << USB_ENDPOINT_TYPE_SHIFT) -#define USB_ENDPOINT_TYPE_BULK (2 << USB_ENDPOINT_TYPE_SHIFT) -#define USB_ENDPOINT_TYPE_INTERRUPT (3 << USB_ENDPOINT_TYPE_SHIFT) -#define USB_ENDPOINT_TYPE_MASK (3 << USB_ENDPOINT_TYPE_SHIFT) -#define USB_GET_ENDPOINT_TYPE(x) ((x & USB_ENDPOINT_TYPE_MASK) >> USB_ENDPOINT_TYPE_SHIFT) - -#define USB_ENDPOINT_SYNC_SHIFT 2 -#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION (0 << USB_ENDPOINT_SYNC_SHIFT) -#define USB_ENDPOINT_SYNC_ASYNCHRONOUS (1 << USB_ENDPOINT_SYNC_SHIFT) -#define USB_ENDPOINT_SYNC_ADAPTIVE (2 << USB_ENDPOINT_SYNC_SHIFT) -#define USB_ENDPOINT_SYNC_SYNCHRONOUS (3 << USB_ENDPOINT_SYNC_SHIFT) -#define USB_ENDPOINT_SYNC_MASK (3 << USB_ENDPOINT_SYNC_SHIFT) - -#define USB_ENDPOINT_USAGE_SHIFT 4 -#define USB_ENDPOINT_USAGE_DATA (0 << USB_ENDPOINT_USAGE_SHIFT) -#define USB_ENDPOINT_USAGE_FEEDBACK (1 << USB_ENDPOINT_USAGE_SHIFT) -#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK (2 << USB_ENDPOINT_USAGE_SHIFT) -#define USB_ENDPOINT_USAGE_MASK (3 << USB_ENDPOINT_USAGE_SHIFT) - -#define USB_ENDPOINT_MAX_ADJUSTABLE (1 << 7) - -/* wMaxPacketSize in Endpoint Descriptor */ -#define USB_MAXPACKETSIZE_SHIFT 0 -#define USB_MAXPACKETSIZE_MASK (0x7ff << USB_MAXPACKETSIZE_SHIFT) -#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT 11 -#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_NONE (0 << USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) -#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_ONE (1 << USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) -#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_TWO (2 << USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) -#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_MASK (3 << USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) -#define USB_GET_MAXPACKETSIZE(x) ((x & USB_MAXPACKETSIZE_MASK) >> USB_MAXPACKETSIZE_SHIFT) -#define USB_GET_MULT(x) ((x & USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_MASK) >> USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) - -/* bDevCapabilityType in Device Capability Descriptor */ -#define USB_DEVICE_CAPABILITY_WIRELESS_USB 1 -#define USB_DEVICE_CAPABILITY_USB_2_0_EXTENSION 2 -#define USB_DEVICE_CAPABILITY_SUPERSPEED_USB 3 -#define USB_DEVICE_CAPABILITY_CONTAINER_ID 4 -#define USB_DEVICE_CAPABILITY_PLATFORM 5 -#define USB_DEVICE_CAPABILITY_POWER_DELIVERY_CAPABILITY 6 -#define USB_DEVICE_CAPABILITY_BATTERY_INFO_CAPABILITY 7 -#define USB_DEVICE_CAPABILITY_PD_CONSUMER_PORT_CAPABILITY 8 -#define USB_DEVICE_CAPABILITY_PD_PROVIDER_PORT_CAPABILITY 9 -#define USB_DEVICE_CAPABILITY_SUPERSPEED_PLUS 10 -#define USB_DEVICE_CAPABILITY_PRECISION_TIME_MEASUREMENT 11 -#define USB_DEVICE_CAPABILITY_WIRELESS_USB_EXT 12 - -#define USB_BOS_CAPABILITY_EXTENSION 0x02 -#define USB_BOS_CAPABILITY_PLATFORM 0x05 - -/* OTG SET FEATURE Constants */ -#define USB_OTG_FEATURE_B_HNP_ENABLE 3 /* Enable B device to perform HNP */ -#define USB_OTG_FEATURE_A_HNP_SUPPORT 4 /* A device supports HNP */ -#define USB_OTG_FEATURE_A_ALT_HNP_SUPPORT 5 /* Another port on the A device supports HNP */ - -/* WinUSB Microsoft OS 2.0 descriptor request codes */ -#define WINUSB_REQUEST_GET_DESCRIPTOR_SET 0x07 -#define WINUSB_REQUEST_SET_ALT_ENUM 0x08 - -/* WinUSB Microsoft OS 2.0 descriptor sizes */ -#define WINUSB_DESCRIPTOR_SET_HEADER_SIZE 10 -#define WINUSB_FUNCTION_SUBSET_HEADER_SIZE 8 -#define WINUSB_FEATURE_COMPATIBLE_ID_SIZE 20 - -/* WinUSB Microsoft OS 2.0 Descriptor Types */ -#define WINUSB_SET_HEADER_DESCRIPTOR_TYPE 0x00 -#define WINUSB_SUBSET_HEADER_CONFIGURATION_TYPE 0x01 -#define WINUSB_SUBSET_HEADER_FUNCTION_TYPE 0x02 -#define WINUSB_FEATURE_COMPATIBLE_ID_TYPE 0x03 -#define WINUSB_FEATURE_REG_PROPERTY_TYPE 0x04 -#define WINUSB_FEATURE_MIN_RESUME_TIME_TYPE 0x05 -#define WINUSB_FEATURE_MODEL_ID_TYPE 0x06 -#define WINUSB_FEATURE_CCGP_DEVICE_TYPE 0x07 - -#define WINUSB_PROP_DATA_TYPE_REG_SZ 0x01 -#define WINUSB_PROP_DATA_TYPE_REG_MULTI_SZ 0x07 - -/* WebUSB Descriptor Types */ -#define WEBUSB_DESCRIPTOR_SET_HEADER_TYPE 0x00 -#define WEBUSB_CONFIGURATION_SUBSET_HEADER_TYPE 0x01 -#define WEBUSB_FUNCTION_SUBSET_HEADER_TYPE 0x02 -#define WEBUSB_URL_TYPE 0x03 - -/* WebUSB Request Codes */ -#define WEBUSB_REQUEST_GET_URL 0x02 - -/* bScheme in URL descriptor */ -#define WEBUSB_URL_SCHEME_HTTP 0x00 -#define WEBUSB_URL_SCHEME_HTTPS 0x01 - -/* WebUSB Descriptor sizes */ -#define WEBUSB_DESCRIPTOR_SET_HEADER_SIZE 5 -#define WEBUSB_CONFIGURATION_SUBSET_HEADER_SIZE 4 -#define WEBUSB_FUNCTION_SUBSET_HEADER_SIZE 3 - -/* Setup packet definition used to read raw data from USB line */ -struct usb_setup_packet { - /** Request type. Bits 0:4 determine recipient, see - * \ref usb_request_recipient. Bits 5:6 determine type, see - * \ref usb_request_type. Bit 7 determines data transfer direction, see - * \ref usb_endpoint_direction. - */ - uint8_t bmRequestType; - - /** Request. If the type bits of bmRequestType are equal to - * \ref usb_request_type::LIBUSB_REQUEST_TYPE_STANDARD - * "USB_REQUEST_TYPE_STANDARD" then this field refers to - * \ref usb_standard_request. For other cases, use of this field is - * application-specific. */ - uint8_t bRequest; - - /** Value. Varies according to request */ - uint16_t wValue; - - /** Index. Varies according to request, typically used to pass an index - * or offset */ - uint16_t wIndex; - - /** Number of bytes to transfer */ - uint16_t wLength; -} __PACKED; - -#define USB_SIZEOF_SETUP_PACKET 8 - -/** Standard Device Descriptor */ -struct usb_device_descriptor { - uint8_t bLength; /* Descriptor size in bytes = 18 */ - uint8_t bDescriptorType; /* DEVICE descriptor type = 1 */ - uint16_t bcdUSB; /* USB spec in BCD, e.g. 0x0200 */ - uint8_t bDeviceClass; /* Class code, if 0 see interface */ - uint8_t bDeviceSubClass; /* Sub-Class code, 0 if class = 0 */ - uint8_t bDeviceProtocol; /* Protocol, if 0 see interface */ - uint8_t bMaxPacketSize0; /* Endpoint 0 max. size */ - uint16_t idVendor; /* Vendor ID per USB-IF */ - uint16_t idProduct; /* Product ID per manufacturer */ - uint16_t bcdDevice; /* Device release # in BCD */ - uint8_t iManufacturer; /* Index to manufacturer string */ - uint8_t iProduct; /* Index to product string */ - uint8_t iSerialNumber; /* Index to serial number string */ - uint8_t bNumConfigurations; /* Number of possible configurations */ -} __PACKED; - -#define USB_SIZEOF_DEVICE_DESC 18 - -/** Standard Configuration Descriptor */ -struct usb_configuration_descriptor { - uint8_t bLength; /* Descriptor size in bytes = 9 */ - uint8_t bDescriptorType; /* CONFIGURATION type = 2 or 7 */ - uint16_t wTotalLength; /* Length of concatenated descriptors */ - uint8_t bNumInterfaces; /* Number of interfaces, this config. */ - uint8_t bConfigurationValue; /* Value to set this config. */ - uint8_t iConfiguration; /* Index to configuration string */ - uint8_t bmAttributes; /* Config. characteristics */ - uint8_t bMaxPower; /* Max.power from bus, 2mA units */ -} __PACKED; - -#define USB_SIZEOF_CONFIG_DESC 9 - -/** Standard Interface Descriptor */ -struct usb_interface_descriptor { - uint8_t bLength; /* Descriptor size in bytes = 9 */ - uint8_t bDescriptorType; /* INTERFACE descriptor type = 4 */ - uint8_t bInterfaceNumber; /* Interface no.*/ - uint8_t bAlternateSetting; /* Value to select this IF */ - uint8_t bNumEndpoints; /* Number of endpoints excluding 0 */ - uint8_t bInterfaceClass; /* Class code, 0xFF = vendor */ - uint8_t bInterfaceSubClass; /* Sub-Class code, 0 if class = 0 */ - uint8_t bInterfaceProtocol; /* Protocol, 0xFF = vendor */ - uint8_t iInterface; /* Index to interface string */ -} __PACKED; - -#define USB_SIZEOF_INTERFACE_DESC 9 - -/** Standard Endpoint Descriptor */ -struct usb_endpoint_descriptor { - uint8_t bLength; /* Descriptor size in bytes = 7 */ - uint8_t bDescriptorType; /* ENDPOINT descriptor type = 5 */ - uint8_t bEndpointAddress; /* Endpoint # 0 - 15 | IN/OUT */ - uint8_t bmAttributes; /* Transfer type */ - uint16_t wMaxPacketSize; /* Bits 10:0 = max. packet size */ - uint8_t bInterval; /* Polling interval in (micro) frames */ -} __PACKED; - -#define USB_SIZEOF_ENDPOINT_DESC 7 - -/** Unicode (UTF16LE) String Descriptor */ -struct usb_string_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bString; -} __PACKED; - -#define USB_SIZEOF_STRING_LANGID_DESC 4 - -/* USB Interface Association Descriptor */ -struct usb_interface_association_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bFirstInterface; - uint8_t bInterfaceCount; - uint8_t bFunctionClass; - uint8_t bFunctionSubClass; - uint8_t bFunctionProtocol; - uint8_t iFunction; -} __PACKED; - -#define USB_SIZEOF_IAD_DESC 8 - -/** USB device_qualifier descriptor */ -struct usb_device_qualifier_descriptor { - uint8_t bLength; /* Descriptor size in bytes = 10 */ - uint8_t bDescriptorType; /* DEVICE QUALIFIER type = 6 */ - uint16_t bcdUSB; /* USB spec in BCD, e.g. 0x0200 */ - uint8_t bDeviceClass; /* Class code, if 0 see interface */ - uint8_t bDeviceSubClass; /* Sub-Class code, 0 if class = 0 */ - uint8_t bDeviceProtocol; /* Protocol, if 0 see interface */ - uint8_t bMaxPacketSize; /* Endpoint 0 max. size */ - uint8_t bNumConfigurations; /* Number of possible configurations */ - uint8_t bReserved; /* Reserved = 0 */ -} __PACKED; - -#define USB_SIZEOF_DEVICE_QUALIFIER_DESC 10 - -/* Microsoft OS function descriptor. - * This can be used to request a specific driver (such as WINUSB) to be - * loaded on Windows. Unlike other descriptors, it is requested by a special - * request USB_REQ_GETMSFTOSDESCRIPTOR. - * More details: - * https://msdn.microsoft.com/en-us/windows/hardware/gg463179 - * And excellent explanation: - * https://github.com/pbatard/libwdi/wiki/WCID-Devices - * - * The device will have exactly one "Extended Compat ID Feature Descriptor", - * which may contain multiple "Function Descriptors" associated with - * different interfaces. - */ - -/* MS OS 1.0 string descriptor */ -struct usb_msosv1_string_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bString[14]; - uint8_t bMS_VendorCode; /* Vendor Code, used for a control request */ - uint8_t bPad; /* Padding byte for VendorCode look as UTF16 */ -} __PACKED; - -/* MS OS 1.0 Header descriptor */ -struct usb_msosv1_compat_id_header_descriptor { - uint32_t dwLength; - uint16_t bcdVersion; - uint16_t wIndex; - uint8_t bCount; - uint8_t reserved[7]; -} __PACKED; - -/* MS OS 1.0 Function descriptor */ -struct usb_msosv1_comp_id_function_descriptor { - uint8_t bFirstInterfaceNumber; - uint8_t reserved1; - uint8_t compatibleID[8]; - uint8_t subCompatibleID[8]; - uint8_t reserved2[6]; -} __PACKED; - -#define usb_msosv1_comp_id_create(x) \ - struct usb_msosv1_comp_id { \ - struct usb_msosv1_compat_id_header_descriptor compat_id_header; \ - struct usb_msosv1_comp_id_function_descriptor compat_id_function[x]; \ - }; - -struct usb_msosv1_descriptor { - const uint8_t *string; - uint8_t vendor_code; - const uint8_t *compat_id; - const uint8_t **comp_id_property; -}; - -/* MS OS 2.0 Header descriptor */ -struct usb_msosv2_header_descriptor { - uint32_t dwLength; - uint16_t bcdVersion; - uint16_t wIndex; - uint8_t bCount; -} __PACKED; - -/*Microsoft OS 2.0 set header descriptor*/ -struct usb_msosv2_set_header_descriptor { - uint16_t wLength; - uint16_t wDescriptorType; - uint32_t dwWindowsVersion; - uint16_t wDescriptorSetTotalLength; -} __PACKED; - -/* Microsoft OS 2.0 compatibleID descriptor*/ -struct usb_msosv2_comp_id_descriptor { - uint16_t wLength; - uint16_t wDescriptorType; - uint8_t compatibleID[8]; - uint8_t subCompatibleID[8]; -} __PACKED; - -/* MS OS 2.0 property descriptor */ -struct usb_msosv2_property_descriptor { - uint16_t wLength; - uint16_t wDescriptorType; - uint32_t dwPropertyDataType; - uint16_t wPropertyNameLength; - const char *bPropertyName; - uint32_t dwPropertyDataLength; - const char *bPropertyData; -}; - -/* Microsoft OS 2.0 subset function descriptor */ -struct usb_msosv2_subset_function_descriptor { - uint16_t wLength; - uint16_t wDescriptorType; - uint8_t bFirstInterface; - uint8_t bReserved; - uint16_t wSubsetLength; -} __PACKED; - -struct usb_msosv2_descriptor { - uint8_t *compat_id; - uint16_t compat_id_len; - uint8_t vendor_code; -}; - -/* BOS header Descriptor */ -struct usb_bos_header_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wTotalLength; - uint8_t bNumDeviceCaps; -} __PACKED; - -/* BOS Capability platform Descriptor */ -struct usb_bos_capability_platform_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDevCapabilityType; - uint8_t bReserved; - uint8_t PlatformCapabilityUUID[16]; -} __PACKED; - -/* BOS Capability MS OS Descriptors version 2 */ -struct usb_bos_capability_msosv2_descriptor { - uint32_t dwWindowsVersion; - uint16_t wMSOSDescriptorSetTotalLength; - uint8_t bVendorCode; - uint8_t bAltEnumCode; -} __PACKED; - -/* BOS Capability webusb */ -struct usb_bos_capability_webusb_descriptor { - uint16_t bcdVersion; - uint8_t bVendorCode; - uint8_t iLandingPage; -} __PACKED; - -/* BOS Capability extension Descriptor*/ -struct usb_bos_capability_extension_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDevCapabilityType; - uint32_t bmAttributes; -} __PACKED; - -/* Microsoft OS 2.0 Platform Capability Descriptor -* See https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/ -* microsoft-defined-usb-descriptors -* Adapted from the source: -* https://github.com/sowbug/weblight/blob/master/firmware/webusb.c -* (BSD-2) Thanks http://janaxelson.com/files/ms_os_20_descriptors.c -*/ -struct usb_bos_capability_platform_msosv2_descriptor { - struct usb_bos_capability_platform_descriptor platform_msos; - struct usb_bos_capability_msosv2_descriptor data_msosv2; -} __PACKED; - -/* WebUSB Platform Capability Descriptor: -* https://wicg.github.io/webusb/#webusb-platform-capability-descriptor -*/ -struct usb_bos_capability_platform_webusb_descriptor { - struct usb_bos_capability_platform_descriptor platform_webusb; - struct usb_bos_capability_webusb_descriptor data_webusb; -} __PACKED; - -struct usb_webusb_url_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bScheme; - char URL[]; -} __PACKED; - -struct usb_webusb_url_ex_descriptor { - uint8_t vendor_code; - uint8_t *string; - uint32_t string_len; -} __PACKED; - -struct usb_bos_descriptor { - uint8_t *string; - uint32_t string_len; -}; - -/* USB Device Capability Descriptor */ -struct usb_device_capability_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDevCapabilityType; -} __PACKED; - -/** USB descriptor header */ -struct usb_desc_header { - uint8_t bLength; /**< descriptor length */ - uint8_t bDescriptorType; /**< descriptor type */ -}; -// clang-format off -#define USB_DEVICE_DESCRIPTOR_INIT(bcdUSB, bDeviceClass, bDeviceSubClass, bDeviceProtocol, idVendor, idProduct, bcdDevice, bNumConfigurations) \ - 0x12, /* bLength */ \ - USB_DESCRIPTOR_TYPE_DEVICE, /* bDescriptorType */ \ - WBVAL(bcdUSB), /* bcdUSB */ \ - bDeviceClass, /* bDeviceClass */ \ - bDeviceSubClass, /* bDeviceSubClass */ \ - bDeviceProtocol, /* bDeviceProtocol */ \ - 0x40, /* bMaxPacketSize */ \ - WBVAL(idVendor), /* idVendor */ \ - WBVAL(idProduct), /* idProduct */ \ - WBVAL(bcdDevice), /* bcdDevice */ \ - USB_STRING_MFC_INDEX, /* iManufacturer */ \ - USB_STRING_PRODUCT_INDEX, /* iProduct */ \ - USB_STRING_SERIAL_INDEX, /* iSerial */ \ - bNumConfigurations /* bNumConfigurations */ - -#define USB_CONFIG_DESCRIPTOR_INIT(wTotalLength, bNumInterfaces, bConfigurationValue, bmAttributes, bMaxPower) \ - 0x09, /* bLength */ \ - USB_DESCRIPTOR_TYPE_CONFIGURATION, /* bDescriptorType */ \ - WBVAL(wTotalLength), /* wTotalLength */ \ - bNumInterfaces, /* bNumInterfaces */ \ - bConfigurationValue, /* bConfigurationValue */ \ - 0x00, /* iConfiguration */ \ - bmAttributes, /* bmAttributes */ \ - USB_CONFIG_POWER_MA(bMaxPower) /* bMaxPower */ - -#define USB_INTERFACE_DESCRIPTOR_INIT(bInterfaceNumber, bAlternateSetting, bNumEndpoints, \ - bInterfaceClass, bInterfaceSubClass, bInterfaceProtocol, iInterface) \ - 0x09, /* bLength */ \ - USB_DESCRIPTOR_TYPE_INTERFACE, /* bDescriptorType */ \ - bInterfaceNumber, /* bInterfaceNumber */ \ - bAlternateSetting, /* bAlternateSetting */ \ - bNumEndpoints, /* bNumEndpoints */ \ - bInterfaceClass, /* bInterfaceClass */ \ - bInterfaceSubClass, /* bInterfaceSubClass */ \ - bInterfaceProtocol, /* bInterfaceProtocol */ \ - iInterface /* iInterface */ - -#define USB_ENDPOINT_DESCRIPTOR_INIT(bEndpointAddress, bmAttributes, wMaxPacketSize, bInterval) \ - 0x07, /* bLength */ \ - USB_DESCRIPTOR_TYPE_ENDPOINT, /* bDescriptorType */ \ - bEndpointAddress, /* bEndpointAddress */ \ - bmAttributes, /* bmAttributes */ \ - WBVAL(wMaxPacketSize), /* wMaxPacketSize */ \ - bInterval /* bInterval */ - -#define USB_IAD_INIT(bFirstInterface, bInterfaceCount, bFunctionClass, bFunctionSubClass, bFunctionProtocol) \ - 0x08, /* bLength */ \ - USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION, /* bDescriptorType */ \ - bFirstInterface, /* bFirstInterface */ \ - bInterfaceCount, /* bInterfaceCount */ \ - bFunctionClass, /* bFunctionClass */ \ - bFunctionSubClass, /* bFunctionSubClass */ \ - bFunctionProtocol, /* bFunctionProtocol */ \ - 0x00 /* iFunction */ - -#define USB_LANGID_INIT(id) \ - 0x04, /* bLength */ \ - USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */ \ - WBVAL(id) /* wLangID0 */ -// clang-format on - -#endif /* USB_DEF_H */ +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_DEF_H +#define USB_DEF_H + +/* Useful define */ +#define USB_1_1 0x0110 +#define USB_2_0 0x0200 +/* Set USB version to 2.1 so that the host will request the BOS descriptor */ +#define USB_2_1 0x0210 +#define USB_3_0 0x0300 +#define USB_3_1 0x0310 +#define USB_3_2 0x0320 + +/* Device speeds */ +#define USB_SPEED_UNKNOWN 0 /* Transfer rate not yet set */ +#define USB_SPEED_LOW 1 /* USB 1.1 */ +#define USB_SPEED_FULL 2 /* USB 1.1 */ +#define USB_SPEED_HIGH 3 /* USB 2.0 */ +#define USB_SPEED_WIRELESS 4 /* Wireless USB 2.5 */ +#define USB_SPEED_SUPER 5 /* USB 3.0 */ +#define USB_SPEED_SUPER_PLUS 6 /* USB 3.1 */ + +/* Maximum number of devices per controller */ +#define USB_MAX_DEVICES (127) + +/* Default USB control EP, always 0 and 0x80 */ +#define USB_CONTROL_OUT_EP0 0 +#define USB_CONTROL_IN_EP0 0x80 + +/**< maximum packet size (MPS) for EP 0 */ +#define USB_CTRL_EP_MPS 64 + +/**< maximum packet size (MPS) for bulk EP */ +#define USB_BULK_EP_MPS_HS 512 +#define USB_BULK_EP_MPS_FS 64 + +/* USB PID Types */ +#define USB_PID_OUT (0x01) /* Tokens */ +#define USB_PID_IN (0x09) +#define USB_PID_SOF (0x05) +#define USB_PID_SETUP (0x0d) + +#define USB_PID_DATA0 (0x03) /* Data */ +#define USB_PID_DATA1 (0x0b) +#define USB_PID_DATA2 (0x07) +#define USB_PID_MDATA (0x0f) + +#define USB_PID_ACK (0x02) /* Handshake */ +#define USB_PID_NAK (0x0a) +#define USB_PID_STALL (0x0e) +#define USB_PID_NYET (0x06) + +#define USB_PID_PRE (0x0c) /* Special */ +#define USB_PID_ERR (0x0c) +#define USB_PID_SPLIT (0x08) +#define USB_PID_PING (0x04) +#define USB_PID_RESERVED (0x00) + +#define USB_REQUEST_DIR_SHIFT 7U /* Bits 7: Request dir */ +#define USB_REQUEST_DIR_OUT (0U << USB_REQUEST_DIR_SHIFT) /* Bit 7=0: Host-to-device */ +#define USB_REQUEST_DIR_IN (1U << USB_REQUEST_DIR_SHIFT) /* Bit 7=1: Device-to-host */ +#define USB_REQUEST_DIR_MASK (1U << USB_REQUEST_DIR_SHIFT) /* Bit 7=1: Direction bit */ + +#define USB_REQUEST_TYPE_SHIFT 5U /* Bits 5:6: Request type */ +#define USB_REQUEST_STANDARD (0U << USB_REQUEST_TYPE_SHIFT) +#define USB_REQUEST_CLASS (1U << USB_REQUEST_TYPE_SHIFT) +#define USB_REQUEST_VENDOR (2U << USB_REQUEST_TYPE_SHIFT) +#define USB_REQUEST_RESERVED (3U << USB_REQUEST_TYPE_SHIFT) +#define USB_REQUEST_TYPE_MASK (3U << USB_REQUEST_TYPE_SHIFT) + +#define USB_REQUEST_RECIPIENT_SHIFT 0U /* Bits 0:4: Recipient */ +#define USB_REQUEST_RECIPIENT_DEVICE (0U << USB_REQUEST_RECIPIENT_SHIFT) +#define USB_REQUEST_RECIPIENT_INTERFACE (1U << USB_REQUEST_RECIPIENT_SHIFT) +#define USB_REQUEST_RECIPIENT_ENDPOINT (2U << USB_REQUEST_RECIPIENT_SHIFT) +#define USB_REQUEST_RECIPIENT_OTHER (3U << USB_REQUEST_RECIPIENT_SHIFT) +#define USB_REQUEST_RECIPIENT_MASK (3U << USB_REQUEST_RECIPIENT_SHIFT) + +/* USB Standard Request Codes */ +#define USB_REQUEST_GET_STATUS 0x00 +#define USB_REQUEST_CLEAR_FEATURE 0x01 +#define USB_REQUEST_SET_FEATURE 0x03 +#define USB_REQUEST_SET_ADDRESS 0x05 +#define USB_REQUEST_GET_DESCRIPTOR 0x06 +#define USB_REQUEST_SET_DESCRIPTOR 0x07 +#define USB_REQUEST_GET_CONFIGURATION 0x08 +#define USB_REQUEST_SET_CONFIGURATION 0x09 +#define USB_REQUEST_GET_INTERFACE 0x0A +#define USB_REQUEST_SET_INTERFACE 0x0B +#define USB_REQUEST_SYNCH_FRAME 0x0C +#define USB_REQUEST_SET_ENCRYPTION 0x0D +#define USB_REQUEST_GET_ENCRYPTION 0x0E +#define USB_REQUEST_RPIPE_ABORT 0x0E +#define USB_REQUEST_SET_HANDSHAKE 0x0F +#define USB_REQUEST_RPIPE_RESET 0x0F +#define USB_REQUEST_GET_HANDSHAKE 0x10 +#define USB_REQUEST_SET_CONNECTION 0x11 +#define USB_REQUEST_SET_SECURITY_DATA 0x12 +#define USB_REQUEST_GET_SECURITY_DATA 0x13 +#define USB_REQUEST_SET_WUSB_DATA 0x14 +#define USB_REQUEST_LOOPBACK_DATA_WRITE 0x15 +#define USB_REQUEST_LOOPBACK_DATA_READ 0x16 +#define USB_REQUEST_SET_INTERFACE_DS 0x17 + +/* USB Standard Feature selectors */ +#define USB_FEATURE_ENDPOINT_HALT 0 +#define USB_FEATURE_SELF_POWERED 0 +#define USB_FEATURE_REMOTE_WAKEUP 1 +#define USB_FEATURE_TEST_MODE 2 +#define USB_FEATURE_BATTERY 2 +#define USB_FEATURE_BHNPENABLE 3 +#define USB_FEATURE_WUSBDEVICE 3 +#define USB_FEATURE_AHNPSUPPORT 4 +#define USB_FEATURE_AALTHNPSUPPORT 5 +#define USB_FEATURE_DEBUGMODE 6 + +/* USB GET_STATUS Bit Values */ +#define USB_GETSTATUS_ENDPOINT_HALT 0x01 +#define USB_GETSTATUS_SELF_POWERED 0x01 +#define USB_GETSTATUS_REMOTE_WAKEUP 0x02 + +/* USB Descriptor Types */ +#define USB_DESCRIPTOR_TYPE_DEVICE 0x01U +#define USB_DESCRIPTOR_TYPE_CONFIGURATION 0x02U +#define USB_DESCRIPTOR_TYPE_STRING 0x03U +#define USB_DESCRIPTOR_TYPE_INTERFACE 0x04U +#define USB_DESCRIPTOR_TYPE_ENDPOINT 0x05U +#define USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER 0x06U +#define USB_DESCRIPTOR_TYPE_OTHER_SPEED 0x07U +#define USB_DESCRIPTOR_TYPE_INTERFACE_POWER 0x08U +#define USB_DESCRIPTOR_TYPE_OTG 0x09U +#define USB_DESCRIPTOR_TYPE_DEBUG 0x0AU +#define USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION 0x0BU +#define USB_DESCRIPTOR_TYPE_BINARY_OBJECT_STORE 0x0FU +#define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY 0x10U +#define USB_DESCRIPTOR_TYPE_WIRELESS_ENDPOINTCOMP 0x11U + +/* Class Specific Descriptor */ +#define USB_CS_DESCRIPTOR_TYPE_DEVICE 0x21U +#define USB_CS_DESCRIPTOR_TYPE_CONFIGURATION 0x22U +#define USB_CS_DESCRIPTOR_TYPE_STRING 0x23U +#define USB_CS_DESCRIPTOR_TYPE_INTERFACE 0x24U +#define USB_CS_DESCRIPTOR_TYPE_ENDPOINT 0x25U + +#define USB_DESCRIPTOR_TYPE_SUPERSPEED_ENDPOINT_COMPANION 0x30U +#define USB_DESCRIPTOR_TYPE_SUPERSPEED_ISO_ENDPOINT_COMPANION 0x31U + +/* USB Device Classes */ +#define USB_DEVICE_CLASS_RESERVED 0x00 +#define USB_DEVICE_CLASS_AUDIO 0x01 +#define USB_DEVICE_CLASS_CDC 0x02 +#define USB_DEVICE_CLASS_HID 0x03 +#define USB_DEVICE_CLASS_MONITOR 0x04 +#define USB_DEVICE_CLASS_PHYSICAL 0x05 +#define USB_DEVICE_CLASS_IMAGE 0x06 +#define USB_DEVICE_CLASS_PRINTER 0x07 +#define USB_DEVICE_CLASS_MASS_STORAGE 0x08 +#define USB_DEVICE_CLASS_HUB 0x09 +#define USB_DEVICE_CLASS_CDC_DATA 0x0a +#define USB_DEVICE_CLASS_SMART_CARD 0x0b +#define USB_DEVICE_CLASS_SECURITY 0x0d +#define USB_DEVICE_CLASS_VIDEO 0x0e +#define USB_DEVICE_CLASS_HEALTHCARE 0x0f +#define USB_DEVICE_CLASS_DIAG_DEVICE 0xdc +#define USB_DEVICE_CLASS_WIRELESS 0xe0 +#define USB_DEVICE_CLASS_MISC 0xef +#define USB_DEVICE_CLASS_APP_SPECIFIC 0xfe +#define USB_DEVICE_CLASS_VEND_SPECIFIC 0xff + +/* usb string index define */ +#define USB_STRING_LANGID_INDEX 0x00 +#define USB_STRING_MFC_INDEX 0x01 +#define USB_STRING_PRODUCT_INDEX 0x02 +#define USB_STRING_SERIAL_INDEX 0x03 +#define USB_STRING_CONFIG_INDEX 0x04 +#define USB_STRING_INTERFACE_INDEX 0x05 +#define USB_STRING_OS_INDEX 0x06 +#define USB_STRING_MAX USB_STRING_OS_INDEX +/* + * Devices supporting Microsoft OS Descriptors store special string + * descriptor at fixed index (0xEE). It is read when a new device is + * attached to a computer for the first time. + */ +#define USB_OSDESC_STRING_DESC_INDEX 0xEE + +/* bmAttributes in Configuration Descriptor */ +#define USB_CONFIG_REMOTE_WAKEUP 0x20 +#define USB_CONFIG_POWERED_MASK 0x40 +#define USB_CONFIG_BUS_POWERED 0x80 +#define USB_CONFIG_SELF_POWERED 0xC0 + +/* bMaxPower in Configuration Descriptor */ +#define USB_CONFIG_POWER_MA(mA) ((mA) / 2) + +/* bEndpointAddress in Endpoint Descriptor */ +#define USB_ENDPOINT_DIRECTION_MASK 0x80 +#define USB_ENDPOINT_OUT(addr) ((addr) | 0x00) +#define USB_ENDPOINT_IN(addr) ((addr) | 0x80) + +/** + * USB endpoint direction and number. + */ +#define USB_EP_DIR_MASK 0x80U +#define USB_EP_DIR_IN 0x80U +#define USB_EP_DIR_OUT 0x00U + +/** Get endpoint index (number) from endpoint address */ +#define USB_EP_GET_IDX(ep) ((ep) & ~USB_EP_DIR_MASK) +/** Get direction from endpoint address */ +#define USB_EP_GET_DIR(ep) ((ep)&USB_EP_DIR_MASK) +/** Get endpoint address from endpoint index and direction */ +#define USB_EP_GET_ADDR(idx, dir) ((idx) | ((dir)&USB_EP_DIR_MASK)) +/** True if the endpoint is an IN endpoint */ +#define USB_EP_DIR_IS_IN(ep) (USB_EP_GET_DIR(ep) == USB_EP_DIR_IN) +/** True if the endpoint is an OUT endpoint */ +#define USB_EP_DIR_IS_OUT(ep) (USB_EP_GET_DIR(ep) == USB_EP_DIR_OUT) + +/* bmAttributes in Endpoint Descriptor */ +#define USB_ENDPOINT_TYPE_SHIFT 0 +#define USB_ENDPOINT_TYPE_CONTROL (0 << USB_ENDPOINT_TYPE_SHIFT) +#define USB_ENDPOINT_TYPE_ISOCHRONOUS (1 << USB_ENDPOINT_TYPE_SHIFT) +#define USB_ENDPOINT_TYPE_BULK (2 << USB_ENDPOINT_TYPE_SHIFT) +#define USB_ENDPOINT_TYPE_INTERRUPT (3 << USB_ENDPOINT_TYPE_SHIFT) +#define USB_ENDPOINT_TYPE_MASK (3 << USB_ENDPOINT_TYPE_SHIFT) +#define USB_GET_ENDPOINT_TYPE(x) ((x & USB_ENDPOINT_TYPE_MASK) >> USB_ENDPOINT_TYPE_SHIFT) + +#define USB_ENDPOINT_SYNC_SHIFT 2 +#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION (0 << USB_ENDPOINT_SYNC_SHIFT) +#define USB_ENDPOINT_SYNC_ASYNCHRONOUS (1 << USB_ENDPOINT_SYNC_SHIFT) +#define USB_ENDPOINT_SYNC_ADAPTIVE (2 << USB_ENDPOINT_SYNC_SHIFT) +#define USB_ENDPOINT_SYNC_SYNCHRONOUS (3 << USB_ENDPOINT_SYNC_SHIFT) +#define USB_ENDPOINT_SYNC_MASK (3 << USB_ENDPOINT_SYNC_SHIFT) + +#define USB_ENDPOINT_USAGE_SHIFT 4 +#define USB_ENDPOINT_USAGE_DATA (0 << USB_ENDPOINT_USAGE_SHIFT) +#define USB_ENDPOINT_USAGE_FEEDBACK (1 << USB_ENDPOINT_USAGE_SHIFT) +#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK (2 << USB_ENDPOINT_USAGE_SHIFT) +#define USB_ENDPOINT_USAGE_MASK (3 << USB_ENDPOINT_USAGE_SHIFT) + +#define USB_ENDPOINT_MAX_ADJUSTABLE (1 << 7) + +/* wMaxPacketSize in Endpoint Descriptor */ +#define USB_MAXPACKETSIZE_SHIFT 0 +#define USB_MAXPACKETSIZE_MASK (0x7ff << USB_MAXPACKETSIZE_SHIFT) +#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT 11 +#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_NONE (0 << USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) +#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_ONE (1 << USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) +#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_TWO (2 << USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) +#define USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_MASK (3 << USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) +#define USB_GET_MAXPACKETSIZE(x) ((x & USB_MAXPACKETSIZE_MASK) >> USB_MAXPACKETSIZE_SHIFT) +#define USB_GET_MULT(x) ((x & USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_MASK) >> USB_MAXPACKETSIZE_ADDITIONAL_TRANSCATION_SHIFT) + +/* bDevCapabilityType in Device Capability Descriptor */ +#define USB_DEVICE_CAPABILITY_WIRELESS_USB 1 +#define USB_DEVICE_CAPABILITY_USB_2_0_EXTENSION 2 +#define USB_DEVICE_CAPABILITY_SUPERSPEED_USB 3 +#define USB_DEVICE_CAPABILITY_CONTAINER_ID 4 +#define USB_DEVICE_CAPABILITY_PLATFORM 5 +#define USB_DEVICE_CAPABILITY_POWER_DELIVERY_CAPABILITY 6 +#define USB_DEVICE_CAPABILITY_BATTERY_INFO_CAPABILITY 7 +#define USB_DEVICE_CAPABILITY_PD_CONSUMER_PORT_CAPABILITY 8 +#define USB_DEVICE_CAPABILITY_PD_PROVIDER_PORT_CAPABILITY 9 +#define USB_DEVICE_CAPABILITY_SUPERSPEED_PLUS 10 +#define USB_DEVICE_CAPABILITY_PRECISION_TIME_MEASUREMENT 11 +#define USB_DEVICE_CAPABILITY_WIRELESS_USB_EXT 12 + +#define USB_BOS_CAPABILITY_EXTENSION 0x02 +#define USB_BOS_CAPABILITY_PLATFORM 0x05 + +/* OTG SET FEATURE Constants */ +#define USB_OTG_FEATURE_B_HNP_ENABLE 3 /* Enable B device to perform HNP */ +#define USB_OTG_FEATURE_A_HNP_SUPPORT 4 /* A device supports HNP */ +#define USB_OTG_FEATURE_A_ALT_HNP_SUPPORT 5 /* Another port on the A device supports HNP */ + +/* WinUSB Microsoft OS 2.0 descriptor request codes */ +#define WINUSB_REQUEST_GET_DESCRIPTOR_SET 0x07 +#define WINUSB_REQUEST_SET_ALT_ENUM 0x08 + +/* WinUSB Microsoft OS 2.0 descriptor sizes */ +#define WINUSB_DESCRIPTOR_SET_HEADER_SIZE 10 +#define WINUSB_FUNCTION_SUBSET_HEADER_SIZE 8 +#define WINUSB_FEATURE_COMPATIBLE_ID_SIZE 20 + +/* WinUSB Microsoft OS 2.0 Descriptor Types */ +#define WINUSB_SET_HEADER_DESCRIPTOR_TYPE 0x00 +#define WINUSB_SUBSET_HEADER_CONFIGURATION_TYPE 0x01 +#define WINUSB_SUBSET_HEADER_FUNCTION_TYPE 0x02 +#define WINUSB_FEATURE_COMPATIBLE_ID_TYPE 0x03 +#define WINUSB_FEATURE_REG_PROPERTY_TYPE 0x04 +#define WINUSB_FEATURE_MIN_RESUME_TIME_TYPE 0x05 +#define WINUSB_FEATURE_MODEL_ID_TYPE 0x06 +#define WINUSB_FEATURE_CCGP_DEVICE_TYPE 0x07 + +#define WINUSB_PROP_DATA_TYPE_REG_SZ 0x01 +#define WINUSB_PROP_DATA_TYPE_REG_MULTI_SZ 0x07 + +/* WebUSB Descriptor Types */ +#define WEBUSB_DESCRIPTOR_SET_HEADER_TYPE 0x00 +#define WEBUSB_CONFIGURATION_SUBSET_HEADER_TYPE 0x01 +#define WEBUSB_FUNCTION_SUBSET_HEADER_TYPE 0x02 +#define WEBUSB_URL_TYPE 0x03 + +/* WebUSB Request Codes */ +#define WEBUSB_REQUEST_GET_URL 0x02 + +/* bScheme in URL descriptor */ +#define WEBUSB_URL_SCHEME_HTTP 0x00 +#define WEBUSB_URL_SCHEME_HTTPS 0x01 + +/* WebUSB Descriptor sizes */ +#define WEBUSB_DESCRIPTOR_SET_HEADER_SIZE 5 +#define WEBUSB_CONFIGURATION_SUBSET_HEADER_SIZE 4 +#define WEBUSB_FUNCTION_SUBSET_HEADER_SIZE 3 + +/* Setup packet definition used to read raw data from USB line */ +struct usb_setup_packet { + /** Request type. Bits 0:4 determine recipient, see + * \ref usb_request_recipient. Bits 5:6 determine type, see + * \ref usb_request_type. Bit 7 determines data transfer direction, see + * \ref usb_endpoint_direction. + */ + uint8_t bmRequestType; + + /** Request. If the type bits of bmRequestType are equal to + * \ref usb_request_type::LIBUSB_REQUEST_TYPE_STANDARD + * "USB_REQUEST_TYPE_STANDARD" then this field refers to + * \ref usb_standard_request. For other cases, use of this field is + * application-specific. */ + uint8_t bRequest; + + /** Value. Varies according to request */ + uint16_t wValue; + + /** Index. Varies according to request, typically used to pass an index + * or offset */ + uint16_t wIndex; + + /** Number of bytes to transfer */ + uint16_t wLength; +} __PACKED; + +#define USB_SIZEOF_SETUP_PACKET 8 + +/** Standard Device Descriptor */ +struct usb_device_descriptor { + uint8_t bLength; /* Descriptor size in bytes = 18 */ + uint8_t bDescriptorType; /* DEVICE descriptor type = 1 */ + uint16_t bcdUSB; /* USB spec in BCD, e.g. 0x0200 */ + uint8_t bDeviceClass; /* Class code, if 0 see interface */ + uint8_t bDeviceSubClass; /* Sub-Class code, 0 if class = 0 */ + uint8_t bDeviceProtocol; /* Protocol, if 0 see interface */ + uint8_t bMaxPacketSize0; /* Endpoint 0 max. size */ + uint16_t idVendor; /* Vendor ID per USB-IF */ + uint16_t idProduct; /* Product ID per manufacturer */ + uint16_t bcdDevice; /* Device release # in BCD */ + uint8_t iManufacturer; /* Index to manufacturer string */ + uint8_t iProduct; /* Index to product string */ + uint8_t iSerialNumber; /* Index to serial number string */ + uint8_t bNumConfigurations; /* Number of possible configurations */ +} __PACKED; + +#define USB_SIZEOF_DEVICE_DESC 18 + +/** Standard Configuration Descriptor */ +struct usb_configuration_descriptor { + uint8_t bLength; /* Descriptor size in bytes = 9 */ + uint8_t bDescriptorType; /* CONFIGURATION type = 2 or 7 */ + uint16_t wTotalLength; /* Length of concatenated descriptors */ + uint8_t bNumInterfaces; /* Number of interfaces, this config. */ + uint8_t bConfigurationValue; /* Value to set this config. */ + uint8_t iConfiguration; /* Index to configuration string */ + uint8_t bmAttributes; /* Config. characteristics */ + uint8_t bMaxPower; /* Max.power from bus, 2mA units */ +} __PACKED; + +#define USB_SIZEOF_CONFIG_DESC 9 + +/** Standard Interface Descriptor */ +struct usb_interface_descriptor { + uint8_t bLength; /* Descriptor size in bytes = 9 */ + uint8_t bDescriptorType; /* INTERFACE descriptor type = 4 */ + uint8_t bInterfaceNumber; /* Interface no.*/ + uint8_t bAlternateSetting; /* Value to select this IF */ + uint8_t bNumEndpoints; /* Number of endpoints excluding 0 */ + uint8_t bInterfaceClass; /* Class code, 0xFF = vendor */ + uint8_t bInterfaceSubClass; /* Sub-Class code, 0 if class = 0 */ + uint8_t bInterfaceProtocol; /* Protocol, 0xFF = vendor */ + uint8_t iInterface; /* Index to interface string */ +} __PACKED; + +#define USB_SIZEOF_INTERFACE_DESC 9 + +/** Standard Endpoint Descriptor */ +struct usb_endpoint_descriptor { + uint8_t bLength; /* Descriptor size in bytes = 7 */ + uint8_t bDescriptorType; /* ENDPOINT descriptor type = 5 */ + uint8_t bEndpointAddress; /* Endpoint # 0 - 15 | IN/OUT */ + uint8_t bmAttributes; /* Transfer type */ + uint16_t wMaxPacketSize; /* Bits 10:0 = max. packet size */ + uint8_t bInterval; /* Polling interval in (micro) frames */ +} __PACKED; + +#define USB_SIZEOF_ENDPOINT_DESC 7 + +/** Unicode (UTF16LE) String Descriptor */ +struct usb_string_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t bString; +} __PACKED; + +#define USB_SIZEOF_STRING_LANGID_DESC 4 + +/* USB Interface Association Descriptor */ +struct usb_interface_association_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bFirstInterface; + uint8_t bInterfaceCount; + uint8_t bFunctionClass; + uint8_t bFunctionSubClass; + uint8_t bFunctionProtocol; + uint8_t iFunction; +} __PACKED; + +#define USB_SIZEOF_IAD_DESC 8 + +/** USB device_qualifier descriptor */ +struct usb_device_qualifier_descriptor { + uint8_t bLength; /* Descriptor size in bytes = 10 */ + uint8_t bDescriptorType; /* DEVICE QUALIFIER type = 6 */ + uint16_t bcdUSB; /* USB spec in BCD, e.g. 0x0200 */ + uint8_t bDeviceClass; /* Class code, if 0 see interface */ + uint8_t bDeviceSubClass; /* Sub-Class code, 0 if class = 0 */ + uint8_t bDeviceProtocol; /* Protocol, if 0 see interface */ + uint8_t bMaxPacketSize; /* Endpoint 0 max. size */ + uint8_t bNumConfigurations; /* Number of possible configurations */ + uint8_t bReserved; /* Reserved = 0 */ +} __PACKED; + +#define USB_SIZEOF_DEVICE_QUALIFIER_DESC 10 + +/* Microsoft OS function descriptor. + * This can be used to request a specific driver (such as WINUSB) to be + * loaded on Windows. Unlike other descriptors, it is requested by a special + * request USB_REQ_GETMSFTOSDESCRIPTOR. + * More details: + * https://msdn.microsoft.com/en-us/windows/hardware/gg463179 + * And excellent explanation: + * https://github.com/pbatard/libwdi/wiki/WCID-Devices + * + * The device will have exactly one "Extended Compat ID Feature Descriptor", + * which may contain multiple "Function Descriptors" associated with + * different interfaces. + */ + +/* MS OS 1.0 string descriptor */ +struct usb_msosv1_string_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bString[14]; + uint8_t bMS_VendorCode; /* Vendor Code, used for a control request */ + uint8_t bPad; /* Padding byte for VendorCode look as UTF16 */ +} __PACKED; + +/* MS OS 1.0 Header descriptor */ +struct usb_msosv1_compat_id_header_descriptor { + uint32_t dwLength; + uint16_t bcdVersion; + uint16_t wIndex; + uint8_t bCount; + uint8_t reserved[7]; +} __PACKED; + +/* MS OS 1.0 Function descriptor */ +struct usb_msosv1_comp_id_function_descriptor { + uint8_t bFirstInterfaceNumber; + uint8_t reserved1; + uint8_t compatibleID[8]; + uint8_t subCompatibleID[8]; + uint8_t reserved2[6]; +} __PACKED; + +#define usb_msosv1_comp_id_create(x) \ + struct usb_msosv1_comp_id { \ + struct usb_msosv1_compat_id_header_descriptor compat_id_header; \ + struct usb_msosv1_comp_id_function_descriptor compat_id_function[x]; \ + }; + +struct usb_msosv1_descriptor { + const uint8_t *string; + uint8_t vendor_code; + const uint8_t *compat_id; + const uint8_t **comp_id_property; +}; + +/* MS OS 2.0 Header descriptor */ +struct usb_msosv2_header_descriptor { + uint32_t dwLength; + uint16_t bcdVersion; + uint16_t wIndex; + uint8_t bCount; +} __PACKED; + +/*Microsoft OS 2.0 set header descriptor*/ +struct usb_msosv2_set_header_descriptor { + uint16_t wLength; + uint16_t wDescriptorType; + uint32_t dwWindowsVersion; + uint16_t wDescriptorSetTotalLength; +} __PACKED; + +/* Microsoft OS 2.0 compatibleID descriptor*/ +struct usb_msosv2_comp_id_descriptor { + uint16_t wLength; + uint16_t wDescriptorType; + uint8_t compatibleID[8]; + uint8_t subCompatibleID[8]; +} __PACKED; + +/* MS OS 2.0 property descriptor */ +struct usb_msosv2_property_descriptor { + uint16_t wLength; + uint16_t wDescriptorType; + uint32_t dwPropertyDataType; + uint16_t wPropertyNameLength; + const char *bPropertyName; + uint32_t dwPropertyDataLength; + const char *bPropertyData; +}; + +/* Microsoft OS 2.0 subset function descriptor */ +struct usb_msosv2_subset_function_descriptor { + uint16_t wLength; + uint16_t wDescriptorType; + uint8_t bFirstInterface; + uint8_t bReserved; + uint16_t wSubsetLength; +} __PACKED; + +struct usb_msosv2_descriptor { + const uint8_t *compat_id; + uint16_t compat_id_len; + uint8_t vendor_code; +}; + +/* BOS header Descriptor */ +struct usb_bos_header_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t wTotalLength; + uint8_t bNumDeviceCaps; +} __PACKED; + +/* BOS Capability platform Descriptor */ +struct usb_bos_capability_platform_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bDevCapabilityType; + uint8_t bReserved; + uint8_t PlatformCapabilityUUID[16]; +} __PACKED; + +/* BOS Capability MS OS Descriptors version 2 */ +struct usb_bos_capability_msosv2_descriptor { + uint32_t dwWindowsVersion; + uint16_t wMSOSDescriptorSetTotalLength; + uint8_t bVendorCode; + uint8_t bAltEnumCode; +} __PACKED; + +/* BOS Capability webusb */ +struct usb_bos_capability_webusb_descriptor { + uint16_t bcdVersion; + uint8_t bVendorCode; + uint8_t iLandingPage; +} __PACKED; + +/* BOS Capability extension Descriptor*/ +struct usb_bos_capability_extension_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bDevCapabilityType; + uint32_t bmAttributes; +} __PACKED; + +/* Microsoft OS 2.0 Platform Capability Descriptor +* See https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/ +* microsoft-defined-usb-descriptors +* Adapted from the source: +* https://github.com/sowbug/weblight/blob/master/firmware/webusb.c +* (BSD-2) Thanks http://janaxelson.com/files/ms_os_20_descriptors.c +*/ +struct usb_bos_capability_platform_msosv2_descriptor { + struct usb_bos_capability_platform_descriptor platform_msos; + struct usb_bos_capability_msosv2_descriptor data_msosv2; +} __PACKED; + +/* WebUSB Platform Capability Descriptor: +* https://wicg.github.io/webusb/#webusb-platform-capability-descriptor +*/ +struct usb_bos_capability_platform_webusb_descriptor { + struct usb_bos_capability_platform_descriptor platform_webusb; + struct usb_bos_capability_webusb_descriptor data_webusb; +} __PACKED; + +struct usb_webusb_url_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bScheme; + char URL[]; +} __PACKED; + +struct usb_webusb_url_ex_descriptor { + uint8_t vendor_code; + const uint8_t *string; + uint32_t string_len; +} __PACKED; + +struct usb_bos_descriptor { + const uint8_t *string; + uint32_t string_len; +}; + +/* USB Device Capability Descriptor */ +struct usb_device_capability_descriptor { + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bDevCapabilityType; +} __PACKED; + +/** USB descriptor header */ +struct usb_desc_header { + uint8_t bLength; /**< descriptor length */ + uint8_t bDescriptorType; /**< descriptor type */ +}; +// clang-format off +#define USB_DEVICE_DESCRIPTOR_INIT(bcdUSB, bDeviceClass, bDeviceSubClass, bDeviceProtocol, idVendor, idProduct, bcdDevice, bNumConfigurations) \ + 0x12, /* bLength */ \ + USB_DESCRIPTOR_TYPE_DEVICE, /* bDescriptorType */ \ + WBVAL(bcdUSB), /* bcdUSB */ \ + bDeviceClass, /* bDeviceClass */ \ + bDeviceSubClass, /* bDeviceSubClass */ \ + bDeviceProtocol, /* bDeviceProtocol */ \ + 0x40, /* bMaxPacketSize */ \ + WBVAL(idVendor), /* idVendor */ \ + WBVAL(idProduct), /* idProduct */ \ + WBVAL(bcdDevice), /* bcdDevice */ \ + USB_STRING_MFC_INDEX, /* iManufacturer */ \ + USB_STRING_PRODUCT_INDEX, /* iProduct */ \ + USB_STRING_SERIAL_INDEX, /* iSerial */ \ + bNumConfigurations /* bNumConfigurations */ + +#define USB_CONFIG_DESCRIPTOR_INIT(wTotalLength, bNumInterfaces, bConfigurationValue, bmAttributes, bMaxPower) \ + 0x09, /* bLength */ \ + USB_DESCRIPTOR_TYPE_CONFIGURATION, /* bDescriptorType */ \ + WBVAL(wTotalLength), /* wTotalLength */ \ + bNumInterfaces, /* bNumInterfaces */ \ + bConfigurationValue, /* bConfigurationValue */ \ + 0x00, /* iConfiguration */ \ + bmAttributes, /* bmAttributes */ \ + USB_CONFIG_POWER_MA(bMaxPower) /* bMaxPower */ + +#define USB_DEVICE_QUALIFIER_DESCRIPTOR_INIT(bcdUSB, bDeviceClass, bDeviceSubClass, bDeviceProtocol, bNumConfigurations) \ + 0x0A, /* bLength */ \ + USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER, /* bDescriptorType */ \ + WBVAL(bcdUSB), /* bcdUSB */ \ + bDeviceClass, /* bDeviceClass */ \ + bDeviceSubClass, /* bDeviceSubClass */ \ + bDeviceProtocol, /* bDeviceProtocol */ \ + 0x40, /* bMaxPacketSize */ \ + bNumConfigurations, /* bNumConfigurations */ \ + 0x00 /* bReserved */ + +#define USB_OTHER_SPEED_CONFIG_DESCRIPTOR_INIT(wTotalLength, bNumInterfaces, bConfigurationValue, bmAttributes, bMaxPower) \ + 0x09, /* bLength */ \ + USB_DESCRIPTOR_TYPE_OTHER_SPEED, /* bDescriptorType */ \ + WBVAL(wTotalLength), /* wTotalLength */ \ + bNumInterfaces, /* bNumInterfaces */ \ + bConfigurationValue, /* bConfigurationValue */ \ + 0x00, /* iConfiguration */ \ + bmAttributes, /* bmAttributes */ \ + USB_CONFIG_POWER_MA(bMaxPower) /* bMaxPower */ + +#define USB_INTERFACE_DESCRIPTOR_INIT(bInterfaceNumber, bAlternateSetting, bNumEndpoints, \ + bInterfaceClass, bInterfaceSubClass, bInterfaceProtocol, iInterface) \ + 0x09, /* bLength */ \ + USB_DESCRIPTOR_TYPE_INTERFACE, /* bDescriptorType */ \ + bInterfaceNumber, /* bInterfaceNumber */ \ + bAlternateSetting, /* bAlternateSetting */ \ + bNumEndpoints, /* bNumEndpoints */ \ + bInterfaceClass, /* bInterfaceClass */ \ + bInterfaceSubClass, /* bInterfaceSubClass */ \ + bInterfaceProtocol, /* bInterfaceProtocol */ \ + iInterface /* iInterface */ + +#define USB_ENDPOINT_DESCRIPTOR_INIT(bEndpointAddress, bmAttributes, wMaxPacketSize, bInterval) \ + 0x07, /* bLength */ \ + USB_DESCRIPTOR_TYPE_ENDPOINT, /* bDescriptorType */ \ + bEndpointAddress, /* bEndpointAddress */ \ + bmAttributes, /* bmAttributes */ \ + WBVAL(wMaxPacketSize), /* wMaxPacketSize */ \ + bInterval /* bInterval */ + +#define USB_IAD_INIT(bFirstInterface, bInterfaceCount, bFunctionClass, bFunctionSubClass, bFunctionProtocol) \ + 0x08, /* bLength */ \ + USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION, /* bDescriptorType */ \ + bFirstInterface, /* bFirstInterface */ \ + bInterfaceCount, /* bInterfaceCount */ \ + bFunctionClass, /* bFunctionClass */ \ + bFunctionSubClass, /* bFunctionSubClass */ \ + bFunctionProtocol, /* bFunctionProtocol */ \ + 0x00 /* iFunction */ + +#define USB_LANGID_INIT(id) \ + 0x04, /* bLength */ \ + USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */ \ + WBVAL(id) /* wLangID0 */ +// clang-format on + +#endif /* USB_DEF_H */ diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_errno.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_errno.h similarity index 95% rename from stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_errno.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_errno.h index c2dd285..57f37c1 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_errno.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_errno.h @@ -1,24 +1,24 @@ -/* - * Copyright (c) 2023, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USB_ERRNO_H -#define USB_ERRNO_H - -#define USB_ERR_NOMEM 1 -#define USB_ERR_INVAL 2 -#define USB_ERR_NODEV 3 -#define USB_ERR_NOTCONN 4 -#define USB_ERR_NOTSUPP 5 -#define USB_ERR_BUSY 6 -#define USB_ERR_RANGE 7 -#define USB_ERR_STALL 8 -#define USB_ERR_BABBLE 9 -#define USB_ERR_NAK 10 -#define USB_ERR_DT 11 -#define USB_ERR_IO 12 -#define USB_ERR_SHUTDOWN 13 -#define USB_ERR_TIMEOUT 14 - -#endif /* USB_ERRNO_H */ +/* + * Copyright (c) 2023, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_ERRNO_H +#define USB_ERRNO_H + +#define USB_ERR_NOMEM 1 +#define USB_ERR_INVAL 2 +#define USB_ERR_NODEV 3 +#define USB_ERR_NOTCONN 4 +#define USB_ERR_NOTSUPP 5 +#define USB_ERR_BUSY 6 +#define USB_ERR_RANGE 7 +#define USB_ERR_STALL 8 +#define USB_ERR_BABBLE 9 +#define USB_ERR_NAK 10 +#define USB_ERR_DT 11 +#define USB_ERR_IO 12 +#define USB_ERR_SHUTDOWN 13 +#define USB_ERR_TIMEOUT 14 + +#endif /* USB_ERRNO_H */ diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_list.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_list.h similarity index 96% rename from stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_list.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_list.h index 1a6b75d..3078a1f 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_list.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_list.h @@ -1,459 +1,459 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USB_LIST_H -#define USB_LIST_H - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * usb_container_of - return the member address of ptr, if the type of ptr is the - * struct type. - */ -#define usb_container_of(ptr, type, member) \ - ((type *)((char *)(ptr) - (unsigned long)(&((type *)0)->member))) - -/** - * Single List structure - */ -struct usb_slist_node { - struct usb_slist_node *next; /**< point to next node. */ -}; -typedef struct usb_slist_node usb_slist_t; /**< Type for single list. */ - -/** - * @brief initialize a single list - * - * @param l the single list to be initialized - */ -static inline void usb_slist_init(usb_slist_t *l) -{ - l->next = NULL; -} - -static inline void usb_slist_add_head(usb_slist_t *l, usb_slist_t *n) -{ - n->next = l->next; - l->next = n; -} - -static inline void usb_slist_add_tail(usb_slist_t *l, usb_slist_t *n) -{ - usb_slist_t *tmp = l; - - while (tmp->next) { - tmp = tmp->next; - } - - /* append the node to the tail */ - tmp->next = n; - n->next = NULL; -} - -static inline void usb_slist_insert(usb_slist_t *l, usb_slist_t *next, usb_slist_t *n) -{ - if (!next) { - usb_slist_add_tail(next, l); - return; - } - - while (l->next) { - if (l->next == next) { - l->next = n; - n->next = next; - } - - l = l->next; - } -} - -static inline usb_slist_t *usb_slist_remove(usb_slist_t *l, usb_slist_t *n) -{ - usb_slist_t *tmp = l; - /* remove slist head */ - while (tmp->next && tmp->next != n) { - tmp = tmp->next; - } - - /* remove node */ - if (tmp->next != (usb_slist_t *)0) { - tmp->next = tmp->next->next; - } - - return l; -} - -static inline unsigned int usb_slist_len(const usb_slist_t *l) -{ - unsigned int len = 0; - const usb_slist_t *list = l->next; - - while (list != NULL) { - list = list->next; - len++; - } - - return len; -} - -static inline unsigned int usb_slist_contains(usb_slist_t *l, usb_slist_t *n) -{ - while (l->next) { - if (l->next == n) { - return 0; - } - - l = l->next; - } - - return 1; -} - -static inline usb_slist_t *usb_slist_head(usb_slist_t *l) -{ - return l->next; -} - -static inline usb_slist_t *usb_slist_tail(usb_slist_t *l) -{ - while (l->next) { - l = l->next; - } - - return l; -} - -static inline usb_slist_t *usb_slist_next(usb_slist_t *n) -{ - return n->next; -} - -static inline int usb_slist_isempty(usb_slist_t *l) -{ - return l->next == NULL; -} - -/** - * @brief initialize a slist object - */ -#define USB_SLIST_OBJECT_INIT(object) \ - { \ - NULL \ - } - -/** - * @brief initialize a slist object - */ -#define USB_SLIST_DEFINE(slist) \ - usb_slist_t slist = { NULL } - -/** - * @brief get the struct for this single list node - * @param node the entry point - * @param type the type of structure - * @param member the name of list in structure - */ -#define usb_slist_entry(node, type, member) \ - usb_container_of(node, type, member) - -/** - * usb_slist_first_entry - get the first element from a slist - * @ptr: the slist head to take the element from. - * @type: the type of the struct this is embedded in. - * @member: the name of the slist_struct within the struct. - * - * Note, that slist is expected to be not empty. - */ -#define usb_slist_first_entry(ptr, type, member) \ - usb_slist_entry((ptr)->next, type, member) - -/** - * usb_slist_tail_entry - get the tail element from a slist - * @ptr: the slist head to take the element from. - * @type: the type of the struct this is embedded in. - * @member: the name of the slist_struct within the struct. - * - * Note, that slist is expected to be not empty. - */ -#define usb_slist_tail_entry(ptr, type, member) \ - usb_slist_entry(usb_slist_tail(ptr), type, member) - -/** - * usb_slist_first_entry_or_null - get the first element from a slist - * @ptr: the slist head to take the element from. - * @type: the type of the struct this is embedded in. - * @member: the name of the slist_struct within the struct. - * - * Note, that slist is expected to be not empty. - */ -#define usb_slist_first_entry_or_null(ptr, type, member) \ - (usb_slist_isempty(ptr) ? NULL : usb_slist_first_entry(ptr, type, member)) - -/** - * usb_slist_for_each - iterate over a single list - * @pos: the usb_slist_t * to use as a loop cursor. - * @head: the head for your single list. - */ -#define usb_slist_for_each(pos, head) \ - for (pos = (head)->next; pos != NULL; pos = pos->next) - -#define usb_slist_for_each_safe(pos, next, head) \ - for (pos = (head)->next, next = pos->next; pos; \ - pos = next, next = pos->next) - -/** - * usb_slist_for_each_entry - iterate over single list of given type - * @pos: the type * to use as a loop cursor. - * @head: the head for your single list. - * @member: the name of the list_struct within the struct. - */ -#define usb_slist_for_each_entry(pos, head, member) \ - for (pos = usb_slist_entry((head)->next, typeof(*pos), member); \ - &pos->member != (NULL); \ - pos = usb_slist_entry(pos->member.next, typeof(*pos), member)) - -#define usb_slist_for_each_entry_safe(pos, n, head, member) \ - for (pos = usb_slist_entry((head)->next, typeof(*pos), member), \ - n = usb_slist_entry(pos->member.next, typeof(*pos), member); \ - &pos->member != (NULL); \ - pos = n, n = usb_slist_entry(pos->member.next, typeof(*pos), member)) - -/** - * Double List structure - */ -struct usb_dlist_node { - struct usb_dlist_node *next; /**< point to next node. */ - struct usb_dlist_node *prev; /**< point to prev node. */ -}; -typedef struct usb_dlist_node usb_dlist_t; /**< Type for lists. */ - -/** - * @brief initialize a list - * - * @param l list to be initialized - */ -static inline void usb_dlist_init(usb_dlist_t *l) -{ - l->next = l->prev = l; -} - -/** - * @brief insert a node after a list - * - * @param l list to insert it - * @param n new node to be inserted - */ -static inline void usb_dlist_insert_after(usb_dlist_t *l, usb_dlist_t *n) -{ - l->next->prev = n; - n->next = l->next; - - l->next = n; - n->prev = l; -} - -/** - * @brief insert a node before a list - * - * @param n new node to be inserted - * @param l list to insert it - */ -static inline void usb_dlist_insert_before(usb_dlist_t *l, usb_dlist_t *n) -{ - l->prev->next = n; - n->prev = l->prev; - - l->prev = n; - n->next = l; -} - -/** - * @brief remove node from list. - * @param n the node to remove from the list. - */ -static inline void usb_dlist_remove(usb_dlist_t *n) -{ - n->next->prev = n->prev; - n->prev->next = n->next; - - n->next = n->prev = n; -} - -/** - * @brief move node from list. - * @param n the node to remove from the list. - */ -static inline void usb_dlist_move_head(usb_dlist_t *l, usb_dlist_t *n) -{ - usb_dlist_remove(n); - usb_dlist_insert_after(l, n); -} - -/** - * @brief move node from list. - * @param n the node to remove from the list. - */ -static inline void usb_dlist_move_tail(usb_dlist_t *l, usb_dlist_t *n) -{ - usb_dlist_remove(n); - usb_dlist_insert_before(l, n); -} - -/** - * @brief tests whether a list is empty - * @param l the list to test. - */ -static inline int usb_dlist_isempty(const usb_dlist_t *l) -{ - return l->next == l; -} - -/** - * @brief get the list length - * @param l the list to get. - */ -static inline unsigned int usb_dlist_len(const usb_dlist_t *l) -{ - unsigned int len = 0; - const usb_dlist_t *p = l; - - while (p->next != l) { - p = p->next; - len++; - } - - return len; -} - -/** - * @brief initialize a dlist object - */ -#define USB_DLIST_OBJECT_INIT(object) \ - { \ - &(object), &(object) \ - } -/** - * @brief initialize a dlist object - */ -#define USB_DLIST_DEFINE(list) \ - usb_dlist_t list = { &(list), &(list) } - -/** - * @brief get the struct for this entry - * @param node the entry point - * @param type the type of structure - * @param member the name of list in structure - */ -#define usb_dlist_entry(node, type, member) \ - usb_container_of(node, type, member) - -/** - * dlist_first_entry - get the first element from a list - * @ptr: the list head to take the element from. - * @type: the type of the struct this is embedded in. - * @member: the name of the list_struct within the struct. - * - * Note, that list is expected to be not empty. - */ -#define usb_dlist_first_entry(ptr, type, member) \ - usb_dlist_entry((ptr)->next, type, member) -/** - * dlist_first_entry_or_null - get the first element from a list - * @ptr: the list head to take the element from. - * @type: the type of the struct this is embedded in. - * @member: the name of the list_struct within the struct. - * - * Note, that list is expected to be not empty. - */ -#define usb_dlist_first_entry_or_null(ptr, type, member) \ - (usb_dlist_isempty(ptr) ? NULL : usb_dlist_first_entry(ptr, type, member)) - -/** - * usb_dlist_for_each - iterate over a list - * @pos: the usb_dlist_t * to use as a loop cursor. - * @head: the head for your list. - */ -#define usb_dlist_for_each(pos, head) \ - for (pos = (head)->next; pos != (head); pos = pos->next) - -/** - * usb_dlist_for_each_prev - iterate over a list - * @pos: the dlist_t * to use as a loop cursor. - * @head: the head for your list. - */ -#define usb_dlist_for_each_prev(pos, head) \ - for (pos = (head)->prev; pos != (head); pos = pos->prev) - -/** - * usb_dlist_for_each_safe - iterate over a list safe against removal of list entry - * @pos: the dlist_t * to use as a loop cursor. - * @n: another dlist_t * to use as temporary storage - * @head: the head for your list. - */ -#define usb_dlist_for_each_safe(pos, n, head) \ - for (pos = (head)->next, n = pos->next; pos != (head); \ - pos = n, n = pos->next) - -#define usb_dlist_for_each_prev_safe(pos, n, head) \ - for (pos = (head)->prev, n = pos->prev; pos != (head); \ - pos = n, n = pos->prev) -/** - * usb_dlist_for_each_entry - iterate over list of given type - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - */ -#define usb_dlist_for_each_entry(pos, head, member) \ - for (pos = usb_dlist_entry((head)->next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = usb_dlist_entry(pos->member.next, typeof(*pos), member)) - -/** - * usb_usb_dlist_for_each_entry_reverse - iterate over list of given type - * @pos: the type * to use as a loop cursor. - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - */ -#define usb_dlist_for_each_entry_reverse(pos, head, member) \ - for (pos = usb_dlist_entry((head)->prev, typeof(*pos), member); \ - &pos->member != (head); \ - pos = usb_dlist_entry(pos->member.prev, typeof(*pos), member)) - -/** - * usb_usb_dlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - */ -#define usb_dlist_for_each_entry_safe(pos, n, head, member) \ - for (pos = usb_dlist_entry((head)->next, typeof(*pos), member), \ - n = usb_dlist_entry(pos->member.next, typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = usb_dlist_entry(n->member.next, typeof(*n), member)) - -/** - * usb_usb_dlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry - * @pos: the type * to use as a loop cursor. - * @n: another type * to use as temporary storage - * @head: the head for your list. - * @member: the name of the list_struct within the struct. - */ -#define usb_dlist_for_each_entry_safe_reverse(pos, n, head, member) \ - for (pos = usb_dlist_entry((head)->prev, typeof(*pos), field), \ - n = usb_dlist_entry(pos->member.prev, typeof(*pos), member); \ - &pos->member != (head); \ - pos = n, n = usb_dlist_entry(pos->member.prev, typeof(*pos), member)) - -#ifdef __cplusplus -} -#endif - -#endif /* USB_LIST_H */ +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_LIST_H +#define USB_LIST_H + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * usb_container_of - return the member address of ptr, if the type of ptr is the + * struct type. + */ +#define usb_container_of(ptr, type, member) \ + ((type *)((char *)(ptr) - (unsigned long)(&((type *)0)->member))) + +/** + * Single List structure + */ +struct usb_slist_node { + struct usb_slist_node *next; /**< point to next node. */ +}; +typedef struct usb_slist_node usb_slist_t; /**< Type for single list. */ + +/** + * @brief initialize a single list + * + * @param l the single list to be initialized + */ +static inline void usb_slist_init(usb_slist_t *l) +{ + l->next = NULL; +} + +static inline void usb_slist_add_head(usb_slist_t *l, usb_slist_t *n) +{ + n->next = l->next; + l->next = n; +} + +static inline void usb_slist_add_tail(usb_slist_t *l, usb_slist_t *n) +{ + usb_slist_t *tmp = l; + + while (tmp->next) { + tmp = tmp->next; + } + + /* append the node to the tail */ + tmp->next = n; + n->next = NULL; +} + +static inline void usb_slist_insert(usb_slist_t *l, usb_slist_t *next, usb_slist_t *n) +{ + if (!next) { + usb_slist_add_tail(next, l); + return; + } + + while (l->next) { + if (l->next == next) { + l->next = n; + n->next = next; + } + + l = l->next; + } +} + +static inline usb_slist_t *usb_slist_remove(usb_slist_t *l, usb_slist_t *n) +{ + usb_slist_t *tmp = l; + /* remove slist head */ + while (tmp->next && tmp->next != n) { + tmp = tmp->next; + } + + /* remove node */ + if (tmp->next != (usb_slist_t *)0) { + tmp->next = tmp->next->next; + } + + return l; +} + +static inline unsigned int usb_slist_len(const usb_slist_t *l) +{ + unsigned int len = 0; + const usb_slist_t *list = l->next; + + while (list != NULL) { + list = list->next; + len++; + } + + return len; +} + +static inline unsigned int usb_slist_contains(usb_slist_t *l, usb_slist_t *n) +{ + while (l->next) { + if (l->next == n) { + return 0; + } + + l = l->next; + } + + return 1; +} + +static inline usb_slist_t *usb_slist_head(usb_slist_t *l) +{ + return l->next; +} + +static inline usb_slist_t *usb_slist_tail(usb_slist_t *l) +{ + while (l->next) { + l = l->next; + } + + return l; +} + +static inline usb_slist_t *usb_slist_next(usb_slist_t *n) +{ + return n->next; +} + +static inline int usb_slist_isempty(usb_slist_t *l) +{ + return l->next == NULL; +} + +/** + * @brief initialize a slist object + */ +#define USB_SLIST_OBJECT_INIT(object) \ + { \ + NULL \ + } + +/** + * @brief initialize a slist object + */ +#define USB_SLIST_DEFINE(slist) \ + usb_slist_t slist = { NULL } + +/** + * @brief get the struct for this single list node + * @param node the entry point + * @param type the type of structure + * @param member the name of list in structure + */ +#define usb_slist_entry(node, type, member) \ + usb_container_of(node, type, member) + +/** + * usb_slist_first_entry - get the first element from a slist + * @ptr: the slist head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the slist_struct within the struct. + * + * Note, that slist is expected to be not empty. + */ +#define usb_slist_first_entry(ptr, type, member) \ + usb_slist_entry((ptr)->next, type, member) + +/** + * usb_slist_tail_entry - get the tail element from a slist + * @ptr: the slist head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the slist_struct within the struct. + * + * Note, that slist is expected to be not empty. + */ +#define usb_slist_tail_entry(ptr, type, member) \ + usb_slist_entry(usb_slist_tail(ptr), type, member) + +/** + * usb_slist_first_entry_or_null - get the first element from a slist + * @ptr: the slist head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the slist_struct within the struct. + * + * Note, that slist is expected to be not empty. + */ +#define usb_slist_first_entry_or_null(ptr, type, member) \ + (usb_slist_isempty(ptr) ? NULL : usb_slist_first_entry(ptr, type, member)) + +/** + * usb_slist_for_each - iterate over a single list + * @pos: the usb_slist_t * to use as a loop cursor. + * @head: the head for your single list. + */ +#define usb_slist_for_each(pos, head) \ + for (pos = (head)->next; pos != NULL; pos = pos->next) + +#define usb_slist_for_each_safe(pos, next, head) \ + for (pos = (head)->next, next = pos->next; pos; \ + pos = next, next = pos->next) + +/** + * usb_slist_for_each_entry - iterate over single list of given type + * @pos: the type * to use as a loop cursor. + * @head: the head for your single list. + * @member: the name of the list_struct within the struct. + */ +#define usb_slist_for_each_entry(pos, head, member) \ + for (pos = usb_slist_entry((head)->next, typeof(*pos), member); \ + &pos->member != (NULL); \ + pos = usb_slist_entry(pos->member.next, typeof(*pos), member)) + +#define usb_slist_for_each_entry_safe(pos, n, head, member) \ + for (pos = usb_slist_entry((head)->next, typeof(*pos), member), \ + n = usb_slist_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (NULL); \ + pos = n, n = usb_slist_entry(pos->member.next, typeof(*pos), member)) + +/** + * Double List structure + */ +struct usb_dlist_node { + struct usb_dlist_node *next; /**< point to next node. */ + struct usb_dlist_node *prev; /**< point to prev node. */ +}; +typedef struct usb_dlist_node usb_dlist_t; /**< Type for lists. */ + +/** + * @brief initialize a list + * + * @param l list to be initialized + */ +static inline void usb_dlist_init(usb_dlist_t *l) +{ + l->next = l->prev = l; +} + +/** + * @brief insert a node after a list + * + * @param l list to insert it + * @param n new node to be inserted + */ +static inline void usb_dlist_insert_after(usb_dlist_t *l, usb_dlist_t *n) +{ + l->next->prev = n; + n->next = l->next; + + l->next = n; + n->prev = l; +} + +/** + * @brief insert a node before a list + * + * @param n new node to be inserted + * @param l list to insert it + */ +static inline void usb_dlist_insert_before(usb_dlist_t *l, usb_dlist_t *n) +{ + l->prev->next = n; + n->prev = l->prev; + + l->prev = n; + n->next = l; +} + +/** + * @brief remove node from list. + * @param n the node to remove from the list. + */ +static inline void usb_dlist_remove(usb_dlist_t *n) +{ + n->next->prev = n->prev; + n->prev->next = n->next; + + n->next = n->prev = n; +} + +/** + * @brief move node from list. + * @param n the node to remove from the list. + */ +static inline void usb_dlist_move_head(usb_dlist_t *l, usb_dlist_t *n) +{ + usb_dlist_remove(n); + usb_dlist_insert_after(l, n); +} + +/** + * @brief move node from list. + * @param n the node to remove from the list. + */ +static inline void usb_dlist_move_tail(usb_dlist_t *l, usb_dlist_t *n) +{ + usb_dlist_remove(n); + usb_dlist_insert_before(l, n); +} + +/** + * @brief tests whether a list is empty + * @param l the list to test. + */ +static inline int usb_dlist_isempty(const usb_dlist_t *l) +{ + return l->next == l; +} + +/** + * @brief get the list length + * @param l the list to get. + */ +static inline unsigned int usb_dlist_len(const usb_dlist_t *l) +{ + unsigned int len = 0; + const usb_dlist_t *p = l; + + while (p->next != l) { + p = p->next; + len++; + } + + return len; +} + +/** + * @brief initialize a dlist object + */ +#define USB_DLIST_OBJECT_INIT(object) \ + { \ + &(object), &(object) \ + } +/** + * @brief initialize a dlist object + */ +#define USB_DLIST_DEFINE(list) \ + usb_dlist_t list = { &(list), &(list) } + +/** + * @brief get the struct for this entry + * @param node the entry point + * @param type the type of structure + * @param member the name of list in structure + */ +#define usb_dlist_entry(node, type, member) \ + usb_container_of(node, type, member) + +/** + * dlist_first_entry - get the first element from a list + * @ptr: the list head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the list_struct within the struct. + * + * Note, that list is expected to be not empty. + */ +#define usb_dlist_first_entry(ptr, type, member) \ + usb_dlist_entry((ptr)->next, type, member) +/** + * dlist_first_entry_or_null - get the first element from a list + * @ptr: the list head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the list_struct within the struct. + * + * Note, that list is expected to be not empty. + */ +#define usb_dlist_first_entry_or_null(ptr, type, member) \ + (usb_dlist_isempty(ptr) ? NULL : usb_dlist_first_entry(ptr, type, member)) + +/** + * usb_dlist_for_each - iterate over a list + * @pos: the usb_dlist_t * to use as a loop cursor. + * @head: the head for your list. + */ +#define usb_dlist_for_each(pos, head) \ + for (pos = (head)->next; pos != (head); pos = pos->next) + +/** + * usb_dlist_for_each_prev - iterate over a list + * @pos: the dlist_t * to use as a loop cursor. + * @head: the head for your list. + */ +#define usb_dlist_for_each_prev(pos, head) \ + for (pos = (head)->prev; pos != (head); pos = pos->prev) + +/** + * usb_dlist_for_each_safe - iterate over a list safe against removal of list entry + * @pos: the dlist_t * to use as a loop cursor. + * @n: another dlist_t * to use as temporary storage + * @head: the head for your list. + */ +#define usb_dlist_for_each_safe(pos, n, head) \ + for (pos = (head)->next, n = pos->next; pos != (head); \ + pos = n, n = pos->next) + +#define usb_dlist_for_each_prev_safe(pos, n, head) \ + for (pos = (head)->prev, n = pos->prev; pos != (head); \ + pos = n, n = pos->prev) +/** + * usb_dlist_for_each_entry - iterate over list of given type + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define usb_dlist_for_each_entry(pos, head, member) \ + for (pos = usb_dlist_entry((head)->next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = usb_dlist_entry(pos->member.next, typeof(*pos), member)) + +/** + * usb_usb_dlist_for_each_entry_reverse - iterate over list of given type + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define usb_dlist_for_each_entry_reverse(pos, head, member) \ + for (pos = usb_dlist_entry((head)->prev, typeof(*pos), member); \ + &pos->member != (head); \ + pos = usb_dlist_entry(pos->member.prev, typeof(*pos), member)) + +/** + * usb_usb_dlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry + * @pos: the type * to use as a loop cursor. + * @n: another type * to use as temporary storage + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define usb_dlist_for_each_entry_safe(pos, n, head, member) \ + for (pos = usb_dlist_entry((head)->next, typeof(*pos), member), \ + n = usb_dlist_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = usb_dlist_entry(n->member.next, typeof(*n), member)) + +/** + * usb_usb_dlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry + * @pos: the type * to use as a loop cursor. + * @n: another type * to use as temporary storage + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define usb_dlist_for_each_entry_safe_reverse(pos, n, head, member) \ + for (pos = usb_dlist_entry((head)->prev, typeof(*pos), field), \ + n = usb_dlist_entry(pos->member.prev, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = usb_dlist_entry(pos->member.prev, typeof(*pos), member)) + +#ifdef __cplusplus +} +#endif + +#endif /* USB_LIST_H */ diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_log.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_log.h similarity index 96% rename from stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_log.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_log.h index b2a5de0..923e800 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_log.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_log.h @@ -1,85 +1,85 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USB_LOG_H -#define USB_LOG_H - -#include - -/* DEBUG level */ -#define USB_DBG_ERROR 0 -#define USB_DBG_WARNING 1 -#define USB_DBG_INFO 2 -#define USB_DBG_LOG 3 - -#ifndef USB_DBG_TAG -#define USB_DBG_TAG "USB" -#endif -/* - * The color for terminal (foreground) - * BLACK 30 - * RED 31 - * GREEN 32 - * YELLOW 33 - * BLUE 34 - * PURPLE 35 - * CYAN 36 - * WHITE 37 - */ - -#ifdef CONFIG_USB_PRINTF_COLOR_ENABLE -#define _USB_DBG_COLOR(n) CONFIG_USB_PRINTF("\033[" #n "m") -#define _USB_DBG_LOG_HDR(lvl_name, color_n) \ - CONFIG_USB_PRINTF("\033[" #color_n "m[" lvl_name "/" USB_DBG_TAG "] ") -#define _USB_DBG_LOG_X_END \ - CONFIG_USB_PRINTF("\033[0m") -#else -#define _USB_DBG_COLOR(n) -#define _USB_DBG_LOG_HDR(lvl_name, color_n) \ - CONFIG_USB_PRINTF("[" lvl_name "/" USB_DBG_TAG "] ") -#define _USB_DBG_LOG_X_END -#endif - -#define usb_dbg_log_line(lvl, color_n, fmt, ...) \ - do { \ - _USB_DBG_LOG_HDR(lvl, color_n); \ - CONFIG_USB_PRINTF(fmt, ##__VA_ARGS__); \ - _USB_DBG_LOG_X_END; \ - } while (0) - -#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_LOG) -#define USB_LOG_DBG(fmt, ...) usb_dbg_log_line("D", 0, fmt, ##__VA_ARGS__) -#else -#define USB_LOG_DBG(...) {} -#endif - -#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_INFO) -#define USB_LOG_INFO(fmt, ...) usb_dbg_log_line("I", 32, fmt, ##__VA_ARGS__) -#else -#define USB_LOG_INFO(...) {} -#endif - -#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_WARNING) -#define USB_LOG_WRN(fmt, ...) usb_dbg_log_line("W", 33, fmt, ##__VA_ARGS__) -#else -#define USB_LOG_WRN(...) {} -#endif - -#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_ERROR) -#define USB_LOG_ERR(fmt, ...) usb_dbg_log_line("E", 31, fmt, ##__VA_ARGS__) -#else -#define USB_LOG_ERR(...) {} -#endif - -#define USB_LOG_RAW(...) CONFIG_USB_PRINTF(__VA_ARGS__) - -void usb_assert(const char *filename, int linenum); -#define USB_ASSERT(f) \ - do { \ - if (!(f)) \ - usb_assert(__FILE__, __LINE__); \ - } while (0) - -#endif /* USB_LOG_H */ +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_LOG_H +#define USB_LOG_H + +#include + +/* DEBUG level */ +#define USB_DBG_ERROR 0 +#define USB_DBG_WARNING 1 +#define USB_DBG_INFO 2 +#define USB_DBG_LOG 3 + +#ifndef USB_DBG_TAG +#define USB_DBG_TAG "USB" +#endif +/* + * The color for terminal (foreground) + * BLACK 30 + * RED 31 + * GREEN 32 + * YELLOW 33 + * BLUE 34 + * PURPLE 35 + * CYAN 36 + * WHITE 37 + */ + +#ifdef CONFIG_USB_PRINTF_COLOR_ENABLE +#define _USB_DBG_COLOR(n) CONFIG_USB_PRINTF("\033[" #n "m") +#define _USB_DBG_LOG_HDR(lvl_name, color_n) \ + CONFIG_USB_PRINTF("\033[" #color_n "m[" lvl_name "/" USB_DBG_TAG "] ") +#define _USB_DBG_LOG_X_END \ + CONFIG_USB_PRINTF("\033[0m") +#else +#define _USB_DBG_COLOR(n) +#define _USB_DBG_LOG_HDR(lvl_name, color_n) \ + CONFIG_USB_PRINTF("[" lvl_name "/" USB_DBG_TAG "] ") +#define _USB_DBG_LOG_X_END +#endif + +#define usb_dbg_log_line(lvl, color_n, fmt, ...) \ + do { \ + _USB_DBG_LOG_HDR(lvl, color_n); \ + CONFIG_USB_PRINTF(fmt, ##__VA_ARGS__); \ + _USB_DBG_LOG_X_END; \ + } while (0) + +#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_LOG) +#define USB_LOG_DBG(fmt, ...) usb_dbg_log_line("D", 0, fmt, ##__VA_ARGS__) +#else +#define USB_LOG_DBG(...) {} +#endif + +#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_INFO) +#define USB_LOG_INFO(fmt, ...) usb_dbg_log_line("I", 32, fmt, ##__VA_ARGS__) +#else +#define USB_LOG_INFO(...) {} +#endif + +#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_WARNING) +#define USB_LOG_WRN(fmt, ...) usb_dbg_log_line("W", 33, fmt, ##__VA_ARGS__) +#else +#define USB_LOG_WRN(...) {} +#endif + +#if (CONFIG_USB_DBG_LEVEL >= USB_DBG_ERROR) +#define USB_LOG_ERR(fmt, ...) usb_dbg_log_line("E", 31, fmt, ##__VA_ARGS__) +#else +#define USB_LOG_ERR(...) {} +#endif + +#define USB_LOG_RAW(...) CONFIG_USB_PRINTF(__VA_ARGS__) + +void usb_assert(const char *filename, int linenum); +#define USB_ASSERT(f) \ + do { \ + if (!(f)) \ + usb_assert(__FILE__, __LINE__); \ + } while (0) + +#endif /* USB_LOG_H */ diff --git a/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_memcpy.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_memcpy.h new file mode 100644 index 0000000..85cac31 --- /dev/null +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_memcpy.h @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2024, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_MEMCPY_H +#define USB_MEMCPY_H + +#include +#include + +#define ALIGN_UP_DWORD(x) ((uint32_t)(uintptr_t)(x) & (sizeof(uint32_t) - 1)) + +static inline void dword2array(char *addr, uint32_t w) +{ + addr[0] = w; + addr[1] = w >> 8; + addr[2] = w >> 16; + addr[3] = w >> 24; +} + +static inline void *usb_memcpy(void *s1, const void *s2, size_t n) +{ + char *b1 = (char *)s1; + const char *b2 = (const char *)s2; + uint32_t *w1; + const uint32_t *w2; + + if (ALIGN_UP_DWORD(b1) == ALIGN_UP_DWORD(b2)) { + while (ALIGN_UP_DWORD(b1) != 0 && n > 0) { + *b1++ = *b2++; + --n; + } + + w1 = (uint32_t *)b1; + w2 = (const uint32_t *)b2; + + while (n >= 4 * sizeof(uint32_t)) { + *w1++ = *w2++; + *w1++ = *w2++; + *w1++ = *w2++; + *w1++ = *w2++; + n -= 4 * sizeof(uint32_t); + } + + while (n >= sizeof(uint32_t)) { + *w1++ = *w2++; + n -= sizeof(uint32_t); + } + + b1 = (char *)w1; + b2 = (const char *)w2; + + while (n--) { + *b1++ = *b2++; + } + } else { + while (n > 0 && ALIGN_UP_DWORD(b2) != 0) { + *b1++ = *b2++; + --n; + } + + w2 = (const uint32_t *)b2; + + while (n >= 4 * sizeof(uint32_t)) { + dword2array(b1, *w2++); + b1 += sizeof(uint32_t); + dword2array(b1, *w2++); + b1 += sizeof(uint32_t); + dword2array(b1, *w2++); + b1 += sizeof(uint32_t); + dword2array(b1, *w2++); + b1 += sizeof(uint32_t); + n -= 4 * sizeof(uint32_t); + } + + while (n >= sizeof(uint32_t)) { + dword2array(b1, *w2++); + b1 += sizeof(uint32_t); + n -= sizeof(uint32_t); + } + + b2 = (const char *)w2; + + while (n--) { + *b1++ = *b2++; + } + } + return s1; +} +#endif diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_util.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_util.h similarity index 96% rename from stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_util.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_util.h index 19d376d..624cd9f 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_util.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_util.h @@ -1,210 +1,210 @@ -/* - * Copyright (c) 2022-2023, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USB_UTIL_H -#define USB_UTIL_H - -#if defined(__CC_ARM) -#ifndef __USED -#define __USED __attribute__((used)) -#endif -#ifndef __WEAK -#define __WEAK __attribute__((weak)) -#endif -#ifndef __PACKED -#define __PACKED __attribute__((packed)) -#endif -#ifndef __PACKED_STRUCT -#define __PACKED_STRUCT __packed struct -#endif -#ifndef __PACKED_UNION -#define __PACKED_UNION __packed union -#endif -#ifndef __ALIGNED -#define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#elif defined(__GNUC__) -#ifndef __USED -#define __USED __attribute__((used)) -#endif -#ifndef __WEAK -#define __WEAK __attribute__((weak)) -#endif -#ifndef __PACKED -#define __PACKED __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_STRUCT -#define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) -#endif -#ifndef __PACKED_UNION -#define __PACKED_UNION union __attribute__((packed, aligned(1))) -#endif -#ifndef __ALIGNED -#define __ALIGNED(x) __attribute__((aligned(x))) -#endif -#elif defined(__ICCARM__) || defined(__ICCRX__) || defined(__ICCRISCV__) -#ifndef __USED -#if defined(__ICCARM_V8) || defined(__ICCRISCV__) -#define __USED __attribute__((used)) -#else -#define __USED __root -#endif -#endif - -#ifndef __WEAK -#if defined(__ICCARM_V8) || defined(__ICCRISCV__) -#define __WEAK __attribute__((weak)) -#else -#define __WEAK _Pragma("__weak") -#endif -#endif - -#ifndef __PACKED -#if defined(__ICCARM_V8) || defined(__ICCRISCV__) -#define __PACKED __attribute__((packed, aligned(1))) -#else -/* Needs IAR language extensions */ -#define __PACKED __packed -#endif -#endif - -#ifndef __PACKED_STRUCT -#if defined(__ICCARM_V8) || defined(__ICCRISCV__) -#define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) -#else -/* Needs IAR language extensions */ -#define __PACKED_STRUCT __packed struct -#endif -#endif - -#ifndef __PACKED_UNION -#if defined(__ICCARM_V8) || defined(__ICCRISCV__) -#define __PACKED_UNION union __attribute__((packed, aligned(1))) -#else -/* Needs IAR language extensions */ -#define __PACKED_UNION __packed union -#endif -#endif - -#ifndef __ALIGNED -#if defined(__ICCARM_V8) || defined(__ICCRISCV__) -#define __ALIGNED(x) __attribute__((aligned(x))) -#elif (__VER__ >= 7080000) -/* Needs IAR language extensions */ -#define __ALIGNED(x) __attribute__((aligned(x))) -#else -#warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored. -#define __ALIGNED(x) -#endif -#endif - -#endif - -#ifndef __ALIGN_BEGIN -#define __ALIGN_BEGIN -#endif -#ifndef __ALIGN_END -#define __ALIGN_END __attribute__((aligned(4))) -#endif - -#ifndef ARG_UNUSED -#define ARG_UNUSED(x) (void)(x) -#endif - -#ifndef LO_BYTE -#define LO_BYTE(x) ((uint8_t)(x & 0x00FF)) -#endif - -#ifndef HI_BYTE -#define HI_BYTE(x) ((uint8_t)((x & 0xFF00) >> 8)) -#endif - -#ifndef MAX -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) -#endif - -#ifndef MIN -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif - -#ifndef BCD -#define BCD(x) ((((x) / 10) << 4) | ((x) % 10)) -#endif - -#ifdef BIT -#undef BIT -#define BIT(n) (1UL << (n)) -#else -#define BIT(n) (1UL << (n)) -#endif - -#ifndef ARRAY_SIZE -#define ARRAY_SIZE(array) \ - ((int)((sizeof(array) / sizeof((array)[0])))) -#endif - -#ifndef BSWAP16 -#define BSWAP16(u16) (__builtin_bswap16(u16)) -#endif -#ifndef BSWAP32 -#define BSWAP32(u32) (__builtin_bswap32(u32)) -#endif - -#define GET_BE16(field) \ - (((uint16_t)(field)[0] << 8) | ((uint16_t)(field)[1])) - -#define GET_BE32(field) \ - (((uint32_t)(field)[0] << 24) | ((uint32_t)(field)[1] << 16) | ((uint32_t)(field)[2] << 8) | ((uint32_t)(field)[3] << 0)) - -#define SET_BE16(field, value) \ - do { \ - (field)[0] = (uint8_t)((value) >> 8); \ - (field)[1] = (uint8_t)((value) >> 0); \ - } while (0) - -#define SET_BE24(field, value) \ - do { \ - (field)[0] = (uint8_t)((value) >> 16); \ - (field)[1] = (uint8_t)((value) >> 8); \ - (field)[2] = (uint8_t)((value) >> 0); \ - } while (0) - -#define SET_BE32(field, value) \ - do { \ - (field)[0] = (uint8_t)((value) >> 24); \ - (field)[1] = (uint8_t)((value) >> 16); \ - (field)[2] = (uint8_t)((value) >> 8); \ - (field)[3] = (uint8_t)((value) >> 0); \ - } while (0) - -#define WBVAL(x) (x & 0xFF), ((x >> 8) & 0xFF) -#define DBVAL(x) (x & 0xFF), ((x >> 8) & 0xFF), ((x >> 16) & 0xFF), ((x >> 24) & 0xFF) - -#define PP_NARG(...) \ - PP_NARG_(__VA_ARGS__, PP_RSEQ_N()) -#define PP_NARG_(...) \ - PP_ARG_N(__VA_ARGS__) -#define PP_ARG_N( \ - _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \ - _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \ - _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \ - _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \ - _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \ - _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \ - _61, _62, _63, N, ...) N -#define PP_RSEQ_N() \ - 63, 62, 61, 60, \ - 59, 58, 57, 56, 55, 54, 53, 52, 51, 50, \ - 49, 48, 47, 46, 45, 44, 43, 42, 41, 40, \ - 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, \ - 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, \ - 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, \ - 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 - -#define USB_MEM_ALIGNX __attribute__((aligned(CONFIG_USB_ALIGN_SIZE))) - -#define USB_ALIGN_UP(size, align) (((size) + (align)-1) & ~((align)-1)) - -#endif /* USB_UTIL_H */ +/* + * Copyright (c) 2022-2023, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_UTIL_H +#define USB_UTIL_H + +#if defined(__CC_ARM) +#ifndef __USED +#define __USED __attribute__((used)) +#endif +#ifndef __WEAK +#define __WEAK __attribute__((weak)) +#endif +#ifndef __PACKED +#define __PACKED __attribute__((packed)) +#endif +#ifndef __PACKED_STRUCT +#define __PACKED_STRUCT __packed struct +#endif +#ifndef __PACKED_UNION +#define __PACKED_UNION __packed union +#endif +#ifndef __ALIGNED +#define __ALIGNED(x) __attribute__((aligned(x))) +#endif +#elif defined(__GNUC__) +#ifndef __USED +#define __USED __attribute__((used)) +#endif +#ifndef __WEAK +#define __WEAK __attribute__((weak)) +#endif +#ifndef __PACKED +#define __PACKED __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_STRUCT +#define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_UNION +#define __PACKED_UNION union __attribute__((packed, aligned(1))) +#endif +#ifndef __ALIGNED +#define __ALIGNED(x) __attribute__((aligned(x))) +#endif +#elif defined(__ICCARM__) || defined(__ICCRX__) || defined(__ICCRISCV__) +#ifndef __USED +#if defined(__ICCARM_V8) || defined(__ICCRISCV__) +#define __USED __attribute__((used)) +#else +#define __USED __root +#endif +#endif + +#ifndef __WEAK +#if defined(__ICCARM_V8) || defined(__ICCRISCV__) +#define __WEAK __attribute__((weak)) +#else +#define __WEAK _Pragma("__weak") +#endif +#endif + +#ifndef __PACKED +#if defined(__ICCARM_V8) || defined(__ICCRISCV__) +#define __PACKED __attribute__((packed, aligned(1))) +#else +/* Needs IAR language extensions */ +#define __PACKED __packed +#endif +#endif + +#ifndef __PACKED_STRUCT +#if defined(__ICCARM_V8) || defined(__ICCRISCV__) +#define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) +#else +/* Needs IAR language extensions */ +#define __PACKED_STRUCT __packed struct +#endif +#endif + +#ifndef __PACKED_UNION +#if defined(__ICCARM_V8) || defined(__ICCRISCV__) +#define __PACKED_UNION union __attribute__((packed, aligned(1))) +#else +/* Needs IAR language extensions */ +#define __PACKED_UNION __packed union +#endif +#endif + +#ifndef __ALIGNED +#if defined(__ICCARM_V8) || defined(__ICCRISCV__) +#define __ALIGNED(x) __attribute__((aligned(x))) +#elif (__VER__ >= 7080000) +/* Needs IAR language extensions */ +#define __ALIGNED(x) __attribute__((aligned(x))) +#else +#warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored. +#define __ALIGNED(x) +#endif +#endif + +#endif + +#ifndef __ALIGN_BEGIN +#define __ALIGN_BEGIN +#endif +#ifndef __ALIGN_END +#define __ALIGN_END __attribute__((aligned(4))) +#endif + +#ifndef ARG_UNUSED +#define ARG_UNUSED(x) (void)(x) +#endif + +#ifndef LO_BYTE +#define LO_BYTE(x) ((uint8_t)(x & 0x00FF)) +#endif + +#ifndef HI_BYTE +#define HI_BYTE(x) ((uint8_t)((x & 0xFF00) >> 8)) +#endif + +#ifndef MAX +#define MAX(a, b) (((a) > (b)) ? (a) : (b)) +#endif + +#ifndef MIN +#define MIN(a, b) (((a) < (b)) ? (a) : (b)) +#endif + +#ifndef BCD +#define BCD(x) ((((x) / 10) << 4) | ((x) % 10)) +#endif + +#ifdef BIT +#undef BIT +#define BIT(n) (1UL << (n)) +#else +#define BIT(n) (1UL << (n)) +#endif + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(array) \ + ((int)((sizeof(array) / sizeof((array)[0])))) +#endif + +#ifndef BSWAP16 +#define BSWAP16(u16) (__builtin_bswap16(u16)) +#endif +#ifndef BSWAP32 +#define BSWAP32(u32) (__builtin_bswap32(u32)) +#endif + +#define GET_BE16(field) \ + (((uint16_t)(field)[0] << 8) | ((uint16_t)(field)[1])) + +#define GET_BE32(field) \ + (((uint32_t)(field)[0] << 24) | ((uint32_t)(field)[1] << 16) | ((uint32_t)(field)[2] << 8) | ((uint32_t)(field)[3] << 0)) + +#define SET_BE16(field, value) \ + do { \ + (field)[0] = (uint8_t)((value) >> 8); \ + (field)[1] = (uint8_t)((value) >> 0); \ + } while (0) + +#define SET_BE24(field, value) \ + do { \ + (field)[0] = (uint8_t)((value) >> 16); \ + (field)[1] = (uint8_t)((value) >> 8); \ + (field)[2] = (uint8_t)((value) >> 0); \ + } while (0) + +#define SET_BE32(field, value) \ + do { \ + (field)[0] = (uint8_t)((value) >> 24); \ + (field)[1] = (uint8_t)((value) >> 16); \ + (field)[2] = (uint8_t)((value) >> 8); \ + (field)[3] = (uint8_t)((value) >> 0); \ + } while (0) + +#define WBVAL(x) (x & 0xFF), ((x >> 8) & 0xFF) +#define DBVAL(x) (x & 0xFF), ((x >> 8) & 0xFF), ((x >> 16) & 0xFF), ((x >> 24) & 0xFF) + +#define PP_NARG(...) \ + PP_NARG_(__VA_ARGS__, PP_RSEQ_N()) +#define PP_NARG_(...) \ + PP_ARG_N(__VA_ARGS__) +#define PP_ARG_N( \ + _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, \ + _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, \ + _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, \ + _31, _32, _33, _34, _35, _36, _37, _38, _39, _40, \ + _41, _42, _43, _44, _45, _46, _47, _48, _49, _50, \ + _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, \ + _61, _62, _63, N, ...) N +#define PP_RSEQ_N() \ + 63, 62, 61, 60, \ + 59, 58, 57, 56, 55, 54, 53, 52, 51, 50, \ + 49, 48, 47, 46, 45, 44, 43, 42, 41, 40, \ + 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, \ + 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, \ + 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, \ + 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 + +#define USB_MEM_ALIGNX __attribute__((aligned(CONFIG_USB_ALIGN_SIZE))) + +#define USB_ALIGN_UP(size, align) (((size) + (align)-1) & ~((align)-1)) + +#endif /* USB_UTIL_H */ diff --git a/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_version.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_version.h new file mode 100644 index 0000000..384f278 --- /dev/null +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/common/usb_version.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2024, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USB_VERSION_H +#define USB_VERSION_H + +#ifdef CHERRYUSB_VERSION +#warning "Please do not define CHERRYUSB_VERSION in usb_config.h" +#undef CHERRYUSB_VERSION +#endif +#ifdef CHERRYUSB_VERSION_STR +#warning "Please do not define CHERRYUSB_VERSION_STR in usb_config.h" +#undef CHERRYUSB_VERSION_STR +#endif + +#define CHERRYUSB_VERSION 0x010400 +#define CHERRYUSB_VERSION_STR "v1.4.0" + +#endif \ No newline at end of file diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/core/usbd_core.c b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/core/usbd_core.c similarity index 87% rename from stm32f0_cherryusb/3rdParty/CherryUSB/core/usbd_core.c rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/core/usbd_core.c index e65eac6..e072d8a 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/core/usbd_core.c +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/core/usbd_core.c @@ -1,1225 +1,1287 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#include "usbd_core.h" - -/* general descriptor field offsets */ -#define DESC_bLength 0 /** Length offset */ -#define DESC_bDescriptorType 1 /** Descriptor type offset */ - -/* config descriptor field offsets */ -#define CONF_DESC_wTotalLength 2 /** Total length offset */ -#define CONF_DESC_bConfigurationValue 5 /** Configuration value offset */ -#define CONF_DESC_bmAttributes 7 /** configuration characteristics */ - -/* interface descriptor field offsets */ -#define INTF_DESC_bInterfaceNumber 2 /** Interface number offset */ -#define INTF_DESC_bAlternateSetting 3 /** Alternate setting offset */ - -struct usbd_tx_rx_msg { - uint8_t ep; - uint32_t nbytes; - usbd_endpoint_callback cb; -}; - -USB_NOCACHE_RAM_SECTION struct usbd_core_priv { - /** Setup packet */ - USB_MEM_ALIGNX struct usb_setup_packet setup; - /** Pointer to data buffer */ - uint8_t *ep0_data_buf; - /** Remaining bytes in buffer */ - uint32_t ep0_data_buf_residue; - /** Total length of control transfer */ - uint32_t ep0_data_buf_len; - /** Zero length packet flag of control transfer */ - bool zlp_flag; - /** Pointer to registered descriptors */ -#ifdef CONFIG_USBDEV_ADVANCE_DESC - const struct usb_descriptor *descriptors; -#else - const uint8_t *descriptors; - struct usb_msosv1_descriptor *msosv1_desc; - struct usb_msosv2_descriptor *msosv2_desc; - struct usb_bos_descriptor *bos_desc; -#endif - /* Buffer used for storing standard, class and vendor request data */ - USB_MEM_ALIGNX uint8_t req_data[CONFIG_USBDEV_REQUEST_BUFFER_LEN]; - - /** Currently selected configuration */ - uint8_t configuration; - uint8_t speed; -#ifdef CONFIG_USBDEV_TEST_MODE - bool test_req; -#endif - struct usbd_interface *intf[8]; - uint8_t intf_offset; - - struct usbd_tx_rx_msg tx_msg[CONFIG_USBDEV_EP_NUM]; - struct usbd_tx_rx_msg rx_msg[CONFIG_USBDEV_EP_NUM]; - - void (*event_handler)(uint8_t busid, uint8_t event); -} g_usbd_core[CONFIG_USBDEV_MAX_BUS]; - -struct usbd_bus g_usbdev_bus[CONFIG_USBDEV_MAX_BUS]; - -static void usbd_class_event_notify_handler(uint8_t busid, uint8_t event, void *arg); - -static void usbd_print_setup(struct usb_setup_packet *setup) -{ - USB_LOG_INFO("Setup: " - "bmRequestType 0x%02x, bRequest 0x%02x, wValue 0x%04x, wIndex 0x%04x, wLength 0x%04x\r\n", - setup->bmRequestType, - setup->bRequest, - setup->wValue, - setup->wIndex, - setup->wLength); -} - -static bool is_device_configured(uint8_t busid) -{ - return (g_usbd_core[busid].configuration != 0); -} - -/** - * @brief configure and enable endpoint - * - * This function sets endpoint configuration according to one specified in USB - * endpoint descriptor and then enables it for data transfers. - * - * @param [in] ep Endpoint descriptor byte array - * - * @return true if successfully configured and enabled - */ -static bool usbd_set_endpoint(uint8_t busid, const struct usb_endpoint_descriptor *ep) -{ - USB_LOG_INFO("Open ep:0x%02x type:%u mps:%u\r\n", - ep->bEndpointAddress, - USB_GET_ENDPOINT_TYPE(ep->bmAttributes), - USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize)); - - return usbd_ep_open(busid, ep) == 0 ? true : false; -} -/** - * @brief Disable endpoint for transferring data - * - * This function cancels transfers that are associated with endpoint and - * disabled endpoint itself. - * - * @param [in] ep Endpoint descriptor byte array - * - * @return true if successfully deconfigured and disabled - */ -static bool usbd_reset_endpoint(uint8_t busid, const struct usb_endpoint_descriptor *ep) -{ - USB_LOG_INFO("Close ep:0x%02x type:%u\r\n", - ep->bEndpointAddress, - USB_GET_ENDPOINT_TYPE(ep->bmAttributes)); - - return usbd_ep_close(busid, ep->bEndpointAddress) == 0 ? true : false; -} - -/** - * @brief get specified USB descriptor - * - * This function parses the list of installed USB descriptors and attempts - * to find the specified USB descriptor. - * - * @param [in] type_index Type and index of the descriptor - * @param [out] data Descriptor data - * @param [out] len Descriptor length - * - * @return true if the descriptor was found, false otherwise - */ -#ifdef CONFIG_USBDEV_ADVANCE_DESC -static bool usbd_get_descriptor(uint8_t busid, uint16_t type_index, uint8_t **data, uint32_t *len) -{ - uint8_t type = 0U; - uint8_t index = 0U; - bool found = true; - uint32_t desc_len = 0; - const uint8_t *desc = NULL; - - type = HI_BYTE(type_index); - index = LO_BYTE(type_index); - - switch (type) { - case USB_DESCRIPTOR_TYPE_DEVICE: - desc = g_usbd_core[busid].descriptors->device_descriptor_callback(g_usbd_core[busid].speed); - if (desc == NULL) { - found = false; - break; - } - desc_len = desc[0]; - break; - case USB_DESCRIPTOR_TYPE_CONFIGURATION: - desc = g_usbd_core[busid].descriptors->config_descriptor_callback(g_usbd_core[busid].speed); - if (desc == NULL) { - found = false; - break; - } - desc_len = ((desc[CONF_DESC_wTotalLength]) | (desc[CONF_DESC_wTotalLength + 1] << 8)); - break; - case USB_DESCRIPTOR_TYPE_STRING: - if (index == USB_OSDESC_STRING_DESC_INDEX) { - USB_LOG_INFO("read MS OS 2.0 descriptor string\r\n"); - - if (!g_usbd_core[busid].descriptors->msosv1_descriptor) { - found = false; - break; - } - - desc = (uint8_t *)g_usbd_core[busid].descriptors->msosv1_descriptor->string; - desc_len = g_usbd_core[busid].descriptors->msosv1_descriptor->string[0]; - } else { - desc = g_usbd_core[busid].descriptors->string_descriptor_callback(g_usbd_core[busid].speed, index); - if (desc == NULL) { - found = false; - break; - } - desc_len = desc[0]; - } - break; - case USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER: - desc = g_usbd_core[busid].descriptors->device_quality_descriptor_callback(g_usbd_core[busid].speed); - if (desc == NULL) { - found = false; - break; - } - desc_len = desc[0]; - break; - case USB_DESCRIPTOR_TYPE_OTHER_SPEED: - desc = g_usbd_core[busid].descriptors->other_speed_descriptor_callback(g_usbd_core[busid].speed); - if (desc == NULL) { - found = false; - break; - } - desc_len = ((desc[CONF_DESC_wTotalLength]) | (desc[CONF_DESC_wTotalLength + 1] << 8)); - break; - - case USB_DESCRIPTOR_TYPE_BINARY_OBJECT_STORE: - USB_LOG_INFO("read BOS descriptor string\r\n"); - - if (!g_usbd_core[busid].descriptors->bos_descriptor) { - found = false; - break; - } - - desc = (uint8_t *)g_usbd_core[busid].descriptors->bos_descriptor->string; - desc_len = g_usbd_core[busid].descriptors->bos_descriptor->string_len; - break; - - default: - found = false; - break; - } - - if (found == false) { - /* nothing found */ - USB_LOG_ERR("descriptor not found!\r\n", type, index); - } else { - // *data = desc; - memcpy(*data, desc, desc_len); - *len = desc_len; - } - return found; -} -#else -static bool usbd_get_descriptor(uint8_t busid, uint16_t type_index, uint8_t **data, uint32_t *len) -{ - uint8_t type = 0U; - uint8_t index = 0U; - uint8_t *p = NULL; - uint32_t cur_index = 0U; - bool found = false; - - type = HI_BYTE(type_index); - index = LO_BYTE(type_index); - - if ((type == USB_DESCRIPTOR_TYPE_STRING) && (index == USB_OSDESC_STRING_DESC_INDEX)) { - USB_LOG_INFO("read MS OS 2.0 descriptor string\r\n"); - - if (!g_usbd_core[busid].msosv1_desc) { - return false; - } - - //*data = (uint8_t *)g_usbd_core[busid].msosv1_desc->string; - memcpy(*data, (uint8_t *)g_usbd_core[busid].msosv1_desc->string, g_usbd_core[busid].msosv1_desc->string[0]); - *len = g_usbd_core[busid].msosv1_desc->string[0]; - - return true; - } else if (type == USB_DESCRIPTOR_TYPE_BINARY_OBJECT_STORE) { - USB_LOG_INFO("read BOS descriptor string\r\n"); - - if (!g_usbd_core[busid].bos_desc) { - return false; - } - - //*data = g_usbd_core[busid].bos_desc->string; - memcpy(*data, (uint8_t *)g_usbd_core[busid].bos_desc->string, g_usbd_core[busid].bos_desc->string_len); - *len = g_usbd_core[busid].bos_desc->string_len; - return true; - } - /* - * Invalid types of descriptors, - * see USB Spec. Revision 2.0, 9.4.3 Get Descriptor - */ - else if ((type == USB_DESCRIPTOR_TYPE_INTERFACE) || (type == USB_DESCRIPTOR_TYPE_ENDPOINT) || -#ifndef CONFIG_USB_HS - (type > USB_DESCRIPTOR_TYPE_ENDPOINT)) { -#else - (type > USB_DESCRIPTOR_TYPE_OTHER_SPEED)) { -#endif - return false; - } - - p = (uint8_t *)g_usbd_core[busid].descriptors; - - cur_index = 0U; - - while (p[DESC_bLength] != 0U) { - if (p[DESC_bDescriptorType] == type) { - if (cur_index == index) { - found = true; - break; - } - - cur_index++; - } - - /* skip to next descriptor */ - p += p[DESC_bLength]; - } - - if (found) { - if ((type == USB_DESCRIPTOR_TYPE_CONFIGURATION) || ((type == USB_DESCRIPTOR_TYPE_OTHER_SPEED))) { - /* configuration or other speed descriptor is an - * exception, length is at offset 2 and 3 - */ - *len = (p[CONF_DESC_wTotalLength]) | - (p[CONF_DESC_wTotalLength + 1] << 8); - } else { - /* normally length is at offset 0 */ - *len = p[DESC_bLength]; - } - memcpy(*data, p, *len); - } else { - /* nothing found */ - USB_LOG_ERR("descriptor not found!\r\n", type, index); - } - - return found; -} -#endif - -/** - * @brief set USB configuration - * - * This function configures the device according to the specified configuration - * index and alternate setting by parsing the installed USB descriptor list. - * A configuration index of 0 unconfigures the device. - * - * @param [in] config_index Configuration index - * @param [in] alt_setting Alternate setting number - * - * @return true if successfully configured false if error or unconfigured - */ -static bool usbd_set_configuration(uint8_t busid, uint8_t config_index, uint8_t alt_setting) -{ - uint8_t cur_alt_setting = 0xFF; - uint8_t cur_config = 0xFF; - bool found = false; - const uint8_t *p; - uint32_t desc_len = 0; - uint32_t current_desc_len = 0; - -#ifdef CONFIG_USBDEV_ADVANCE_DESC - p = g_usbd_core[busid].descriptors->config_descriptor_callback(g_usbd_core[busid].speed); -#else - p = (uint8_t *)g_usbd_core[busid].descriptors; -#endif - /* configure endpoints for this configuration/altsetting */ - while (p[DESC_bLength] != 0U) { - switch (p[DESC_bDescriptorType]) { - case USB_DESCRIPTOR_TYPE_CONFIGURATION: - /* remember current configuration index */ - cur_config = p[CONF_DESC_bConfigurationValue]; - - if (cur_config == config_index) { - found = true; - - current_desc_len = 0; - desc_len = (p[CONF_DESC_wTotalLength]) | - (p[CONF_DESC_wTotalLength + 1] << 8); - } - - break; - - case USB_DESCRIPTOR_TYPE_INTERFACE: - /* remember current alternate setting */ - cur_alt_setting = - p[INTF_DESC_bAlternateSetting]; - break; - - case USB_DESCRIPTOR_TYPE_ENDPOINT: - if ((cur_config != config_index) || - (cur_alt_setting != alt_setting)) { - break; - } - - found = usbd_set_endpoint(busid, (struct usb_endpoint_descriptor *)p); - break; - - default: - break; - } - - /* skip to next descriptor */ - p += p[DESC_bLength]; - current_desc_len += p[DESC_bLength]; - if (current_desc_len >= desc_len && desc_len) { - break; - } - } - - return found; -} - -/** - * @brief set USB interface - * - * @param [in] iface Interface index - * @param [in] alt_setting Alternate setting number - * - * @return true if successfully configured false if error or unconfigured - */ -static bool usbd_set_interface(uint8_t busid, uint8_t iface, uint8_t alt_setting) -{ - const uint8_t *if_desc = NULL; - struct usb_endpoint_descriptor *ep_desc; - uint8_t cur_alt_setting = 0xFF; - uint8_t cur_iface = 0xFF; - bool ret = false; - const uint8_t *p; - uint32_t desc_len = 0; - uint32_t current_desc_len = 0; - -#ifdef CONFIG_USBDEV_ADVANCE_DESC - p = g_usbd_core[busid].descriptors->config_descriptor_callback(g_usbd_core[busid].speed); -#else - p = (uint8_t *)g_usbd_core[busid].descriptors; -#endif - USB_LOG_DBG("iface %u alt_setting %u\r\n", iface, alt_setting); - - while (p[DESC_bLength] != 0U) { - switch (p[DESC_bDescriptorType]) { - case USB_DESCRIPTOR_TYPE_CONFIGURATION: - current_desc_len = 0; - desc_len = (p[CONF_DESC_wTotalLength]) | - (p[CONF_DESC_wTotalLength + 1] << 8); - - break; - - case USB_DESCRIPTOR_TYPE_INTERFACE: - /* remember current alternate setting */ - cur_alt_setting = p[INTF_DESC_bAlternateSetting]; - cur_iface = p[INTF_DESC_bInterfaceNumber]; - - if (cur_iface == iface && - cur_alt_setting == alt_setting) { - if_desc = (void *)p; - } - - USB_LOG_DBG("Current iface %u alt setting %u", - cur_iface, cur_alt_setting); - break; - - case USB_DESCRIPTOR_TYPE_ENDPOINT: - if (cur_iface == iface) { - ep_desc = (struct usb_endpoint_descriptor *)p; - - if (cur_alt_setting != alt_setting) { - ret = usbd_reset_endpoint(busid, ep_desc); - } else { - ret = usbd_set_endpoint(busid, ep_desc); - } - } - - break; - - default: - break; - } - - /* skip to next descriptor */ - p += p[DESC_bLength]; - current_desc_len += p[DESC_bLength]; - if (current_desc_len >= desc_len && desc_len) { - break; - } - } - - usbd_class_event_notify_handler(busid, USBD_EVENT_SET_INTERFACE, (void *)if_desc); - - return ret; -} - -/** - * @brief handle a standard device request - * - * @param [in] setup The setup packet - * @param [in,out] data Data buffer - * @param [in,out] len Pointer to data length - * - * @return true if the request was handled successfully - */ -static bool usbd_std_device_req_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) -{ - uint16_t value = setup->wValue; - bool ret = true; - - switch (setup->bRequest) { - case USB_REQUEST_GET_STATUS: - /* bit 0: self-powered */ - /* bit 1: remote wakeup */ - (*data)[0] = 0x00; - (*data)[1] = 0x00; - *len = 2; - break; - - case USB_REQUEST_CLEAR_FEATURE: - case USB_REQUEST_SET_FEATURE: - if (value == USB_FEATURE_REMOTE_WAKEUP) { - if (setup->bRequest == USB_REQUEST_SET_FEATURE) { - g_usbd_core[busid].event_handler(busid, USBD_EVENT_SET_REMOTE_WAKEUP); - } else { - g_usbd_core[busid].event_handler(busid, USBD_EVENT_CLR_REMOTE_WAKEUP); - } - } else if (value == USB_FEATURE_TEST_MODE) { -#ifdef CONFIG_USBDEV_TEST_MODE - g_usbd_core[busid].test_req = true; -#endif - } - *len = 0; - break; - - case USB_REQUEST_SET_ADDRESS: - usbd_set_address(busid, value); - *len = 0; - break; - - case USB_REQUEST_GET_DESCRIPTOR: - ret = usbd_get_descriptor(busid, value, data, len); - break; - - case USB_REQUEST_SET_DESCRIPTOR: - ret = false; - break; - - case USB_REQUEST_GET_CONFIGURATION: - *data = (uint8_t *)&g_usbd_core[busid].configuration; - *len = 1; - break; - - case USB_REQUEST_SET_CONFIGURATION: - value &= 0xFF; - - if (!usbd_set_configuration(busid, value, 0)) { - ret = false; - } else { - g_usbd_core[busid].configuration = value; - usbd_class_event_notify_handler(busid, USBD_EVENT_CONFIGURED, NULL); - g_usbd_core[busid].event_handler(busid, USBD_EVENT_CONFIGURED); - } - *len = 0; - break; - - case USB_REQUEST_GET_INTERFACE: - case USB_REQUEST_SET_INTERFACE: - ret = false; - break; - - default: - ret = false; - break; - } - - return ret; -} - -/** - * @brief handle a standard interface request - * - * @param [in] setup The setup packet - * @param [in,out] data Data buffer - * @param [in,out] len Pointer to data length - * - * @return true if the request was handled successfully - */ -static bool usbd_std_interface_req_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) -{ - uint8_t type = HI_BYTE(setup->wValue); - uint8_t intf_num = LO_BYTE(setup->wIndex); - bool ret = true; - - /* Only when device is configured, then interface requests can be valid. */ - if (!is_device_configured(busid)) { - return false; - } - - switch (setup->bRequest) { - case USB_REQUEST_GET_STATUS: - (*data)[0] = 0x00; - (*data)[1] = 0x00; - *len = 2; - break; - - case USB_REQUEST_GET_DESCRIPTOR: - if (type == 0x22) { /* HID_DESCRIPTOR_TYPE_HID_REPORT */ - USB_LOG_INFO("read hid report descriptor\r\n"); - - for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { - struct usbd_interface *intf = g_usbd_core[busid].intf[i]; - - if (intf && (intf->intf_num == intf_num)) { - //*data = (uint8_t *)intf->hid_report_descriptor; - memcpy(*data, intf->hid_report_descriptor, intf->hid_report_descriptor_len); - *len = intf->hid_report_descriptor_len; - return true; - } - } - } - ret = false; - break; - case USB_REQUEST_CLEAR_FEATURE: - case USB_REQUEST_SET_FEATURE: - ret = false; - break; - case USB_REQUEST_GET_INTERFACE: - (*data)[0] = 0; - *len = 1; - break; - - case USB_REQUEST_SET_INTERFACE: - usbd_set_interface(busid, setup->wIndex, setup->wValue); - *len = 0; - break; - - default: - ret = false; - break; - } - - return ret; -} - -/** - * @brief handle a standard endpoint request - * - * @param [in] setup The setup packet - * @param [in,out] data Data buffer - * @param [in,out] len Pointer to data length - * - * @return true if the request was handled successfully - */ -static bool usbd_std_endpoint_req_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) -{ - uint8_t ep = (uint8_t)setup->wIndex; - bool ret = true; - - /* Only when device is configured, then endpoint requests can be valid. */ - if (!is_device_configured(busid)) { - return false; - } - - switch (setup->bRequest) { - case USB_REQUEST_GET_STATUS: - (*data)[0] = 0x00; - (*data)[1] = 0x00; - *len = 2; - break; - case USB_REQUEST_CLEAR_FEATURE: - if (setup->wValue == USB_FEATURE_ENDPOINT_HALT) { - USB_LOG_ERR("ep:%02x clear halt\r\n", ep); - - usbd_ep_clear_stall(busid, ep); - break; - } else { - ret = false; - } - *len = 0; - break; - case USB_REQUEST_SET_FEATURE: - if (setup->wValue == USB_FEATURE_ENDPOINT_HALT) { - USB_LOG_ERR("ep:%02x set halt\r\n", ep); - - usbd_ep_set_stall(busid, ep); - } else { - ret = false; - } - *len = 0; - break; - - case USB_REQUEST_SYNCH_FRAME: - ret = false; - break; - default: - ret = false; - break; - } - - return ret; -} - -/** - * @brief handle standard requests (list in chapter 9) - * - * @param [in] setup The setup packet - * @param [in,out] data Data buffer - * @param [in,out] len Pointer to data length - * - * @return true if the request was handled successfully - */ -static int usbd_standard_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) -{ - int rc = 0; - - switch (setup->bmRequestType & USB_REQUEST_RECIPIENT_MASK) { - case USB_REQUEST_RECIPIENT_DEVICE: - if (usbd_std_device_req_handler(busid, setup, data, len) == false) { - rc = -1; - } - - break; - - case USB_REQUEST_RECIPIENT_INTERFACE: - if (usbd_std_interface_req_handler(busid, setup, data, len) == false) { - rc = -1; - } - - break; - - case USB_REQUEST_RECIPIENT_ENDPOINT: - if (usbd_std_endpoint_req_handler(busid, setup, data, len) == false) { - rc = -1; - } - - break; - - default: - rc = -1; - break; - } - - return rc; -} - -/** - * @brief handler for class requests - * - * If a custom request handler was installed, this handler is called first. - * - * @param [in] setup The setup packet - * @param [in,out] data Data buffer - * @param [in,out] len Pointer to data length - * - * @return true if the request was handled successfully - */ -static int usbd_class_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) -{ - if ((setup->bmRequestType & USB_REQUEST_RECIPIENT_MASK) == USB_REQUEST_RECIPIENT_INTERFACE) { - for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { - struct usbd_interface *intf = g_usbd_core[busid].intf[i]; - - if (intf && intf->class_interface_handler && (intf->intf_num == (setup->wIndex & 0xFF))) { - return intf->class_interface_handler(busid, setup, data, len); - } - } - } else if ((setup->bmRequestType & USB_REQUEST_RECIPIENT_MASK) == USB_REQUEST_RECIPIENT_ENDPOINT) { - for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { - struct usbd_interface *intf = g_usbd_core[busid].intf[i]; - - if (intf && intf->class_endpoint_handler) { - return intf->class_endpoint_handler(busid, setup, data, len); - } - } - } - return -1; -} - -/** - * @brief handler for vendor requests - * - * If a custom request handler was installed, this handler is called first. - * - * @param [in] setup The setup packet - * @param [in,out] data Data buffer - * @param [in,out] len Pointer to data length - * - * @return true if the request was handled successfully - */ -static int usbd_vendor_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) -{ - uint32_t desclen; -#ifdef CONFIG_USBDEV_ADVANCE_DESC - if (g_usbd_core[busid].descriptors->msosv1_descriptor) { - if (setup->bRequest == g_usbd_core[busid].descriptors->msosv1_descriptor->vendor_code) { - switch (setup->wIndex) { - case 0x04: - USB_LOG_INFO("get Compat ID\r\n"); - desclen = g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id[0] + - (g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id[1] << 8) + - (g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id[2] << 16) + - (g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id[3] << 24); - - //*data = (uint8_t *)g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id; - memcpy(*data, g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id, desclen); - *len = desclen; - return 0; - case 0x05: - USB_LOG_INFO("get Compat id properties\r\n"); - desclen = g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue][0] + - (g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue][1] << 8) + - (g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue][2] << 16) + - (g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue][3] << 24); - - //*data = (uint8_t *)g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue]; - memcpy(*data, g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue], desclen); - *len = desclen; - return 0; - default: - USB_LOG_ERR("unknown vendor code\r\n"); - return -1; - } - } - } else if (g_usbd_core[busid].descriptors->msosv2_descriptor) { - if (setup->bRequest == g_usbd_core[busid].descriptors->msosv2_descriptor->vendor_code) { - switch (setup->wIndex) { - case WINUSB_REQUEST_GET_DESCRIPTOR_SET: - USB_LOG_INFO("GET MS OS 2.0 Descriptor\r\n"); - - desclen = g_usbd_core[busid].descriptors->msosv2_descriptor->compat_id_len; - //*data = (uint8_t *)g_usbd_core[busid].descriptors->msosv2_descriptor->compat_id; - memcpy(*data, g_usbd_core[busid].descriptors->msosv2_descriptor->compat_id, desclen); - *len = g_usbd_core[busid].descriptors->msosv2_descriptor->compat_id_len; - return 0; - default: - USB_LOG_ERR("unknown vendor code\r\n"); - return -1; - } - } - } else if (g_usbd_core[busid].descriptors->webusb_url_descriptor) { - if (setup->bRequest == g_usbd_core[busid].descriptors->webusb_url_descriptor->vendor_code) { - switch (setup->wIndex) { - case WINUSB_REQUEST_GET_DESCRIPTOR_SET: - USB_LOG_INFO("GET Webusb url Descriptor\r\n"); - - desclen = g_usbd_core[busid].descriptors->webusb_url_descriptor->string_len; - //*data = (uint8_t *)g_usbd_core[busid].descriptors->webusb_url_descriptor->string; - memcpy(*data, g_usbd_core[busid].descriptors->webusb_url_descriptor->string, desclen); - *len = desclen; - return 0; - default: - USB_LOG_ERR("unknown vendor code\r\n"); - return -1; - } - } - } -#else - if (g_usbd_core[busid].msosv1_desc) { - if (setup->bRequest == g_usbd_core[busid].msosv1_desc->vendor_code) { - switch (setup->wIndex) { - case 0x04: - USB_LOG_INFO("get Compat ID\r\n"); - //*data = (uint8_t *)msosv1_desc->compat_id; - desclen = g_usbd_core[busid].msosv1_desc->compat_id[0] + - (g_usbd_core[busid].msosv1_desc->compat_id[1] << 8) + - (g_usbd_core[busid].msosv1_desc->compat_id[2] << 16) + - (g_usbd_core[busid].msosv1_desc->compat_id[3] << 24); - memcpy(*data, g_usbd_core[busid].msosv1_desc->compat_id, desclen); - *len = desclen; - return 0; - case 0x05: - USB_LOG_INFO("get Compat id properties\r\n"); - //*data = (uint8_t *)msosv1_desc->comp_id_property[setup->wValue]; - desclen = g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue][0] + - (g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue][1] << 8) + - (g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue][2] << 16) + - (g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue][3] << 24); - memcpy(*data, g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue], desclen); - *len = desclen; - return 0; - default: - USB_LOG_ERR("unknown vendor code\r\n"); - return -1; - } - } - } else if (g_usbd_core[busid].msosv2_desc) { - if (setup->bRequest == g_usbd_core[busid].msosv2_desc->vendor_code) { - switch (setup->wIndex) { - case WINUSB_REQUEST_GET_DESCRIPTOR_SET: - USB_LOG_INFO("GET MS OS 2.0 Descriptor\r\n"); - //*data = (uint8_t *)msosv2_desc->compat_id; - memcpy(*data, g_usbd_core[busid].msosv2_desc->compat_id, g_usbd_core[busid].msosv2_desc->compat_id_len); - *len = g_usbd_core[busid].msosv2_desc->compat_id_len; - return 0; - default: - USB_LOG_ERR("unknown vendor code\r\n"); - return -1; - } - } - } -#endif - for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { - struct usbd_interface *intf = g_usbd_core[busid].intf[i]; - - if (intf && intf->vendor_handler && (intf->vendor_handler(busid, setup, data, len) == 0)) { - return 0; - } - } - - return -1; -} - -/** - * @brief handle setup request( standard/class/vendor/other) - * - * @param [in] setup The setup packet - * @param [in,out] data Data buffer - * @param [in,out] len Pointer to data length - * - * @return true if the request was handles successfully - */ -static bool usbd_setup_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) -{ - switch (setup->bmRequestType & USB_REQUEST_TYPE_MASK) { - case USB_REQUEST_STANDARD: -#ifndef CONFIG_USB_HS - //g_usbd_core[busid].speed = USB_SPEED_FULL; /* next time will support getting device speed */ - if ((setup->bRequest == 0x06) && (setup->wValue == 0x0600) && (g_usbd_core[busid].speed <= USB_SPEED_FULL)) { - USB_LOG_WRN("Ignore DQD in fs\r\n"); /* Device Qualifier Descriptor */ - return false; - } -#endif - if (usbd_standard_request_handler(busid, setup, data, len) < 0) { - USB_LOG_ERR("standard request error\r\n"); - usbd_print_setup(setup); - return false; - } - break; - case USB_REQUEST_CLASS: - if (usbd_class_request_handler(busid, setup, data, len) < 0) { - USB_LOG_ERR("class request error\r\n"); - usbd_print_setup(setup); - return false; - } - break; - case USB_REQUEST_VENDOR: - if (usbd_vendor_request_handler(busid, setup, data, len) < 0) { - USB_LOG_ERR("vendor request error\r\n"); - usbd_print_setup(setup); - return false; - } - break; - - default: - return false; - } - - return true; -} - -static void usbd_class_event_notify_handler(uint8_t busid, uint8_t event, void *arg) -{ - for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { - struct usbd_interface *intf = g_usbd_core[busid].intf[i]; - - if (arg) { - struct usb_interface_descriptor *desc = (struct usb_interface_descriptor *)arg; - if (intf && intf->notify_handler && (desc->bInterfaceNumber == (intf->intf_num))) { - intf->notify_handler(busid, event, arg); - } - } else { - if (intf && intf->notify_handler) { - intf->notify_handler(busid, event, arg); - } - } - } -} - -void usbd_event_connect_handler(uint8_t busid) -{ - g_usbd_core[busid].event_handler(busid, USBD_EVENT_CONNECTED); -} - -void usbd_event_disconnect_handler(uint8_t busid) -{ - g_usbd_core[busid].event_handler(busid, USBD_EVENT_DISCONNECTED); -} - -void usbd_event_resume_handler(uint8_t busid) -{ - g_usbd_core[busid].event_handler(busid, USBD_EVENT_RESUME); -} - -void usbd_event_suspend_handler(uint8_t busid) -{ - g_usbd_core[busid].event_handler(busid, USBD_EVENT_SUSPEND); -} - -void usbd_event_reset_handler(uint8_t busid) -{ - usbd_set_address(busid, 0); - g_usbd_core[busid].configuration = 0; - struct usb_endpoint_descriptor ep0; - - ep0.bLength = 7; - ep0.bDescriptorType = USB_DESCRIPTOR_TYPE_ENDPOINT; - ep0.wMaxPacketSize = USB_CTRL_EP_MPS; - ep0.bmAttributes = USB_ENDPOINT_TYPE_CONTROL; - ep0.bEndpointAddress = USB_CONTROL_IN_EP0; - ep0.bInterval = 0; - usbd_ep_open(busid, &ep0); - - ep0.bEndpointAddress = USB_CONTROL_OUT_EP0; - usbd_ep_open(busid, &ep0); - - usbd_class_event_notify_handler(busid, USBD_EVENT_RESET, NULL); - g_usbd_core[busid].event_handler(busid, USBD_EVENT_RESET); -} - -void usbd_event_ep0_setup_complete_handler(uint8_t busid, uint8_t *psetup) -{ - struct usb_setup_packet *setup = &g_usbd_core[busid].setup; - - memcpy(setup, psetup, 8); -#ifdef CONFIG_USBDEV_SETUP_LOG_PRINT - usbd_print_setup(setup); -#endif - if (setup->wLength > CONFIG_USBDEV_REQUEST_BUFFER_LEN) { - if ((setup->bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT) { - USB_LOG_ERR("Request buffer too small\r\n"); - usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); - return; - } - } - - g_usbd_core[busid].ep0_data_buf = g_usbd_core[busid].req_data; - g_usbd_core[busid].ep0_data_buf_residue = setup->wLength; - g_usbd_core[busid].ep0_data_buf_len = setup->wLength; - g_usbd_core[busid].zlp_flag = false; - - /* handle class request when all the data is received */ - if (setup->wLength && ((setup->bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) { - USB_LOG_DBG("Start reading %d bytes from ep0\r\n", setup->wLength); - usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, g_usbd_core[busid].ep0_data_buf, setup->wLength); - return; - } - - /* Ask installed handler to process request */ - if (!usbd_setup_request_handler(busid, setup, &g_usbd_core[busid].ep0_data_buf, &g_usbd_core[busid].ep0_data_buf_len)) { - usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); - return; - } - - /* Send smallest of requested and offered length */ - g_usbd_core[busid].ep0_data_buf_residue = MIN(g_usbd_core[busid].ep0_data_buf_len, setup->wLength); - if (g_usbd_core[busid].ep0_data_buf_residue > CONFIG_USBDEV_REQUEST_BUFFER_LEN) { - USB_LOG_ERR("Request buffer too small\r\n"); - return; - } - - /* Send data or status to host */ - usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, g_usbd_core[busid].ep0_data_buf, g_usbd_core[busid].ep0_data_buf_residue); - /* - * Set ZLP flag when host asks for a bigger length and the data size is - * multiplier of USB_CTRL_EP_MPS, to indicate the transfer done after zlp - * sent. - */ - if ((setup->wLength > g_usbd_core[busid].ep0_data_buf_len) && (!(g_usbd_core[busid].ep0_data_buf_len % USB_CTRL_EP_MPS))) { - g_usbd_core[busid].zlp_flag = true; - USB_LOG_DBG("EP0 Set zlp\r\n"); - } -} - -void usbd_event_ep0_in_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes) -{ - struct usb_setup_packet *setup = &g_usbd_core[busid].setup; - - g_usbd_core[busid].ep0_data_buf += nbytes; - g_usbd_core[busid].ep0_data_buf_residue -= nbytes; - - USB_LOG_DBG("EP0 send %d bytes, %d remained\r\n", nbytes, g_usbd_core[busid].ep0_data_buf_residue); - - if (g_usbd_core[busid].ep0_data_buf_residue != 0) { - /* Start sending the remain data */ - usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, g_usbd_core[busid].ep0_data_buf, g_usbd_core[busid].ep0_data_buf_residue); - } else { - if (g_usbd_core[busid].zlp_flag == true) { - g_usbd_core[busid].zlp_flag = false; - /* Send zlp to host */ - USB_LOG_DBG("EP0 Send zlp\r\n"); - usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, NULL, 0); - } else { - /* Satisfying three conditions will jump here. - * 1. send status completely - * 2. send zlp completely - * 3. send last data completely. - */ - if (setup->wLength && ((setup->bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_IN)) { - /* if all data has sent completely, start reading out status */ - usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, NULL, 0); - } - -#ifdef CONFIG_USBDEV_TEST_MODE - if (g_usbd_core[busid].test_req) { - usbd_execute_test_mode(busid, HI_BYTE(setup->wIndex)); - g_usbd_core[busid].test_req = false; - } -#endif - } - } -} - -void usbd_event_ep0_out_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes) -{ - struct usb_setup_packet *setup = &g_usbd_core[busid].setup; - - if (nbytes > 0) { - g_usbd_core[busid].ep0_data_buf += nbytes; - g_usbd_core[busid].ep0_data_buf_residue -= nbytes; - - USB_LOG_DBG("EP0 recv %d bytes, %d remained\r\n", nbytes, g_usbd_core[busid].ep0_data_buf_residue); - - if (g_usbd_core[busid].ep0_data_buf_residue == 0) { - /* Received all, send data to handler */ - g_usbd_core[busid].ep0_data_buf = g_usbd_core[busid].req_data; - if (!usbd_setup_request_handler(busid, setup, &g_usbd_core[busid].ep0_data_buf, &g_usbd_core[busid].ep0_data_buf_len)) { - usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); - return; - } - - /*Send status to host*/ - usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, NULL, 0); - } else { - /* Start reading the remain data */ - usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, g_usbd_core[busid].ep0_data_buf, g_usbd_core[busid].ep0_data_buf_residue); - } - } else { - /* Read out status completely, do nothing */ - USB_LOG_DBG("EP0 recv out status\r\n"); - } -} - -void usbd_event_ep_in_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes) -{ - if (g_usbd_core[busid].tx_msg[ep & 0x7f].cb) { - g_usbd_core[busid].tx_msg[ep & 0x7f].cb(busid, ep, nbytes); - } -} - -void usbd_event_ep_out_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes) -{ - if (g_usbd_core[busid].rx_msg[ep & 0x7f].cb) { - g_usbd_core[busid].rx_msg[ep & 0x7f].cb(busid, ep, nbytes); - } -} - -#ifdef CONFIG_USBDEV_ADVANCE_DESC -void usbd_desc_register(uint8_t busid, const struct usb_descriptor *desc) -{ - memset(&g_usbd_core[busid], 0, sizeof(struct usbd_core_priv)); - - g_usbd_core[busid].descriptors = desc; - g_usbd_core[busid].intf_offset = 0; - - g_usbd_core[busid].tx_msg[0].ep = 0x80; - g_usbd_core[busid].tx_msg[0].cb = usbd_event_ep0_in_complete_handler; - g_usbd_core[busid].rx_msg[0].ep = 0x00; - g_usbd_core[busid].rx_msg[0].cb = usbd_event_ep0_out_complete_handler; -} -#else -void usbd_desc_register(uint8_t busid, const uint8_t *desc) -{ - memset(&g_usbd_core[busid], 0, sizeof(struct usbd_core_priv)); - - g_usbd_core[busid].descriptors = desc; - g_usbd_core[busid].intf_offset = 0; - - g_usbd_core[busid].tx_msg[0].ep = 0x80; - g_usbd_core[busid].tx_msg[0].cb = usbd_event_ep0_in_complete_handler; - g_usbd_core[busid].rx_msg[0].ep = 0x00; - g_usbd_core[busid].rx_msg[0].cb = usbd_event_ep0_out_complete_handler; -} - -/* Register MS OS Descriptors version 1 */ -void usbd_msosv1_desc_register(uint8_t busid, struct usb_msosv1_descriptor *desc) -{ - g_usbd_core[busid].msosv1_desc = desc; -} - -/* Register MS OS Descriptors version 2 */ -void usbd_msosv2_desc_register(uint8_t busid, struct usb_msosv2_descriptor *desc) -{ - g_usbd_core[busid].msosv2_desc = desc; -} - -void usbd_bos_desc_register(uint8_t busid, struct usb_bos_descriptor *desc) -{ - g_usbd_core[busid].bos_desc = desc; -} -#endif - -void usbd_add_interface(uint8_t busid, struct usbd_interface *intf) -{ - intf->intf_num = g_usbd_core[busid].intf_offset; - g_usbd_core[busid].intf[g_usbd_core[busid].intf_offset] = intf; - g_usbd_core[busid].intf_offset++; -} - -void usbd_add_endpoint(uint8_t busid, struct usbd_endpoint *ep) -{ - if (ep->ep_addr & 0x80) { - g_usbd_core[busid].tx_msg[ep->ep_addr & 0x7f].ep = ep->ep_addr; - g_usbd_core[busid].tx_msg[ep->ep_addr & 0x7f].cb = ep->ep_cb; - } else { - g_usbd_core[busid].rx_msg[ep->ep_addr & 0x7f].ep = ep->ep_addr; - g_usbd_core[busid].rx_msg[ep->ep_addr & 0x7f].cb = ep->ep_cb; - } -} - -bool usb_device_is_configured(uint8_t busid) -{ - return g_usbd_core[busid].configuration; -} - -int usbd_initialize(uint8_t busid, uint32_t reg_base, void (*event_handler)(uint8_t busid, uint8_t event)) -{ - int ret; - struct usbd_bus *bus; - - if (busid >= CONFIG_USBDEV_MAX_BUS) { - USB_LOG_ERR("bus overflow\r\n"); - while (1) { - } - } - - bus = &g_usbdev_bus[busid]; - bus->reg_base = reg_base; - - g_usbd_core[busid].event_handler = event_handler; - ret = usb_dc_init(busid); - usbd_class_event_notify_handler(busid, USBD_EVENT_INIT, NULL); - g_usbd_core[busid].event_handler(busid, USBD_EVENT_INIT); - return ret; -} - -int usbd_deinitialize(uint8_t busid) -{ - g_usbd_core[busid].intf_offset = 0; - usb_dc_deinit(busid); - usbd_class_event_notify_handler(busid, USBD_EVENT_DEINIT, NULL); - g_usbd_core[busid].event_handler(busid, USBD_EVENT_DEINIT); - return 0; -} +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include "usbd_core.h" + +/* general descriptor field offsets */ +#define DESC_bLength 0 /** Length offset */ +#define DESC_bDescriptorType 1 /** Descriptor type offset */ + +/* config descriptor field offsets */ +#define CONF_DESC_wTotalLength 2 /** Total length offset */ +#define CONF_DESC_bConfigurationValue 5 /** Configuration value offset */ +#define CONF_DESC_bmAttributes 7 /** configuration characteristics */ + +/* interface descriptor field offsets */ +#define INTF_DESC_bInterfaceNumber 2 /** Interface number offset */ +#define INTF_DESC_bAlternateSetting 3 /** Alternate setting offset */ + +struct usbd_tx_rx_msg { + uint8_t ep; + uint8_t ep_mult; + uint16_t ep_mps; + uint32_t nbytes; + usbd_endpoint_callback cb; +}; + +USB_NOCACHE_RAM_SECTION struct usbd_core_priv { + /** Setup packet */ + USB_MEM_ALIGNX struct usb_setup_packet setup; + /** Pointer to data buffer */ + uint8_t *ep0_data_buf; + /** Remaining bytes in buffer */ + uint32_t ep0_data_buf_residue; + /** Total length of control transfer */ + uint32_t ep0_data_buf_len; + /** Zero length packet flag of control transfer */ + bool zlp_flag; + /** Pointer to registered descriptors */ +#ifdef CONFIG_USBDEV_ADVANCE_DESC + const struct usb_descriptor *descriptors; +#else + const uint8_t *descriptors; + struct usb_msosv1_descriptor *msosv1_desc; + struct usb_msosv2_descriptor *msosv2_desc; + struct usb_bos_descriptor *bos_desc; +#endif + /* Buffer used for storing standard, class and vendor request data */ + USB_MEM_ALIGNX uint8_t req_data[CONFIG_USBDEV_REQUEST_BUFFER_LEN]; + + /** Currently selected configuration */ + uint8_t configuration; +#ifdef CONFIG_USBDEV_ADVANCE_DESC + uint8_t speed; +#endif +#ifdef CONFIG_USBDEV_TEST_MODE + bool test_req; +#endif + struct usbd_interface *intf[16]; + uint8_t intf_offset; + + struct usbd_tx_rx_msg tx_msg[CONFIG_USBDEV_EP_NUM]; + struct usbd_tx_rx_msg rx_msg[CONFIG_USBDEV_EP_NUM]; + + void (*event_handler)(uint8_t busid, uint8_t event); +} g_usbd_core[CONFIG_USBDEV_MAX_BUS]; + +struct usbd_bus g_usbdev_bus[CONFIG_USBDEV_MAX_BUS]; + +static void usbd_class_event_notify_handler(uint8_t busid, uint8_t event, void *arg); + +static void usbd_print_setup(struct usb_setup_packet *setup) +{ + USB_LOG_INFO("Setup: " + "bmRequestType 0x%02x, bRequest 0x%02x, wValue 0x%04x, wIndex 0x%04x, wLength 0x%04x\r\n", + setup->bmRequestType, + setup->bRequest, + setup->wValue, + setup->wIndex, + setup->wLength); +} + +static bool is_device_configured(uint8_t busid) +{ + return (g_usbd_core[busid].configuration != 0); +} + +/** + * @brief configure and enable endpoint + * + * This function sets endpoint configuration according to one specified in USB + * endpoint descriptor and then enables it for data transfers. + * + * @param [in] ep Endpoint descriptor byte array + * + * @return true if successfully configured and enabled + */ +static bool usbd_set_endpoint(uint8_t busid, const struct usb_endpoint_descriptor *ep) +{ + USB_LOG_DBG("Open ep:0x%02x type:%u mps:%u\r\n", + ep->bEndpointAddress, + USB_GET_ENDPOINT_TYPE(ep->bmAttributes), + USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize)); + + if (ep->bEndpointAddress & 0x80) { + g_usbd_core[busid].tx_msg[ep->bEndpointAddress & 0x7f].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); + g_usbd_core[busid].tx_msg[ep->bEndpointAddress & 0x7f].ep_mult = USB_GET_MULT(ep->wMaxPacketSize); + } else { + g_usbd_core[busid].rx_msg[ep->bEndpointAddress & 0x7f].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); + g_usbd_core[busid].rx_msg[ep->bEndpointAddress & 0x7f].ep_mult = USB_GET_MULT(ep->wMaxPacketSize); + } + + return usbd_ep_open(busid, ep) == 0 ? true : false; +} +/** + * @brief Disable endpoint for transferring data + * + * This function cancels transfers that are associated with endpoint and + * disabled endpoint itself. + * + * @param [in] ep Endpoint descriptor byte array + * + * @return true if successfully deconfigured and disabled + */ +static bool usbd_reset_endpoint(uint8_t busid, const struct usb_endpoint_descriptor *ep) +{ + USB_LOG_DBG("Close ep:0x%02x type:%u\r\n", + ep->bEndpointAddress, + USB_GET_ENDPOINT_TYPE(ep->bmAttributes)); + + return usbd_ep_close(busid, ep->bEndpointAddress) == 0 ? true : false; +} + +/** + * @brief get specified USB descriptor + * + * This function parses the list of installed USB descriptors and attempts + * to find the specified USB descriptor. + * + * @param [in] type_index Type and index of the descriptor + * @param [out] data Descriptor data + * @param [out] len Descriptor length + * + * @return true if the descriptor was found, false otherwise + */ +#ifdef CONFIG_USBDEV_ADVANCE_DESC +static bool usbd_get_descriptor(uint8_t busid, uint16_t type_index, uint8_t **data, uint32_t *len) +{ + uint8_t type = 0U; + uint8_t index = 0U; + bool found = true; + uint32_t desc_len = 0; + const char *string = NULL; + const uint8_t *desc = NULL; + + type = HI_BYTE(type_index); + index = LO_BYTE(type_index); + + switch (type) { + case USB_DESCRIPTOR_TYPE_DEVICE: + g_usbd_core[busid].speed = usbd_get_port_speed(busid); /* before we get device descriptor, we have known steady port speed */ + desc = g_usbd_core[busid].descriptors->device_descriptor_callback(g_usbd_core[busid].speed); + if (desc == NULL) { + found = false; + break; + } + desc_len = desc[0]; + break; + case USB_DESCRIPTOR_TYPE_CONFIGURATION: + desc = g_usbd_core[busid].descriptors->config_descriptor_callback(g_usbd_core[busid].speed); + if (desc == NULL) { + found = false; + break; + } + desc_len = ((desc[CONF_DESC_wTotalLength]) | (desc[CONF_DESC_wTotalLength + 1] << 8)); + break; + case USB_DESCRIPTOR_TYPE_STRING: + if (index == USB_OSDESC_STRING_DESC_INDEX) { + if (!g_usbd_core[busid].descriptors->msosv1_descriptor) { + found = false; + break; + } + + desc = (uint8_t *)g_usbd_core[busid].descriptors->msosv1_descriptor->string; + desc_len = g_usbd_core[busid].descriptors->msosv1_descriptor->string[0]; + } else { + string = g_usbd_core[busid].descriptors->string_descriptor_callback(g_usbd_core[busid].speed, index); + if (string == NULL) { + found = false; + break; + } + + if (index == USB_STRING_LANGID_INDEX) { + (*data)[0] = 4; + (*data)[1] = USB_DESCRIPTOR_TYPE_STRING; + (*data)[2] = string[0]; + (*data)[3] = string[1]; + + *len = 4; + return true; + } + + uint16_t str_size = strlen(string); + uint16_t total_size = 2 * str_size + 2; + if (total_size > CONFIG_USBDEV_REQUEST_BUFFER_LEN) { + USB_LOG_ERR("string size overflow\r\n"); + return false; + } + + (*data)[0] = total_size; + (*data)[1] = USB_DESCRIPTOR_TYPE_STRING; + + for (uint16_t i = 0; i < str_size; i++) { + (*data)[2 * i + 2] = string[i]; + (*data)[2 * i + 3] = 0x00; + } + + *len = total_size; + return true; + } + break; + case USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER: +#ifndef CONFIG_USB_HS + return false; +#else + desc = g_usbd_core[busid].descriptors->device_quality_descriptor_callback(g_usbd_core[busid].speed); + if (desc == NULL) { + found = false; + break; + } + desc_len = desc[0]; + break; +#endif + case USB_DESCRIPTOR_TYPE_OTHER_SPEED: + desc = g_usbd_core[busid].descriptors->other_speed_descriptor_callback(g_usbd_core[busid].speed); + if (desc == NULL) { + found = false; + break; + } + desc_len = ((desc[CONF_DESC_wTotalLength]) | (desc[CONF_DESC_wTotalLength + 1] << 8)); + break; + + case USB_DESCRIPTOR_TYPE_BINARY_OBJECT_STORE: + if (!g_usbd_core[busid].descriptors->bos_descriptor) { + found = false; + break; + } + + desc = (uint8_t *)g_usbd_core[busid].descriptors->bos_descriptor->string; + desc_len = g_usbd_core[busid].descriptors->bos_descriptor->string_len; + break; + + default: + found = false; + break; + } + + if (found == false) { + /* nothing found */ + USB_LOG_ERR("descriptor not found!\r\n", type, index); + } else { + *data = (uint8_t *)desc; + //memcpy(*data, desc, desc_len); + *len = desc_len; + } + return found; +} +#else +static bool usbd_get_descriptor(uint8_t busid, uint16_t type_index, uint8_t **data, uint32_t *len) +{ + uint8_t type = 0U; + uint8_t index = 0U; + uint8_t *p = NULL; + uint32_t cur_index = 0U; + bool found = false; + + type = HI_BYTE(type_index); + index = LO_BYTE(type_index); + + if ((type == USB_DESCRIPTOR_TYPE_STRING) && (index == USB_OSDESC_STRING_DESC_INDEX)) { + if (!g_usbd_core[busid].msosv1_desc) { + return false; + } + + *data = (uint8_t *)g_usbd_core[busid].msosv1_desc->string; + //memcpy(*data, (uint8_t *)g_usbd_core[busid].msosv1_desc->string, g_usbd_core[busid].msosv1_desc->string[0]); + *len = g_usbd_core[busid].msosv1_desc->string[0]; + + return true; + } else if (type == USB_DESCRIPTOR_TYPE_BINARY_OBJECT_STORE) { + if (!g_usbd_core[busid].bos_desc) { + return false; + } + + *data = (uint8_t *)g_usbd_core[busid].bos_desc->string; + //memcpy(*data, (uint8_t *)g_usbd_core[busid].bos_desc->string, g_usbd_core[busid].bos_desc->string_len); + *len = g_usbd_core[busid].bos_desc->string_len; + return true; + } + /* + * Invalid types of descriptors, + * see USB Spec. Revision 2.0, 9.4.3 Get Descriptor + */ + else if ((type == USB_DESCRIPTOR_TYPE_INTERFACE) || (type == USB_DESCRIPTOR_TYPE_ENDPOINT) || +#ifndef CONFIG_USB_HS + (type > USB_DESCRIPTOR_TYPE_ENDPOINT)) { +#else + (type > USB_DESCRIPTOR_TYPE_OTHER_SPEED)) { +#endif + return false; + } + + p = (uint8_t *)g_usbd_core[busid].descriptors; + + cur_index = 0U; + + while (p[DESC_bLength] != 0U) { + if (p[DESC_bDescriptorType] == type) { + if (cur_index == index) { + found = true; + break; + } + + cur_index++; + } + + /* skip to next descriptor */ + p += p[DESC_bLength]; + } + + if (found) { + if ((type == USB_DESCRIPTOR_TYPE_CONFIGURATION) || ((type == USB_DESCRIPTOR_TYPE_OTHER_SPEED))) { + /* configuration or other speed descriptor is an + * exception, length is at offset 2 and 3 + */ + *len = (p[CONF_DESC_wTotalLength]) | + (p[CONF_DESC_wTotalLength + 1] << 8); + } else { + /* normally length is at offset 0 */ + *len = p[DESC_bLength]; + } + *data = p; + //memcpy(*data, p, *len); + } else { + /* nothing found */ + USB_LOG_ERR("descriptor not found!\r\n", type, index); + } + + return found; +} +#endif + +/** + * @brief set USB configuration + * + * This function configures the device according to the specified configuration + * index and alternate setting by parsing the installed USB descriptor list. + * A configuration index of 0 unconfigures the device. + * + * @param [in] config_index Configuration index + * @param [in] alt_setting Alternate setting number + * + * @return true if successfully configured false if error or unconfigured + */ +static bool usbd_set_configuration(uint8_t busid, uint8_t config_index, uint8_t alt_setting) +{ + uint8_t cur_alt_setting = 0xFF; + uint8_t cur_config = 0xFF; + bool found = false; + const uint8_t *p; + uint32_t desc_len = 0; + uint32_t current_desc_len = 0; + +#ifdef CONFIG_USBDEV_ADVANCE_DESC + p = g_usbd_core[busid].descriptors->config_descriptor_callback(g_usbd_core[busid].speed); +#else + p = (uint8_t *)g_usbd_core[busid].descriptors; +#endif + /* configure endpoints for this configuration/altsetting */ + while (p[DESC_bLength] != 0U) { + switch (p[DESC_bDescriptorType]) { + case USB_DESCRIPTOR_TYPE_CONFIGURATION: + /* remember current configuration index */ + cur_config = p[CONF_DESC_bConfigurationValue]; + + if (cur_config == config_index) { + found = true; + + current_desc_len = 0; + desc_len = (p[CONF_DESC_wTotalLength]) | + (p[CONF_DESC_wTotalLength + 1] << 8); + } + + break; + + case USB_DESCRIPTOR_TYPE_INTERFACE: + /* remember current alternate setting */ + cur_alt_setting = + p[INTF_DESC_bAlternateSetting]; + break; + + case USB_DESCRIPTOR_TYPE_ENDPOINT: + if ((cur_config != config_index) || + (cur_alt_setting != alt_setting)) { + break; + } + + found = usbd_set_endpoint(busid, (struct usb_endpoint_descriptor *)p); + break; + + default: + break; + } + + /* skip to next descriptor */ + p += p[DESC_bLength]; + current_desc_len += p[DESC_bLength]; + if (current_desc_len >= desc_len && desc_len) { + break; + } + } + + return found; +} + +/** + * @brief set USB interface + * + * @param [in] iface Interface index + * @param [in] alt_setting Alternate setting number + * + * @return true if successfully configured false if error or unconfigured + */ +static bool usbd_set_interface(uint8_t busid, uint8_t iface, uint8_t alt_setting) +{ + const uint8_t *if_desc = NULL; + struct usb_endpoint_descriptor *ep_desc; + uint8_t cur_alt_setting = 0xFF; + uint8_t cur_iface = 0xFF; + bool ret = false; + const uint8_t *p; + uint32_t desc_len = 0; + uint32_t current_desc_len = 0; + +#ifdef CONFIG_USBDEV_ADVANCE_DESC + p = g_usbd_core[busid].descriptors->config_descriptor_callback(g_usbd_core[busid].speed); +#else + p = (uint8_t *)g_usbd_core[busid].descriptors; +#endif + USB_LOG_DBG("iface %u alt_setting %u\r\n", iface, alt_setting); + + while (p[DESC_bLength] != 0U) { + switch (p[DESC_bDescriptorType]) { + case USB_DESCRIPTOR_TYPE_CONFIGURATION: + current_desc_len = 0; + desc_len = (p[CONF_DESC_wTotalLength]) | + (p[CONF_DESC_wTotalLength + 1] << 8); + + break; + + case USB_DESCRIPTOR_TYPE_INTERFACE: + /* remember current alternate setting */ + cur_alt_setting = p[INTF_DESC_bAlternateSetting]; + cur_iface = p[INTF_DESC_bInterfaceNumber]; + + if (cur_iface == iface && + cur_alt_setting == alt_setting) { + if_desc = (void *)p; + } + + USB_LOG_DBG("Current iface %u alt setting %u", + cur_iface, cur_alt_setting); + break; + + case USB_DESCRIPTOR_TYPE_ENDPOINT: + if (cur_iface == iface) { + ep_desc = (struct usb_endpoint_descriptor *)p; + + if (cur_alt_setting != alt_setting) { + ret = usbd_reset_endpoint(busid, ep_desc); + } else { + ret = usbd_set_endpoint(busid, ep_desc); + } + } + + break; + + default: + break; + } + + /* skip to next descriptor */ + p += p[DESC_bLength]; + current_desc_len += p[DESC_bLength]; + if (current_desc_len >= desc_len && desc_len) { + break; + } + } + + usbd_class_event_notify_handler(busid, USBD_EVENT_SET_INTERFACE, (void *)if_desc); + + return ret; +} + +/** + * @brief handle a standard device request + * + * @param [in] setup The setup packet + * @param [in,out] data Data buffer + * @param [in,out] len Pointer to data length + * + * @return true if the request was handled successfully + */ +static bool usbd_std_device_req_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) +{ + uint16_t value = setup->wValue; + bool ret = true; + + switch (setup->bRequest) { + case USB_REQUEST_GET_STATUS: + /* bit 0: self-powered */ + /* bit 1: remote wakeup */ + (*data)[0] = 0x00; + (*data)[1] = 0x00; + *len = 2; + break; + + case USB_REQUEST_CLEAR_FEATURE: + case USB_REQUEST_SET_FEATURE: + if (value == USB_FEATURE_REMOTE_WAKEUP) { + if (setup->bRequest == USB_REQUEST_SET_FEATURE) { + g_usbd_core[busid].event_handler(busid, USBD_EVENT_SET_REMOTE_WAKEUP); + } else { + g_usbd_core[busid].event_handler(busid, USBD_EVENT_CLR_REMOTE_WAKEUP); + } + } else if (value == USB_FEATURE_TEST_MODE) { +#ifdef CONFIG_USBDEV_TEST_MODE + g_usbd_core[busid].test_req = true; +#endif + } + *len = 0; + break; + + case USB_REQUEST_SET_ADDRESS: + usbd_set_address(busid, value); + *len = 0; + break; + + case USB_REQUEST_GET_DESCRIPTOR: + ret = usbd_get_descriptor(busid, value, data, len); + break; + + case USB_REQUEST_SET_DESCRIPTOR: + ret = false; + break; + + case USB_REQUEST_GET_CONFIGURATION: + *data = (uint8_t *)&g_usbd_core[busid].configuration; + *len = 1; + break; + + case USB_REQUEST_SET_CONFIGURATION: + value &= 0xFF; + + if (!usbd_set_configuration(busid, value, 0)) { + ret = false; + } else { + g_usbd_core[busid].configuration = value; + usbd_class_event_notify_handler(busid, USBD_EVENT_CONFIGURED, NULL); + g_usbd_core[busid].event_handler(busid, USBD_EVENT_CONFIGURED); + } + *len = 0; + break; + + case USB_REQUEST_GET_INTERFACE: + case USB_REQUEST_SET_INTERFACE: + ret = false; + break; + + default: + ret = false; + break; + } + + return ret; +} + +/** + * @brief handle a standard interface request + * + * @param [in] setup The setup packet + * @param [in,out] data Data buffer + * @param [in,out] len Pointer to data length + * + * @return true if the request was handled successfully + */ +static bool usbd_std_interface_req_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) +{ + uint8_t type = HI_BYTE(setup->wValue); + uint8_t intf_num = LO_BYTE(setup->wIndex); + bool ret = true; + + /* Only when device is configured, then interface requests can be valid. */ + if (!is_device_configured(busid)) { + return false; + } + + switch (setup->bRequest) { + case USB_REQUEST_GET_STATUS: + (*data)[0] = 0x00; + (*data)[1] = 0x00; + *len = 2; + break; + + case USB_REQUEST_GET_DESCRIPTOR: + if (type == 0x22) { /* HID_DESCRIPTOR_TYPE_HID_REPORT */ + for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { + struct usbd_interface *intf = g_usbd_core[busid].intf[i]; + + if (intf && (intf->intf_num == intf_num)) { + *data = (uint8_t *)intf->hid_report_descriptor; + //memcpy(*data, intf->hid_report_descriptor, intf->hid_report_descriptor_len); + *len = intf->hid_report_descriptor_len; + return true; + } + } + } + ret = false; + break; + case USB_REQUEST_CLEAR_FEATURE: + case USB_REQUEST_SET_FEATURE: + ret = false; + break; + case USB_REQUEST_GET_INTERFACE: + (*data)[0] = 0; + *len = 1; + break; + + case USB_REQUEST_SET_INTERFACE: + usbd_set_interface(busid, setup->wIndex, setup->wValue); + *len = 0; + break; + + default: + ret = false; + break; + } + + return ret; +} + +/** + * @brief handle a standard endpoint request + * + * @param [in] setup The setup packet + * @param [in,out] data Data buffer + * @param [in,out] len Pointer to data length + * + * @return true if the request was handled successfully + */ +static bool usbd_std_endpoint_req_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) +{ + uint8_t ep = (uint8_t)setup->wIndex; + bool ret = true; + + /* Only when device is configured, then endpoint requests can be valid. */ + if (!is_device_configured(busid)) { + return false; + } + + switch (setup->bRequest) { + case USB_REQUEST_GET_STATUS: + (*data)[0] = 0x00; + (*data)[1] = 0x00; + *len = 2; + break; + case USB_REQUEST_CLEAR_FEATURE: + if (setup->wValue == USB_FEATURE_ENDPOINT_HALT) { + USB_LOG_ERR("ep:%02x clear halt\r\n", ep); + + usbd_ep_clear_stall(busid, ep); + break; + } else { + ret = false; + } + *len = 0; + break; + case USB_REQUEST_SET_FEATURE: + if (setup->wValue == USB_FEATURE_ENDPOINT_HALT) { + USB_LOG_ERR("ep:%02x set halt\r\n", ep); + + usbd_ep_set_stall(busid, ep); + } else { + ret = false; + } + *len = 0; + break; + + case USB_REQUEST_SYNCH_FRAME: + ret = false; + break; + default: + ret = false; + break; + } + + return ret; +} + +/** + * @brief handle standard requests (list in chapter 9) + * + * @param [in] setup The setup packet + * @param [in,out] data Data buffer + * @param [in,out] len Pointer to data length + * + * @return true if the request was handled successfully + */ +static int usbd_standard_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) +{ + int rc = 0; + + switch (setup->bmRequestType & USB_REQUEST_RECIPIENT_MASK) { + case USB_REQUEST_RECIPIENT_DEVICE: + if (usbd_std_device_req_handler(busid, setup, data, len) == false) { + rc = -1; + } + + break; + + case USB_REQUEST_RECIPIENT_INTERFACE: + if (usbd_std_interface_req_handler(busid, setup, data, len) == false) { + rc = -1; + } + + break; + + case USB_REQUEST_RECIPIENT_ENDPOINT: + if (usbd_std_endpoint_req_handler(busid, setup, data, len) == false) { + rc = -1; + } + + break; + + default: + rc = -1; + break; + } + + return rc; +} + +/** + * @brief handler for class requests + * + * If a custom request handler was installed, this handler is called first. + * + * @param [in] setup The setup packet + * @param [in,out] data Data buffer + * @param [in,out] len Pointer to data length + * + * @return true if the request was handled successfully + */ +static int usbd_class_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) +{ + if ((setup->bmRequestType & USB_REQUEST_RECIPIENT_MASK) == USB_REQUEST_RECIPIENT_INTERFACE) { + for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { + struct usbd_interface *intf = g_usbd_core[busid].intf[i]; + + if (intf && intf->class_interface_handler && (intf->intf_num == (setup->wIndex & 0xFF))) { + return intf->class_interface_handler(busid, setup, data, len); + } + } + } else if ((setup->bmRequestType & USB_REQUEST_RECIPIENT_MASK) == USB_REQUEST_RECIPIENT_ENDPOINT) { + for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { + struct usbd_interface *intf = g_usbd_core[busid].intf[i]; + + if (intf && intf->class_endpoint_handler) { + return intf->class_endpoint_handler(busid, setup, data, len); + } + } + } + return -1; +} + +/** + * @brief handler for vendor requests + * + * If a custom request handler was installed, this handler is called first. + * + * @param [in] setup The setup packet + * @param [in,out] data Data buffer + * @param [in,out] len Pointer to data length + * + * @return true if the request was handled successfully + */ +static int usbd_vendor_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) +{ + uint32_t desclen; +#ifdef CONFIG_USBDEV_ADVANCE_DESC + if (g_usbd_core[busid].descriptors->msosv1_descriptor) { + if (setup->bRequest == g_usbd_core[busid].descriptors->msosv1_descriptor->vendor_code) { + switch (setup->wIndex) { + case 0x04: + desclen = g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id[0] + + (g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id[1] << 8) + + (g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id[2] << 16) + + (g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id[3] << 24); + + *data = (uint8_t *)g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id; + //memcpy(*data, g_usbd_core[busid].descriptors->msosv1_descriptor->compat_id, desclen); + *len = desclen; + return 0; + case 0x05: + desclen = g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue][0] + + (g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue][1] << 8) + + (g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue][2] << 16) + + (g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue][3] << 24); + + *data = (uint8_t *)g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue]; + //memcpy(*data, g_usbd_core[busid].descriptors->msosv1_descriptor->comp_id_property[setup->wValue], desclen); + *len = desclen; + return 0; + default: + USB_LOG_ERR("unknown vendor code\r\n"); + return -1; + } + } + } else if (g_usbd_core[busid].descriptors->msosv2_descriptor) { + if (setup->bRequest == g_usbd_core[busid].descriptors->msosv2_descriptor->vendor_code) { + switch (setup->wIndex) { + case WINUSB_REQUEST_GET_DESCRIPTOR_SET: + desclen = g_usbd_core[busid].descriptors->msosv2_descriptor->compat_id_len; + *data = (uint8_t *)g_usbd_core[busid].descriptors->msosv2_descriptor->compat_id; + //memcpy(*data, g_usbd_core[busid].descriptors->msosv2_descriptor->compat_id, desclen); + *len = g_usbd_core[busid].descriptors->msosv2_descriptor->compat_id_len; + return 0; + default: + USB_LOG_ERR("unknown vendor code\r\n"); + return -1; + } + } + } else if (g_usbd_core[busid].descriptors->webusb_url_descriptor) { + if (setup->bRequest == g_usbd_core[busid].descriptors->webusb_url_descriptor->vendor_code) { + switch (setup->wIndex) { + case WINUSB_REQUEST_GET_DESCRIPTOR_SET: + desclen = g_usbd_core[busid].descriptors->webusb_url_descriptor->string_len; + *data = (uint8_t *)g_usbd_core[busid].descriptors->webusb_url_descriptor->string; + //memcpy(*data, g_usbd_core[busid].descriptors->webusb_url_descriptor->string, desclen); + *len = desclen; + return 0; + default: + USB_LOG_ERR("unknown vendor code\r\n"); + return -1; + } + } + } +#else + if (g_usbd_core[busid].msosv1_desc) { + if (setup->bRequest == g_usbd_core[busid].msosv1_desc->vendor_code) { + switch (setup->wIndex) { + case 0x04: + *data = (uint8_t *)g_usbd_core[busid].msosv1_desc->compat_id; + desclen = g_usbd_core[busid].msosv1_desc->compat_id[0] + + (g_usbd_core[busid].msosv1_desc->compat_id[1] << 8) + + (g_usbd_core[busid].msosv1_desc->compat_id[2] << 16) + + (g_usbd_core[busid].msosv1_desc->compat_id[3] << 24); + //memcpy(*data, g_usbd_core[busid].msosv1_desc->compat_id, desclen); + *len = desclen; + return 0; + case 0x05: + *data = (uint8_t *)g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue]; + desclen = g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue][0] + + (g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue][1] << 8) + + (g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue][2] << 16) + + (g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue][3] << 24); + //memcpy(*data, g_usbd_core[busid].msosv1_desc->comp_id_property[setup->wValue], desclen); + *len = desclen; + return 0; + default: + USB_LOG_ERR("unknown vendor code\r\n"); + return -1; + } + } + } else if (g_usbd_core[busid].msosv2_desc) { + if (setup->bRequest == g_usbd_core[busid].msosv2_desc->vendor_code) { + switch (setup->wIndex) { + case WINUSB_REQUEST_GET_DESCRIPTOR_SET: + *data = (uint8_t *)g_usbd_core[busid].msosv2_desc->compat_id; + //memcpy(*data, g_usbd_core[busid].msosv2_desc->compat_id, g_usbd_core[busid].msosv2_desc->compat_id_len); + *len = g_usbd_core[busid].msosv2_desc->compat_id_len; + return 0; + default: + USB_LOG_ERR("unknown vendor code\r\n"); + return -1; + } + } + } +#endif + for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { + struct usbd_interface *intf = g_usbd_core[busid].intf[i]; + + if (intf && intf->vendor_handler && (intf->vendor_handler(busid, setup, data, len) == 0)) { + return 0; + } + } + + return -1; +} + +/** + * @brief handle setup request( standard/class/vendor/other) + * + * @param [in] setup The setup packet + * @param [in,out] data Data buffer + * @param [in,out] len Pointer to data length + * + * @return true if the request was handles successfully + */ +static bool usbd_setup_request_handler(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len) +{ + switch (setup->bmRequestType & USB_REQUEST_TYPE_MASK) { + case USB_REQUEST_STANDARD: + if (usbd_standard_request_handler(busid, setup, data, len) < 0) { + /* Ignore error log for getting Device Qualifier Descriptor request */ + if ((setup->bRequest == 0x06) && (setup->wValue == 0x0600)) { + //USB_LOG_DBG("Ignore DQD in fs\r\n"); + return false; + } + USB_LOG_ERR("standard request error\r\n"); + usbd_print_setup(setup); + return false; + } + break; + case USB_REQUEST_CLASS: + if (usbd_class_request_handler(busid, setup, data, len) < 0) { + USB_LOG_ERR("class request error\r\n"); + usbd_print_setup(setup); + return false; + } + break; + case USB_REQUEST_VENDOR: + if (usbd_vendor_request_handler(busid, setup, data, len) < 0) { + USB_LOG_ERR("vendor request error\r\n"); + usbd_print_setup(setup); + return false; + } + break; + + default: + return false; + } + + return true; +} + +static void usbd_class_event_notify_handler(uint8_t busid, uint8_t event, void *arg) +{ + for (uint8_t i = 0; i < g_usbd_core[busid].intf_offset; i++) { + struct usbd_interface *intf = g_usbd_core[busid].intf[i]; + + if (arg) { + struct usb_interface_descriptor *desc = (struct usb_interface_descriptor *)arg; + if (intf && intf->notify_handler && (desc->bInterfaceNumber == (intf->intf_num))) { + intf->notify_handler(busid, event, arg); + } + } else { + if (intf && intf->notify_handler) { + intf->notify_handler(busid, event, arg); + } + } + } +} + +void usbd_event_connect_handler(uint8_t busid) +{ + g_usbd_core[busid].event_handler(busid, USBD_EVENT_CONNECTED); +} + +void usbd_event_disconnect_handler(uint8_t busid) +{ + g_usbd_core[busid].event_handler(busid, USBD_EVENT_DISCONNECTED); +} + +void usbd_event_resume_handler(uint8_t busid) +{ + g_usbd_core[busid].event_handler(busid, USBD_EVENT_RESUME); +} + +void usbd_event_suspend_handler(uint8_t busid) +{ + g_usbd_core[busid].event_handler(busid, USBD_EVENT_SUSPEND); +} + +void usbd_event_reset_handler(uint8_t busid) +{ + usbd_set_address(busid, 0); + g_usbd_core[busid].configuration = 0; +#ifdef CONFIG_USBDEV_ADVANCE_DESC + g_usbd_core[busid].speed = USB_SPEED_UNKNOWN; +#endif + struct usb_endpoint_descriptor ep0; + + ep0.bLength = 7; + ep0.bDescriptorType = USB_DESCRIPTOR_TYPE_ENDPOINT; + ep0.wMaxPacketSize = USB_CTRL_EP_MPS; + ep0.bmAttributes = USB_ENDPOINT_TYPE_CONTROL; + ep0.bEndpointAddress = USB_CONTROL_IN_EP0; + ep0.bInterval = 0; + usbd_ep_open(busid, &ep0); + + ep0.bEndpointAddress = USB_CONTROL_OUT_EP0; + usbd_ep_open(busid, &ep0); + + usbd_class_event_notify_handler(busid, USBD_EVENT_RESET, NULL); + g_usbd_core[busid].event_handler(busid, USBD_EVENT_RESET); +} + +void usbd_event_ep0_setup_complete_handler(uint8_t busid, uint8_t *psetup) +{ + struct usb_setup_packet *setup = &g_usbd_core[busid].setup; + uint8_t *buf; + + memcpy(setup, psetup, 8); +#ifdef CONFIG_USBDEV_SETUP_LOG_PRINT + usbd_print_setup(setup); +#endif + if (setup->wLength > CONFIG_USBDEV_REQUEST_BUFFER_LEN) { + if ((setup->bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT) { + USB_LOG_ERR("Request buffer too small\r\n"); + usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); + return; + } + } + + g_usbd_core[busid].ep0_data_buf = g_usbd_core[busid].req_data; + g_usbd_core[busid].ep0_data_buf_residue = setup->wLength; + g_usbd_core[busid].ep0_data_buf_len = setup->wLength; + g_usbd_core[busid].zlp_flag = false; + buf = g_usbd_core[busid].ep0_data_buf; + + /* handle class request when all the data is received */ + if (setup->wLength && ((setup->bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) { + USB_LOG_DBG("Start reading %d bytes from ep0\r\n", setup->wLength); + usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, g_usbd_core[busid].ep0_data_buf, setup->wLength); + return; + } + + /* Ask installed handler to process request */ + if (!usbd_setup_request_handler(busid, setup, &buf, &g_usbd_core[busid].ep0_data_buf_len)) { + usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); + return; + } + + /* Send smallest of requested and offered length */ + g_usbd_core[busid].ep0_data_buf_residue = MIN(g_usbd_core[busid].ep0_data_buf_len, setup->wLength); + if (g_usbd_core[busid].ep0_data_buf_residue > CONFIG_USBDEV_REQUEST_BUFFER_LEN) { + USB_LOG_ERR("Request buffer too small\r\n"); + usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); + return; + } + + /* use *data = xxx; g_usbd_core[busid].ep0_data_buf records real data address, we should copy data into ep0 buffer. + * Why we should copy once? because some chips are not access to flash with dma if real data address is in flash address(such as ch32). + */ + if (buf != g_usbd_core[busid].ep0_data_buf) { +#ifdef CONFIG_USBDEV_EP0_INDATA_NO_COPY + g_usbd_core[busid].ep0_data_buf = buf; +#else + memcpy(g_usbd_core[busid].ep0_data_buf, buf, g_usbd_core[busid].ep0_data_buf_residue); +#endif + } else { + /* use memcpy(*data, xxx, len); has copied into ep0 buffer, we do nothing */ + } + + /* Send data or status to host */ + usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, g_usbd_core[busid].ep0_data_buf, g_usbd_core[busid].ep0_data_buf_residue); + /* + * Set ZLP flag when host asks for a bigger length and the data size is + * multiplier of USB_CTRL_EP_MPS, to indicate the transfer done after zlp + * sent. + */ + if ((setup->wLength > g_usbd_core[busid].ep0_data_buf_len) && (!(g_usbd_core[busid].ep0_data_buf_len % USB_CTRL_EP_MPS))) { + g_usbd_core[busid].zlp_flag = true; + USB_LOG_DBG("EP0 Set zlp\r\n"); + } +} + +void usbd_event_ep0_in_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + struct usb_setup_packet *setup = &g_usbd_core[busid].setup; + + g_usbd_core[busid].ep0_data_buf += nbytes; + g_usbd_core[busid].ep0_data_buf_residue -= nbytes; + + USB_LOG_DBG("EP0 send %d bytes, %d remained\r\n", nbytes, g_usbd_core[busid].ep0_data_buf_residue); + + if (g_usbd_core[busid].ep0_data_buf_residue != 0) { + /* Start sending the remain data */ + usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, g_usbd_core[busid].ep0_data_buf, g_usbd_core[busid].ep0_data_buf_residue); + } else { + if (g_usbd_core[busid].zlp_flag == true) { + g_usbd_core[busid].zlp_flag = false; + /* Send zlp to host */ + USB_LOG_DBG("EP0 Send zlp\r\n"); + usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, NULL, 0); + } else { + /* Satisfying three conditions will jump here. + * 1. send status completely + * 2. send zlp completely + * 3. send last data completely. + */ + if (setup->wLength && ((setup->bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_IN)) { + /* if all data has sent completely, start reading out status */ + usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, NULL, 0); + } + +#ifdef CONFIG_USBDEV_TEST_MODE + if (g_usbd_core[busid].test_req) { + usbd_execute_test_mode(busid, HI_BYTE(setup->wIndex)); + g_usbd_core[busid].test_req = false; + } +#endif + } + } +} + +void usbd_event_ep0_out_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + struct usb_setup_packet *setup = &g_usbd_core[busid].setup; + + if (nbytes > 0) { + g_usbd_core[busid].ep0_data_buf += nbytes; + g_usbd_core[busid].ep0_data_buf_residue -= nbytes; + + USB_LOG_DBG("EP0 recv %d bytes, %d remained\r\n", nbytes, g_usbd_core[busid].ep0_data_buf_residue); + + if (g_usbd_core[busid].ep0_data_buf_residue == 0) { + /* Received all, send data to handler */ + g_usbd_core[busid].ep0_data_buf = g_usbd_core[busid].req_data; + if (!usbd_setup_request_handler(busid, setup, &g_usbd_core[busid].ep0_data_buf, &g_usbd_core[busid].ep0_data_buf_len)) { + usbd_ep_set_stall(busid, USB_CONTROL_IN_EP0); + return; + } + + /*Send status to host*/ + usbd_ep_start_write(busid, USB_CONTROL_IN_EP0, NULL, 0); + } else { + /* Start reading the remain data */ + usbd_ep_start_read(busid, USB_CONTROL_OUT_EP0, g_usbd_core[busid].ep0_data_buf, g_usbd_core[busid].ep0_data_buf_residue); + } + } else { + /* Read out status completely, do nothing */ + USB_LOG_DBG("EP0 recv out status\r\n"); + } +} + +void usbd_event_ep_in_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + if (g_usbd_core[busid].tx_msg[ep & 0x7f].cb) { + g_usbd_core[busid].tx_msg[ep & 0x7f].cb(busid, ep, nbytes); + } +} + +void usbd_event_ep_out_complete_handler(uint8_t busid, uint8_t ep, uint32_t nbytes) +{ + if (g_usbd_core[busid].rx_msg[ep & 0x7f].cb) { + g_usbd_core[busid].rx_msg[ep & 0x7f].cb(busid, ep, nbytes); + } +} + +#ifdef CONFIG_USBDEV_ADVANCE_DESC +void usbd_desc_register(uint8_t busid, const struct usb_descriptor *desc) +{ + memset(&g_usbd_core[busid], 0, sizeof(struct usbd_core_priv)); + + g_usbd_core[busid].descriptors = desc; + g_usbd_core[busid].intf_offset = 0; + + g_usbd_core[busid].tx_msg[0].ep = 0x80; + g_usbd_core[busid].tx_msg[0].cb = usbd_event_ep0_in_complete_handler; + g_usbd_core[busid].rx_msg[0].ep = 0x00; + g_usbd_core[busid].rx_msg[0].cb = usbd_event_ep0_out_complete_handler; +} +#else +void usbd_desc_register(uint8_t busid, const uint8_t *desc) +{ + memset(&g_usbd_core[busid], 0, sizeof(struct usbd_core_priv)); + + g_usbd_core[busid].descriptors = desc; + g_usbd_core[busid].intf_offset = 0; + + g_usbd_core[busid].tx_msg[0].ep = 0x80; + g_usbd_core[busid].tx_msg[0].cb = usbd_event_ep0_in_complete_handler; + g_usbd_core[busid].rx_msg[0].ep = 0x00; + g_usbd_core[busid].rx_msg[0].cb = usbd_event_ep0_out_complete_handler; +} + +/* Register MS OS Descriptors version 1 */ +void usbd_msosv1_desc_register(uint8_t busid, struct usb_msosv1_descriptor *desc) +{ + g_usbd_core[busid].msosv1_desc = desc; +} + +/* Register MS OS Descriptors version 2 */ +void usbd_msosv2_desc_register(uint8_t busid, struct usb_msosv2_descriptor *desc) +{ + g_usbd_core[busid].msosv2_desc = desc; +} + +void usbd_bos_desc_register(uint8_t busid, struct usb_bos_descriptor *desc) +{ + g_usbd_core[busid].bos_desc = desc; +} +#endif + +void usbd_add_interface(uint8_t busid, struct usbd_interface *intf) +{ + intf->intf_num = g_usbd_core[busid].intf_offset; + g_usbd_core[busid].intf[g_usbd_core[busid].intf_offset] = intf; + g_usbd_core[busid].intf_offset++; +} + +void usbd_add_endpoint(uint8_t busid, struct usbd_endpoint *ep) +{ + if (ep->ep_addr & 0x80) { + g_usbd_core[busid].tx_msg[ep->ep_addr & 0x7f].ep = ep->ep_addr; + g_usbd_core[busid].tx_msg[ep->ep_addr & 0x7f].cb = ep->ep_cb; + } else { + g_usbd_core[busid].rx_msg[ep->ep_addr & 0x7f].ep = ep->ep_addr; + g_usbd_core[busid].rx_msg[ep->ep_addr & 0x7f].cb = ep->ep_cb; + } +} + +uint16_t usbd_get_ep_mps(uint8_t busid, uint8_t ep) +{ + if (ep & 0x80) { + return g_usbd_core[busid].tx_msg[ep & 0x7f].ep_mps; + } else { + return g_usbd_core[busid].rx_msg[ep & 0x7f].ep_mps; + } +} + +uint8_t usbd_get_ep_mult(uint8_t busid, uint8_t ep) +{ + if (ep & 0x80) { + return g_usbd_core[busid].tx_msg[ep & 0x7f].ep_mult; + } else { + return g_usbd_core[busid].rx_msg[ep & 0x7f].ep_mult; + } +} + +bool usb_device_is_configured(uint8_t busid) +{ + return g_usbd_core[busid].configuration; +} + +int usbd_initialize(uint8_t busid, uint32_t reg_base, void (*event_handler)(uint8_t busid, uint8_t event)) +{ + int ret; + struct usbd_bus *bus; + + if (busid >= CONFIG_USBDEV_MAX_BUS) { + USB_LOG_ERR("bus overflow\r\n"); + while (1) { + } + } + + bus = &g_usbdev_bus[busid]; + bus->reg_base = reg_base; + + g_usbd_core[busid].event_handler = event_handler; + ret = usb_dc_init(busid); + usbd_class_event_notify_handler(busid, USBD_EVENT_INIT, NULL); + g_usbd_core[busid].event_handler(busid, USBD_EVENT_INIT); + return ret; +} + +int usbd_deinitialize(uint8_t busid) +{ + g_usbd_core[busid].intf_offset = 0; + usb_dc_deinit(busid); + usbd_class_event_notify_handler(busid, USBD_EVENT_DEINIT, NULL); + g_usbd_core[busid].event_handler(busid, USBD_EVENT_DEINIT); + return 0; +} diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/core/usbd_core.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/core/usbd_core.h similarity index 94% rename from stm32f0_cherryusb/3rdParty/CherryUSB/core/usbd_core.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/core/usbd_core.h index 0e04a3c..01335f2 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/core/usbd_core.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/core/usbd_core.h @@ -1,108 +1,112 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USBD_CORE_H -#define USBD_CORE_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include -#include -#include - -#include "usb_config.h" -#include "usb_util.h" -#include "usb_errno.h" -#include "usb_def.h" -#include "usb_list.h" -#include "usb_log.h" -#include "usb_dc.h" - -enum usbd_event_type { - /* USB DCD IRQ */ - USBD_EVENT_ERROR, /** USB error reported by the controller */ - USBD_EVENT_RESET, /** USB reset */ - USBD_EVENT_SOF, /** Start of Frame received */ - USBD_EVENT_CONNECTED, /** USB connected*/ - USBD_EVENT_DISCONNECTED, /** USB disconnected */ - USBD_EVENT_SUSPEND, /** USB connection suspended by the HOST */ - USBD_EVENT_RESUME, /** USB connection resumed by the HOST */ - - /* USB DEVICE STATUS */ - USBD_EVENT_CONFIGURED, /** USB configuration done */ - USBD_EVENT_SET_INTERFACE, /** USB interface selected */ - USBD_EVENT_SET_REMOTE_WAKEUP, /** USB set remote wakeup */ - USBD_EVENT_CLR_REMOTE_WAKEUP, /** USB clear remote wakeup */ - USBD_EVENT_INIT, /** USB init done when call usbd_initialize */ - USBD_EVENT_DEINIT, /** USB deinit done when call usbd_deinitialize */ - USBD_EVENT_UNKNOWN -}; - -typedef int (*usbd_request_handler)(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len); -typedef void (*usbd_endpoint_callback)(uint8_t busid, uint8_t ep, uint32_t nbytes); -typedef void (*usbd_notify_handler)(uint8_t busid, uint8_t event, void *arg); - -struct usbd_endpoint { - uint8_t ep_addr; - usbd_endpoint_callback ep_cb; -}; - -struct usbd_interface { - usbd_request_handler class_interface_handler; - usbd_request_handler class_endpoint_handler; - usbd_request_handler vendor_handler; - usbd_notify_handler notify_handler; - const uint8_t *hid_report_descriptor; - uint32_t hid_report_descriptor_len; - uint8_t intf_num; -}; - -struct usb_descriptor { - const uint8_t *(*device_descriptor_callback)(uint8_t speed); - const uint8_t *(*config_descriptor_callback)(uint8_t speed); - const uint8_t *(*device_quality_descriptor_callback)(uint8_t speed); - const uint8_t *(*other_speed_descriptor_callback)(uint8_t speed); - const uint8_t *(*string_descriptor_callback)(uint8_t speed, uint8_t index); - const struct usb_msosv1_descriptor *msosv1_descriptor; - const struct usb_msosv2_descriptor *msosv2_descriptor; - const struct usb_webusb_url_ex_descriptor *webusb_url_descriptor; - const struct usb_bos_descriptor *bos_descriptor; -}; - -struct usbd_bus { - uint8_t busid; - uint32_t reg_base; -}; - -extern struct usbd_bus g_usbdev_bus[]; - -#ifdef USBD_IRQHandler -#error USBD_IRQHandler is obsolete, please call USBD_IRQHandler(xxx) in your irq -#endif - -#ifdef CONFIG_USBDEV_ADVANCE_DESC -void usbd_desc_register(uint8_t busid, const struct usb_descriptor *desc); -#else -void usbd_desc_register(uint8_t busid, const uint8_t *desc); -void usbd_msosv1_desc_register(uint8_t busid, struct usb_msosv1_descriptor *desc); -void usbd_msosv2_desc_register(uint8_t busid, struct usb_msosv2_descriptor *desc); -void usbd_bos_desc_register(uint8_t busid, struct usb_bos_descriptor *desc); -#endif - -void usbd_add_interface(uint8_t busid, struct usbd_interface *intf); -void usbd_add_endpoint(uint8_t busid, struct usbd_endpoint *ep); - -bool usb_device_is_configured(uint8_t busid); -int usbd_initialize(uint8_t busid, uint32_t reg_base, void (*event_handler)(uint8_t busid, uint8_t event)); -int usbd_deinitialize(uint8_t busid); - -#ifdef __cplusplus -} -#endif - -#endif /* USBD_CORE_H */ +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef USBD_CORE_H +#define USBD_CORE_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include + +#include "usb_config.h" +#include "usb_util.h" +#include "usb_errno.h" +#include "usb_def.h" +#include "usb_list.h" +#include "usb_log.h" +#include "usb_dc.h" +#include "usb_memcpy.h" + +enum usbd_event_type { + /* USB DCD IRQ */ + USBD_EVENT_ERROR, /** USB error reported by the controller */ + USBD_EVENT_RESET, /** USB reset */ + USBD_EVENT_SOF, /** Start of Frame received */ + USBD_EVENT_CONNECTED, /** USB connected*/ + USBD_EVENT_DISCONNECTED, /** USB disconnected */ + USBD_EVENT_SUSPEND, /** USB connection suspended by the HOST */ + USBD_EVENT_RESUME, /** USB connection resumed by the HOST */ + + /* USB DEVICE STATUS */ + USBD_EVENT_CONFIGURED, /** USB configuration done */ + USBD_EVENT_SET_INTERFACE, /** USB interface selected */ + USBD_EVENT_SET_REMOTE_WAKEUP, /** USB set remote wakeup */ + USBD_EVENT_CLR_REMOTE_WAKEUP, /** USB clear remote wakeup */ + USBD_EVENT_INIT, /** USB init done when call usbd_initialize */ + USBD_EVENT_DEINIT, /** USB deinit done when call usbd_deinitialize */ + USBD_EVENT_UNKNOWN +}; + +typedef int (*usbd_request_handler)(uint8_t busid, struct usb_setup_packet *setup, uint8_t **data, uint32_t *len); +typedef void (*usbd_endpoint_callback)(uint8_t busid, uint8_t ep, uint32_t nbytes); +typedef void (*usbd_notify_handler)(uint8_t busid, uint8_t event, void *arg); + +struct usbd_endpoint { + uint8_t ep_addr; + usbd_endpoint_callback ep_cb; +}; + +struct usbd_interface { + usbd_request_handler class_interface_handler; + usbd_request_handler class_endpoint_handler; + usbd_request_handler vendor_handler; + usbd_notify_handler notify_handler; + const uint8_t *hid_report_descriptor; + uint32_t hid_report_descriptor_len; + uint8_t intf_num; +}; + +struct usb_descriptor { + const uint8_t *(*device_descriptor_callback)(uint8_t speed); + const uint8_t *(*config_descriptor_callback)(uint8_t speed); + const uint8_t *(*device_quality_descriptor_callback)(uint8_t speed); + const uint8_t *(*other_speed_descriptor_callback)(uint8_t speed); + const char *(*string_descriptor_callback)(uint8_t speed, uint8_t index); + const struct usb_msosv1_descriptor *msosv1_descriptor; + const struct usb_msosv2_descriptor *msosv2_descriptor; + const struct usb_webusb_url_ex_descriptor *webusb_url_descriptor; + const struct usb_bos_descriptor *bos_descriptor; +}; + +struct usbd_bus { + uint8_t busid; + uint32_t reg_base; +}; + +extern struct usbd_bus g_usbdev_bus[]; + +#ifdef USBD_IRQHandler +#error USBD_IRQHandler is obsolete, please call USBD_IRQHandler(xxx) in your irq +#endif + +#ifdef CONFIG_USBDEV_ADVANCE_DESC +void usbd_desc_register(uint8_t busid, const struct usb_descriptor *desc); +#else +void usbd_desc_register(uint8_t busid, const uint8_t *desc); +void usbd_msosv1_desc_register(uint8_t busid, struct usb_msosv1_descriptor *desc); +void usbd_msosv2_desc_register(uint8_t busid, struct usb_msosv2_descriptor *desc); +void usbd_bos_desc_register(uint8_t busid, struct usb_bos_descriptor *desc); +#endif + +void usbd_add_interface(uint8_t busid, struct usbd_interface *intf); +void usbd_add_endpoint(uint8_t busid, struct usbd_endpoint *ep); + +uint16_t usbd_get_ep_mps(uint8_t busid, uint8_t ep); +uint8_t usbd_get_ep_mult(uint8_t busid, uint8_t ep); +bool usb_device_is_configured(uint8_t busid); + +int usbd_initialize(uint8_t busid, uint32_t reg_base, void (*event_handler)(uint8_t busid, uint8_t event)); +int usbd_deinitialize(uint8_t busid); + +#ifdef __cplusplus +} +#endif + +#endif /* USBD_CORE_H */ diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/port/fsdev/README.md b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/port/fsdev/README.md similarity index 97% rename from stm32f0_cherryusb/3rdParty/CherryUSB/port/fsdev/README.md rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/port/fsdev/README.md index 891ddea..ecb9c33 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/port/fsdev/README.md +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/port/fsdev/README.md @@ -1,33 +1,33 @@ -# Note - -## Support Chip List - -## STM32 - -- STM32F042x6、STM32F048xx、STM32F070x6、STM32F070xb、STM32F072xb、STM32F078xx -- STM32F102x6、STM32F102xb、STM32F103x6、STM32F103xb、STM32F103xe、STM32F103xg -- STM32F302x8、STM32F302xc、STM32F302xe、STM32F373xc -- STM32g431xx、STM32g441xx、STM32g471xx、STM32g483xx、STM32g484xx、STM32gbk1cb -- STM32l052xx、STM32l053xx、STM32l062xx、STM32l063xx、STM32l072xx、STM32l073xx、STM32l082xx、STM32l083xx -- STM32l100xb、STM32l100xba、STM32l100xc、STM32l151xb、STM32l151xba、STM32l151xc、STM32l151xca、STM32l151xd、STM32l151xdx、STM32l151xe、STM32l152xb、STM32l152xba、STM32l152xc、STM32l152xa、STM32l152xd、STM32l152xdx、STM32l152xe、STM32l162xc、STM32l162xca、STM32l162xd、STM32l162xdx、STM32l162xe -- STM32l412xx、STM32l422xx、STM32l432xx、STM32l433xx、STM32l442xx、STM32l452xx、STM32l462xx -- STM32wb5mxx、STM32wb35xx、STM32wb55xx - -## AT32 - -- AT32F403xx、AT32F407xx、AT32F413xx - -## APM32 - -- APM32f10x - -## GD32 - -- GD32F10X_MD、GD32F10X_HD、GD32F10X_XD -- GD32F30X_HD、GD32F30X_XD -- GD32F350 -- GD32F407 - -## CH32 - -- CH32F10x、CH32V10x +# Note + +## Support Chip List + +## STM32 + +- STM32F042x6、STM32F048xx、STM32F070x6、STM32F070xb、STM32F072xb、STM32F078xx +- STM32F102x6、STM32F102xb、STM32F103x6、STM32F103xb、STM32F103xe、STM32F103xg +- STM32F302x8、STM32F302xc、STM32F302xe、STM32F373xc +- STM32g431xx、STM32g441xx、STM32g471xx、STM32g483xx、STM32g484xx、STM32gbk1cb +- STM32l052xx、STM32l053xx、STM32l062xx、STM32l063xx、STM32l072xx、STM32l073xx、STM32l082xx、STM32l083xx +- STM32l100xb、STM32l100xba、STM32l100xc、STM32l151xb、STM32l151xba、STM32l151xc、STM32l151xca、STM32l151xd、STM32l151xdx、STM32l151xe、STM32l152xb、STM32l152xba、STM32l152xc、STM32l152xa、STM32l152xd、STM32l152xdx、STM32l152xe、STM32l162xc、STM32l162xca、STM32l162xd、STM32l162xdx、STM32l162xe +- STM32l412xx、STM32l422xx、STM32l432xx、STM32l433xx、STM32l442xx、STM32l452xx、STM32l462xx +- STM32wb5mxx、STM32wb35xx、STM32wb55xx + +## AT32 + +- AT32F403xx、AT32F407xx、AT32F413xx + +## APM32 + +- APM32f10x + +## GD32 + +- GD32F10X_MD、GD32F10X_HD、GD32F10X_XD +- GD32F30X_HD、GD32F30X_XD +- GD32F350 +- GD32F407 + +## CH32 + +- CH32F10x、CH32V10x diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/port/fsdev/usb_dc_fsdev.c b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/port/fsdev/usb_dc_fsdev.c similarity index 95% rename from stm32f0_cherryusb/3rdParty/CherryUSB/port/fsdev/usb_dc_fsdev.c rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/port/fsdev/usb_dc_fsdev.c index d77c04d..b2dd9cc 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/port/fsdev/usb_dc_fsdev.c +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/port/fsdev/usb_dc_fsdev.c @@ -1,543 +1,557 @@ -#include "usbd_core.h" - -#ifndef CONFIG_USBDEV_FSDEV_PMA_ACCESS -#error "please define CONFIG_USBDEV_FSDEV_PMA_ACCESS in usb_config.h" -#endif - -#define PMA_ACCESS CONFIG_USBDEV_FSDEV_PMA_ACCESS -#include "usb_fsdev_reg.h" - -#ifndef CONFIG_USB_FSDEV_RAM_SIZE -#define CONFIG_USB_FSDEV_RAM_SIZE 512 -#endif - -#ifndef CONFIG_USBDEV_EP_NUM -#define CONFIG_USBDEV_EP_NUM 8 -#endif - -#define USB ((USB_TypeDef *)g_usbdev_bus[0].reg_base) - -#define USB_BTABLE_SIZE (8 * CONFIG_USBDEV_EP_NUM) - -static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); -static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); - -/* Endpoint state */ -struct fsdev_ep_state { - uint16_t ep_mps; /* Endpoint max packet size */ - uint8_t ep_type; /* Endpoint type */ - uint8_t ep_stalled; /* Endpoint stall flag */ - uint8_t ep_enable; /* Endpoint enable */ - uint16_t ep_pma_buf_len; /* Previously allocated buffer size */ - uint16_t ep_pma_addr; /* ep pmd allocated addr */ - uint8_t *xfer_buf; - uint32_t xfer_len; - uint32_t actual_xfer_len; -}; - -/* Driver state */ -struct fsdev_udc { - struct usb_setup_packet setup; - volatile uint8_t dev_addr; /*!< USB Address */ - volatile uint32_t pma_offset; /*!< pma offset */ - struct fsdev_ep_state in_ep[CONFIG_USBDEV_EP_NUM]; /*!< IN endpoint parameters*/ - struct fsdev_ep_state out_ep[CONFIG_USBDEV_EP_NUM]; /*!< OUT endpoint parameters */ -} g_fsdev_udc; - -__WEAK void usb_dc_low_level_init(void) -{ -} - -__WEAK void usb_dc_low_level_deinit(void) -{ -} - -int usb_dc_init(uint8_t busid) -{ - usb_dc_low_level_init(); - - /* Init Device */ - /* CNTR_FRES = 1 */ - USB->CNTR = (uint16_t)USB_CNTR_FRES; - - /* CNTR_FRES = 0 */ - USB->CNTR = 0U; - - /* Clear pending interrupts */ - USB->ISTR = 0U; - - /*Set Btable Address*/ - USB->BTABLE = BTABLE_ADDRESS; - - uint32_t winterruptmask; - - /* Set winterruptmask variable */ - winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | - USB_CNTR_SUSPM | USB_CNTR_ERRM | - USB_CNTR_SOFM | USB_CNTR_ESOFM | - USB_CNTR_RESETM; - - /* Set interrupt mask */ - USB->CNTR = (uint16_t)winterruptmask; - - /* Enabling DP Pull-UP bit to Connect internal PU resistor on USB DP line */ - USB->BCDR |= (uint16_t)USB_BCDR_DPPU; - - return 0; -} - -int usb_dc_deinit(uint8_t busid) -{ - /* disable all interrupts and force USB reset */ - USB->CNTR = (uint16_t)USB_CNTR_FRES; - - /* clear interrupt status register */ - USB->ISTR = 0U; - - /* switch-off device */ - USB->CNTR = (uint16_t)(USB_CNTR_FRES | USB_CNTR_PDWN); - - usb_dc_low_level_deinit(); - return 0; -} - -int usbd_set_address(uint8_t busid, const uint8_t addr) -{ - if (addr == 0U) { - /* set device address and enable function */ - USB->DADDR = (uint16_t)USB_DADDR_EF; - } - - g_fsdev_udc.dev_addr = addr; - return 0; -} - -uint8_t usbd_get_port_speed(uint8_t busid, const uint8_t port) -{ - return USB_SPEED_FULL; -} - -int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress); - - if (ep_idx > (CONFIG_USBDEV_EP_NUM - 1)) { - USB_LOG_ERR("Ep addr %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } - - uint16_t wEpRegVal; - - /* initialize Endpoint */ - switch (USB_GET_ENDPOINT_TYPE(ep->bmAttributes)) { - case USB_ENDPOINT_TYPE_CONTROL: - wEpRegVal = USB_EP_CONTROL; - break; - - case USB_ENDPOINT_TYPE_BULK: - wEpRegVal = USB_EP_BULK; - break; - - case USB_ENDPOINT_TYPE_INTERRUPT: - wEpRegVal = USB_EP_INTERRUPT; - break; - - case USB_ENDPOINT_TYPE_ISOCHRONOUS: - wEpRegVal = USB_EP_ISOCHRONOUS; - break; - - default: - break; - } - - PCD_SET_EPTYPE(USB, ep_idx, wEpRegVal); - - PCD_SET_EP_ADDRESS(USB, ep_idx, ep_idx); - if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) { - g_fsdev_udc.out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - g_fsdev_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - g_fsdev_udc.out_ep[ep_idx].ep_enable = true; - if (g_fsdev_udc.out_ep[ep_idx].ep_mps > g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len) { - /* PMA address must be halfword-aligned */ - if (g_fsdev_udc.pma_offset % 2) { - g_fsdev_udc.pma_offset ++; - } - if (g_fsdev_udc.pma_offset + g_fsdev_udc.out_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) { - USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } - g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - g_fsdev_udc.out_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset; - /*Set the endpoint Receive buffer address */ - PCD_SET_EP_RX_ADDRESS(USB, ep_idx, g_fsdev_udc.pma_offset); - g_fsdev_udc.pma_offset += USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - } - /*Set the endpoint Receive buffer counter*/ - PCD_SET_EP_RX_CNT(USB, ep_idx, USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize)); - PCD_CLEAR_RX_DTOG(USB, ep_idx); - } else { - g_fsdev_udc.in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - g_fsdev_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); - g_fsdev_udc.in_ep[ep_idx].ep_enable = true; - if (g_fsdev_udc.in_ep[ep_idx].ep_mps > g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len) { - /* PMA address must be halfword-aligned */ - if (g_fsdev_udc.pma_offset % 2) { - g_fsdev_udc.pma_offset ++; - } - if (g_fsdev_udc.pma_offset + g_fsdev_udc.in_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) { - USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress); - return -1; - } - g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - g_fsdev_udc.in_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset; - /*Set the endpoint Transmit buffer address */ - PCD_SET_EP_TX_ADDRESS(USB, ep_idx, g_fsdev_udc.pma_offset); - g_fsdev_udc.pma_offset += USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); - } - - PCD_CLEAR_TX_DTOG(USB, ep_idx); - if (USB_GET_ENDPOINT_TYPE(ep->bmAttributes) != USB_ENDPOINT_TYPE_ISOCHRONOUS) { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_NAK); - } else { - /* Configure TX Endpoint to disabled state */ - PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_DIS); - } - } - return 0; -} - -int usbd_ep_close(uint8_t busid, const uint8_t ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (USB_EP_DIR_IS_OUT(ep)) { - PCD_CLEAR_RX_DTOG(USB, ep_idx); - - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_DIS); - } else { - PCD_CLEAR_TX_DTOG(USB, ep_idx); - - /* Configure DISABLE status for the Endpoint*/ - PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_DIS); - } - return 0; -} - -int usbd_ep_set_stall(uint8_t busid, const uint8_t ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (USB_EP_DIR_IS_OUT(ep)) { - PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_STALL); - } else { - PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_STALL); - } - return 0; -} - -int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (USB_EP_DIR_IS_OUT(ep)) { - PCD_CLEAR_RX_DTOG(USB, ep_idx); - /* Configure VALID status for the Endpoint */ - PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID); - } else { - PCD_CLEAR_TX_DTOG(USB, ep_idx); - - if (g_fsdev_udc.in_ep[ep_idx].ep_type != USB_ENDPOINT_TYPE_ISOCHRONOUS) { - /* Configure NAK status for the Endpoint */ - PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_NAK); - } - } - return 0; -} - -int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled) -{ - if (USB_EP_DIR_IS_OUT(ep)) { - } else { - } - return 0; -} - -int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (!data && data_len) { - return -1; - } - - if (!g_fsdev_udc.in_ep[ep_idx].ep_enable) { - return -2; - } - - g_fsdev_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data; - g_fsdev_udc.in_ep[ep_idx].xfer_len = data_len; - g_fsdev_udc.in_ep[ep_idx].actual_xfer_len = 0; - - data_len = MIN(data_len, g_fsdev_udc.in_ep[ep_idx].ep_mps); - - fsdev_write_pma(USB, (uint8_t *)data, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)data_len); - PCD_SET_EP_TX_CNT(USB, ep_idx, (uint16_t)data_len); - PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_VALID); - - return 0; -} - -int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len) -{ - uint8_t ep_idx = USB_EP_GET_IDX(ep); - - if (!data && data_len) { - return -1; - } - if (!g_fsdev_udc.out_ep[ep_idx].ep_enable) { - return -2; - } - - g_fsdev_udc.out_ep[ep_idx].xfer_buf = data; - g_fsdev_udc.out_ep[ep_idx].xfer_len = data_len; - g_fsdev_udc.out_ep[ep_idx].actual_xfer_len = 0; - - PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID); - - return 0; -} - -void USBD_IRQHandler(uint8_t busid) -{ - uint16_t wIstr, wEPVal; - uint8_t ep_idx; - uint8_t read_count; - uint16_t write_count; - uint16_t store_ep[8]; - - wIstr = USB->ISTR; - if (wIstr & USB_ISTR_CTR) { - while ((USB->ISTR & USB_ISTR_CTR) != 0U) { - wIstr = USB->ISTR; - - /* extract highest priority endpoint number */ - ep_idx = (uint8_t)(wIstr & USB_ISTR_EP_ID); - - if (ep_idx == 0U) { - if ((wIstr & USB_ISTR_DIR) == 0U) { - PCD_CLEAR_TX_EP_CTR(USB, ep_idx); - - write_count = PCD_GET_EP_TX_CNT(USB, ep_idx); - - g_fsdev_udc.in_ep[ep_idx].xfer_buf += write_count; - g_fsdev_udc.in_ep[ep_idx].xfer_len -= write_count; - g_fsdev_udc.in_ep[ep_idx].actual_xfer_len += write_count; - - usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_fsdev_udc.in_ep[ep_idx].actual_xfer_len); - - if (g_fsdev_udc.setup.wLength == 0) { - /* In status, start reading setup */ - usbd_ep_start_read(0, 0x00, NULL, 0); - } else if (g_fsdev_udc.setup.wLength && ((g_fsdev_udc.setup.bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) { - /* In status, start reading setup */ - usbd_ep_start_read(0, 0x00, NULL, 0); - } - - if ((g_fsdev_udc.dev_addr > 0U) && (write_count == 0U)) { - USB->DADDR = ((uint16_t)g_fsdev_udc.dev_addr | USB_DADDR_EF); - g_fsdev_udc.dev_addr = 0U; - } - - } else { - wEPVal = PCD_GET_ENDPOINT(USB, ep_idx); - - if ((wEPVal & USB_EP_SETUP) != 0U) { - PCD_CLEAR_RX_EP_CTR(USB, ep_idx); - - read_count = PCD_GET_EP_RX_CNT(USB, ep_idx); - fsdev_read_pma(USB, (uint8_t *)&g_fsdev_udc.setup, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count); - - usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&g_fsdev_udc.setup); - - } else if ((wEPVal & USB_EP_CTR_RX) != 0U) { - PCD_CLEAR_RX_EP_CTR(USB, ep_idx); - - read_count = PCD_GET_EP_RX_CNT(USB, ep_idx); - - fsdev_read_pma(USB, g_fsdev_udc.out_ep[ep_idx].xfer_buf, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count); - - g_fsdev_udc.out_ep[ep_idx].xfer_buf += read_count; - g_fsdev_udc.out_ep[ep_idx].xfer_len -= read_count; - g_fsdev_udc.out_ep[ep_idx].actual_xfer_len += read_count; - - usbd_event_ep_out_complete_handler(0, ep_idx, g_fsdev_udc.out_ep[ep_idx].actual_xfer_len); - - if (read_count == 0) { - /* Out status, start reading setup */ - usbd_ep_start_read(0, 0x00, NULL, 0); - } - } - } - } else { - wEPVal = PCD_GET_ENDPOINT(USB, ep_idx); - - if ((wEPVal & USB_EP_CTR_RX) != 0U) { - PCD_CLEAR_RX_EP_CTR(USB, ep_idx); - read_count = PCD_GET_EP_RX_CNT(USB, ep_idx); - fsdev_read_pma(USB, g_fsdev_udc.out_ep[ep_idx].xfer_buf, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count); - g_fsdev_udc.out_ep[ep_idx].xfer_buf += read_count; - g_fsdev_udc.out_ep[ep_idx].xfer_len -= read_count; - g_fsdev_udc.out_ep[ep_idx].actual_xfer_len += read_count; - - if ((read_count < g_fsdev_udc.out_ep[ep_idx].ep_mps) || - (g_fsdev_udc.out_ep[ep_idx].xfer_len == 0)) { - usbd_event_ep_out_complete_handler(0, ep_idx, g_fsdev_udc.out_ep[ep_idx].actual_xfer_len); - } else { - PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID); - } - } - - if ((wEPVal & USB_EP_CTR_TX) != 0U) { - PCD_CLEAR_TX_EP_CTR(USB, ep_idx); - write_count = PCD_GET_EP_TX_CNT(USB, ep_idx); - - g_fsdev_udc.in_ep[ep_idx].xfer_buf += write_count; - g_fsdev_udc.in_ep[ep_idx].xfer_len -= write_count; - g_fsdev_udc.in_ep[ep_idx].actual_xfer_len += write_count; - - if (g_fsdev_udc.in_ep[ep_idx].xfer_len == 0) { - usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_fsdev_udc.in_ep[ep_idx].actual_xfer_len); - } else { - write_count = MIN(g_fsdev_udc.in_ep[ep_idx].xfer_len, g_fsdev_udc.in_ep[ep_idx].ep_mps); - fsdev_write_pma(USB, g_fsdev_udc.in_ep[ep_idx].xfer_buf, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)write_count); - PCD_SET_EP_TX_CNT(USB, ep_idx, write_count); - PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_VALID); - } - } - } - } - } - if (wIstr & USB_ISTR_RESET) { - memset(&g_fsdev_udc, 0, sizeof(struct fsdev_udc)); - g_fsdev_udc.pma_offset = USB_BTABLE_SIZE; - usbd_event_reset_handler(0); - /* start reading setup packet */ - PCD_SET_EP_RX_STATUS(USB, 0, USB_EP_RX_VALID); - USB->ISTR &= (uint16_t)(~USB_ISTR_RESET); - } - if (wIstr & USB_ISTR_PMAOVR) { - USB->ISTR &= (uint16_t)(~USB_ISTR_PMAOVR); - } - if (wIstr & USB_ISTR_ERR) { - USB->ISTR &= (uint16_t)(~USB_ISTR_ERR); - } - if (wIstr & USB_ISTR_WKUP) { - USB->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE); - USB->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); - - USB->ISTR &= (uint16_t)(~USB_ISTR_WKUP); - } - if (wIstr & USB_ISTR_SUSP) { - /* WA: To Clear Wakeup flag if raised with suspend signal */ - - /* Store Endpoint register */ - for (uint8_t i = 0U; i < 8U; i++) { - store_ep[i] = PCD_GET_ENDPOINT(USB, i); - } - - /* FORCE RESET */ - USB->CNTR |= (uint16_t)(USB_CNTR_FRES); - - /* CLEAR RESET */ - USB->CNTR &= (uint16_t)(~USB_CNTR_FRES); - - /* wait for reset flag in ISTR */ - while ((USB->ISTR & USB_ISTR_RESET) == 0U) { - } - - /* Clear Reset Flag */ - USB->ISTR &= (uint16_t)(~USB_ISTR_RESET); - /* Restore Registre */ - for (uint8_t i = 0U; i < 8U; i++) { - PCD_SET_ENDPOINT(USB, i, store_ep[i]); - } - - /* Force low-power mode in the macrocell */ - USB->CNTR |= (uint16_t)USB_CNTR_FSUSP; - - /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ - USB->ISTR &= (uint16_t)(~USB_ISTR_SUSP); - - USB->CNTR |= (uint16_t)USB_CNTR_LP_MODE; - } - if (wIstr & USB_ISTR_SOF) { - USB->ISTR &= (uint16_t)(~USB_ISTR_SOF); - } - if (wIstr & USB_ISTR_ESOF) { - USB->ISTR &= (uint16_t)(~USB_ISTR_ESOF); - } -} - -static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; - uint32_t BaseAddr = (uint32_t)USBx; - uint32_t i, temp1, temp2; - __IO uint16_t *pdwVal; - uint8_t *pBuf = pbUsrBuf; - - pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); - - for (i = n; i != 0U; i--) { - temp1 = *pBuf; - pBuf++; - temp2 = temp1 | ((uint16_t)((uint16_t)*pBuf << 8)); - *pdwVal = (uint16_t)temp2; - pdwVal++; - -#if PMA_ACCESS > 1U - pdwVal++; -#endif - - pBuf++; - } -} - -/** - * @brief Copy data from packet memory area (PMA) to user memory buffer - * @param USBx USB peripheral instance register address. - * @param pbUsrBuf pointer to user memory area. - * @param wPMABufAddr address into PMA. - * @param wNBytes no. of bytes to be copied. - * @retval None - */ -static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) -{ - uint32_t n = (uint32_t)wNBytes >> 1; - uint32_t BaseAddr = (uint32_t)USBx; - uint32_t i, temp; - __IO uint16_t *pdwVal; - uint8_t *pBuf = pbUsrBuf; - - pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); - - for (i = n; i != 0U; i--) { - temp = *(__IO uint16_t *)pdwVal; - pdwVal++; - *pBuf = (uint8_t)((temp >> 0) & 0xFFU); - pBuf++; - *pBuf = (uint8_t)((temp >> 8) & 0xFFU); - pBuf++; - -#if PMA_ACCESS > 1U - pdwVal++; -#endif - } - - if ((wNBytes % 2U) != 0U) { - temp = *pdwVal; - *pBuf = (uint8_t)((temp >> 0) & 0xFFU); - } -} +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include "usbd_core.h" + +#ifndef CONFIG_USBDEV_FSDEV_PMA_ACCESS +#error "please define CONFIG_USBDEV_FSDEV_PMA_ACCESS in usb_config.h" +#endif + +#define PMA_ACCESS CONFIG_USBDEV_FSDEV_PMA_ACCESS +#include "usb_fsdev_reg.h" + +#ifndef CONFIG_USB_FSDEV_RAM_SIZE +#define CONFIG_USB_FSDEV_RAM_SIZE 512 +#endif + +#ifndef CONFIG_USBDEV_EP_NUM +#define CONFIG_USBDEV_EP_NUM 8 +#endif + +#define USB ((USB_TypeDef *)g_usbdev_bus[0].reg_base) + +#define USB_BTABLE_SIZE (8 * CONFIG_USBDEV_EP_NUM) + +static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); +static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes); + +/* Endpoint state */ +struct fsdev_ep_state { + uint16_t ep_mps; /* Endpoint max packet size */ + uint8_t ep_type; /* Endpoint type */ + uint8_t ep_stalled; /* Endpoint stall flag */ + uint8_t ep_enable; /* Endpoint enable */ + uint16_t ep_pma_buf_len; /* Previously allocated buffer size */ + uint16_t ep_pma_addr; /* ep pmd allocated addr */ + uint8_t *xfer_buf; + uint32_t xfer_len; + uint32_t actual_xfer_len; +}; + +/* Driver state */ +struct fsdev_udc { + struct usb_setup_packet setup; + volatile uint8_t dev_addr; /*!< USB Address */ + volatile uint32_t pma_offset; /*!< pma offset */ + struct fsdev_ep_state in_ep[CONFIG_USBDEV_EP_NUM]; /*!< IN endpoint parameters*/ + struct fsdev_ep_state out_ep[CONFIG_USBDEV_EP_NUM]; /*!< OUT endpoint parameters */ +} g_fsdev_udc; + +__WEAK void usb_dc_low_level_init(void) +{ +} + +__WEAK void usb_dc_low_level_deinit(void) +{ +} + +int usb_dc_init(uint8_t busid) +{ + usb_dc_low_level_init(); + + /* Init Device */ + /* CNTR_FRES = 1 */ + USB->CNTR = (uint16_t)USB_CNTR_FRES; + + /* CNTR_FRES = 0 */ + USB->CNTR = 0U; + + /* Clear pending interrupts */ + USB->ISTR = 0U; + + /*Set Btable Address*/ + USB->BTABLE = BTABLE_ADDRESS; + + uint32_t winterruptmask; + + /* Set winterruptmask variable */ + winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | + USB_CNTR_SUSPM | USB_CNTR_ERRM | + USB_CNTR_SOFM | USB_CNTR_ESOFM | + USB_CNTR_RESETM; + + /* Set interrupt mask */ + USB->CNTR = (uint16_t)winterruptmask; + + /* Enabling DP Pull-UP bit to Connect internal PU resistor on USB DP line */ + USB->BCDR |= (uint16_t)USB_BCDR_DPPU; + + return 0; +} + +int usb_dc_deinit(uint8_t busid) +{ + /* disable all interrupts and force USB reset */ + USB->CNTR = (uint16_t)USB_CNTR_FRES; + + /* clear interrupt status register */ + USB->ISTR = 0U; + + /* switch-off device */ + USB->CNTR = (uint16_t)(USB_CNTR_FRES | USB_CNTR_PDWN); + + usb_dc_low_level_deinit(); + return 0; +} + +int usbd_set_address(uint8_t busid, const uint8_t addr) +{ + if (addr == 0U) { + /* set device address and enable function */ + USB->DADDR = (uint16_t)USB_DADDR_EF; + } + + g_fsdev_udc.dev_addr = addr; + return 0; +} + +int usbd_set_remote_wakeup(uint8_t busid) +{ + return -1; +} + +uint8_t usbd_get_port_speed(uint8_t busid) +{ + return USB_SPEED_FULL; +} + +int usbd_ep_open(uint8_t busid, const struct usb_endpoint_descriptor *ep) +{ + uint8_t ep_idx = USB_EP_GET_IDX(ep->bEndpointAddress); + + if (ep_idx > (CONFIG_USBDEV_EP_NUM - 1)) { + USB_LOG_ERR("Ep addr %02x overflow\r\n", ep->bEndpointAddress); + return -1; + } + + uint16_t wEpRegVal; + + /* initialize Endpoint */ + switch (USB_GET_ENDPOINT_TYPE(ep->bmAttributes)) { + case USB_ENDPOINT_TYPE_CONTROL: + wEpRegVal = USB_EP_CONTROL; + break; + + case USB_ENDPOINT_TYPE_BULK: + wEpRegVal = USB_EP_BULK; + break; + + case USB_ENDPOINT_TYPE_INTERRUPT: + wEpRegVal = USB_EP_INTERRUPT; + break; + + case USB_ENDPOINT_TYPE_ISOCHRONOUS: + wEpRegVal = USB_EP_ISOCHRONOUS; + break; + + default: + break; + } + + PCD_SET_EPTYPE(USB, ep_idx, wEpRegVal); + + PCD_SET_EP_ADDRESS(USB, ep_idx, ep_idx); + if (USB_EP_DIR_IS_OUT(ep->bEndpointAddress)) { + g_fsdev_udc.out_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); + g_fsdev_udc.out_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); + g_fsdev_udc.out_ep[ep_idx].ep_enable = true; + if (g_fsdev_udc.out_ep[ep_idx].ep_mps > g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len) { + if (g_fsdev_udc.pma_offset + g_fsdev_udc.out_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) { + USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress); + return -1; + } + g_fsdev_udc.out_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); + g_fsdev_udc.out_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset; + /*Set the endpoint Receive buffer address */ + PCD_SET_EP_RX_ADDRESS(USB, ep_idx, g_fsdev_udc.pma_offset); + g_fsdev_udc.pma_offset += USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); + } + /*Set the endpoint Receive buffer counter*/ + PCD_SET_EP_RX_CNT(USB, ep_idx, USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize)); + PCD_CLEAR_RX_DTOG(USB, ep_idx); + } else { + g_fsdev_udc.in_ep[ep_idx].ep_mps = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); + g_fsdev_udc.in_ep[ep_idx].ep_type = USB_GET_ENDPOINT_TYPE(ep->bmAttributes); + g_fsdev_udc.in_ep[ep_idx].ep_enable = true; + if (g_fsdev_udc.in_ep[ep_idx].ep_mps > g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len) { + if (g_fsdev_udc.pma_offset + g_fsdev_udc.in_ep[ep_idx].ep_mps > CONFIG_USB_FSDEV_RAM_SIZE) { + USB_LOG_ERR("Ep pma %02x overflow\r\n", ep->bEndpointAddress); + return -1; + } + g_fsdev_udc.in_ep[ep_idx].ep_pma_buf_len = USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); + g_fsdev_udc.in_ep[ep_idx].ep_pma_addr = g_fsdev_udc.pma_offset; + /*Set the endpoint Transmit buffer address */ + PCD_SET_EP_TX_ADDRESS(USB, ep_idx, g_fsdev_udc.pma_offset); + g_fsdev_udc.pma_offset += USB_GET_MAXPACKETSIZE(ep->wMaxPacketSize); + } + + PCD_CLEAR_TX_DTOG(USB, ep_idx); + if (USB_GET_ENDPOINT_TYPE(ep->bmAttributes) != USB_ENDPOINT_TYPE_ISOCHRONOUS) { + /* Configure NAK status for the Endpoint */ + PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_NAK); + } else { + /* Configure TX Endpoint to disabled state */ + PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_DIS); + } + } + return 0; +} + +int usbd_ep_close(uint8_t busid, const uint8_t ep) +{ + uint8_t ep_idx = USB_EP_GET_IDX(ep); + + if (USB_EP_DIR_IS_OUT(ep)) { + PCD_CLEAR_RX_DTOG(USB, ep_idx); + + /* Configure DISABLE status for the Endpoint*/ + PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_DIS); + } else { + PCD_CLEAR_TX_DTOG(USB, ep_idx); + + /* Configure DISABLE status for the Endpoint*/ + PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_DIS); + } + return 0; +} + +int usbd_ep_set_stall(uint8_t busid, const uint8_t ep) +{ + uint8_t ep_idx = USB_EP_GET_IDX(ep); + + if (USB_EP_DIR_IS_OUT(ep)) { + PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_STALL); + } else { + PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_STALL); + } + return 0; +} + +int usbd_ep_clear_stall(uint8_t busid, const uint8_t ep) +{ + uint8_t ep_idx = USB_EP_GET_IDX(ep); + + if (USB_EP_DIR_IS_OUT(ep)) { + PCD_CLEAR_RX_DTOG(USB, ep_idx); + /* Configure VALID status for the Endpoint */ + PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID); + } else { + PCD_CLEAR_TX_DTOG(USB, ep_idx); + + if (g_fsdev_udc.in_ep[ep_idx].ep_type != USB_ENDPOINT_TYPE_ISOCHRONOUS) { + /* Configure NAK status for the Endpoint */ + PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_NAK); + } + } + return 0; +} + +int usbd_ep_is_stalled(uint8_t busid, const uint8_t ep, uint8_t *stalled) +{ + uint8_t ep_idx = USB_EP_GET_IDX(ep); + + if (USB_EP_DIR_IS_OUT(ep)) { + if (PCD_GET_EP_RX_STATUS(USB, ep_idx) & USB_EP_RX_STALL) { + *stalled = 1; + } else { + *stalled = 0; + } + } else { + if (PCD_GET_EP_TX_STATUS(USB, ep_idx) & USB_EP_TX_STALL) { + *stalled = 1; + } else { + *stalled = 0; + } + } + return 0; +} + +int usbd_ep_start_write(uint8_t busid, const uint8_t ep, const uint8_t *data, uint32_t data_len) +{ + uint8_t ep_idx = USB_EP_GET_IDX(ep); + + if (!data && data_len) { + return -1; + } + + if (!g_fsdev_udc.in_ep[ep_idx].ep_enable) { + return -2; + } + + g_fsdev_udc.in_ep[ep_idx].xfer_buf = (uint8_t *)data; + g_fsdev_udc.in_ep[ep_idx].xfer_len = data_len; + g_fsdev_udc.in_ep[ep_idx].actual_xfer_len = 0; + + data_len = MIN(data_len, g_fsdev_udc.in_ep[ep_idx].ep_mps); + + fsdev_write_pma(USB, (uint8_t *)data, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)data_len); + PCD_SET_EP_TX_CNT(USB, ep_idx, (uint16_t)data_len); + PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_VALID); + + return 0; +} + +int usbd_ep_start_read(uint8_t busid, const uint8_t ep, uint8_t *data, uint32_t data_len) +{ + uint8_t ep_idx = USB_EP_GET_IDX(ep); + + if (!data && data_len) { + return -1; + } + if (!g_fsdev_udc.out_ep[ep_idx].ep_enable) { + return -2; + } + + g_fsdev_udc.out_ep[ep_idx].xfer_buf = data; + g_fsdev_udc.out_ep[ep_idx].xfer_len = data_len; + g_fsdev_udc.out_ep[ep_idx].actual_xfer_len = 0; + + PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID); + + return 0; +} + +void USBD_IRQHandler(uint8_t busid) +{ + uint16_t wIstr, wEPVal; + uint8_t ep_idx; + uint8_t read_count; + uint16_t write_count; + uint16_t store_ep[8]; + + wIstr = USB->ISTR; + if (wIstr & USB_ISTR_CTR) { + while ((USB->ISTR & USB_ISTR_CTR) != 0U) { + wIstr = USB->ISTR; + + /* extract highest priority endpoint number */ + ep_idx = (uint8_t)(wIstr & USB_ISTR_EP_ID); + + if (ep_idx == 0U) { + if ((wIstr & USB_ISTR_DIR) == 0U) { + PCD_CLEAR_TX_EP_CTR(USB, ep_idx); + + write_count = PCD_GET_EP_TX_CNT(USB, ep_idx); + + g_fsdev_udc.in_ep[ep_idx].xfer_buf += write_count; + g_fsdev_udc.in_ep[ep_idx].xfer_len -= write_count; + g_fsdev_udc.in_ep[ep_idx].actual_xfer_len += write_count; + + usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_fsdev_udc.in_ep[ep_idx].actual_xfer_len); + + if (g_fsdev_udc.setup.wLength == 0) { + /* In status, start reading setup */ + usbd_ep_start_read(0, 0x00, NULL, 0); + } else if (g_fsdev_udc.setup.wLength && ((g_fsdev_udc.setup.bmRequestType & USB_REQUEST_DIR_MASK) == USB_REQUEST_DIR_OUT)) { + /* In status, start reading setup */ + usbd_ep_start_read(0, 0x00, NULL, 0); + } + + if ((g_fsdev_udc.dev_addr > 0U) && (write_count == 0U)) { + USB->DADDR = ((uint16_t)g_fsdev_udc.dev_addr | USB_DADDR_EF); + g_fsdev_udc.dev_addr = 0U; + } + + } else { + wEPVal = PCD_GET_ENDPOINT(USB, ep_idx); + + if ((wEPVal & USB_EP_SETUP) != 0U) { + PCD_CLEAR_RX_EP_CTR(USB, ep_idx); + + read_count = PCD_GET_EP_RX_CNT(USB, ep_idx); + fsdev_read_pma(USB, (uint8_t *)&g_fsdev_udc.setup, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count); + + usbd_event_ep0_setup_complete_handler(0, (uint8_t *)&g_fsdev_udc.setup); + + } else if ((wEPVal & USB_EP_CTR_RX) != 0U) { + PCD_CLEAR_RX_EP_CTR(USB, ep_idx); + + read_count = PCD_GET_EP_RX_CNT(USB, ep_idx); + + fsdev_read_pma(USB, g_fsdev_udc.out_ep[ep_idx].xfer_buf, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count); + + g_fsdev_udc.out_ep[ep_idx].xfer_buf += read_count; + g_fsdev_udc.out_ep[ep_idx].xfer_len -= read_count; + g_fsdev_udc.out_ep[ep_idx].actual_xfer_len += read_count; + + usbd_event_ep_out_complete_handler(0, ep_idx, g_fsdev_udc.out_ep[ep_idx].actual_xfer_len); + + if (read_count == 0) { + /* Out status, start reading setup */ + usbd_ep_start_read(0, 0x00, NULL, 0); + } + } + } + } else { + wEPVal = PCD_GET_ENDPOINT(USB, ep_idx); + + if ((wEPVal & USB_EP_CTR_RX) != 0U) { + PCD_CLEAR_RX_EP_CTR(USB, ep_idx); + read_count = PCD_GET_EP_RX_CNT(USB, ep_idx); + fsdev_read_pma(USB, g_fsdev_udc.out_ep[ep_idx].xfer_buf, g_fsdev_udc.out_ep[ep_idx].ep_pma_addr, (uint16_t)read_count); + g_fsdev_udc.out_ep[ep_idx].xfer_buf += read_count; + g_fsdev_udc.out_ep[ep_idx].xfer_len -= read_count; + g_fsdev_udc.out_ep[ep_idx].actual_xfer_len += read_count; + + if ((read_count < g_fsdev_udc.out_ep[ep_idx].ep_mps) || + (g_fsdev_udc.out_ep[ep_idx].xfer_len == 0)) { + usbd_event_ep_out_complete_handler(0, ep_idx, g_fsdev_udc.out_ep[ep_idx].actual_xfer_len); + } else { + PCD_SET_EP_RX_STATUS(USB, ep_idx, USB_EP_RX_VALID); + } + } + + if ((wEPVal & USB_EP_CTR_TX) != 0U) { + PCD_CLEAR_TX_EP_CTR(USB, ep_idx); + write_count = PCD_GET_EP_TX_CNT(USB, ep_idx); + + g_fsdev_udc.in_ep[ep_idx].xfer_buf += write_count; + g_fsdev_udc.in_ep[ep_idx].xfer_len -= write_count; + g_fsdev_udc.in_ep[ep_idx].actual_xfer_len += write_count; + + if (g_fsdev_udc.in_ep[ep_idx].xfer_len == 0) { + usbd_event_ep_in_complete_handler(0, ep_idx | 0x80, g_fsdev_udc.in_ep[ep_idx].actual_xfer_len); + } else { + write_count = MIN(g_fsdev_udc.in_ep[ep_idx].xfer_len, g_fsdev_udc.in_ep[ep_idx].ep_mps); + fsdev_write_pma(USB, g_fsdev_udc.in_ep[ep_idx].xfer_buf, g_fsdev_udc.in_ep[ep_idx].ep_pma_addr, (uint16_t)write_count); + PCD_SET_EP_TX_CNT(USB, ep_idx, write_count); + PCD_SET_EP_TX_STATUS(USB, ep_idx, USB_EP_TX_VALID); + } + } + } + } + } + if (wIstr & USB_ISTR_RESET) { + memset(&g_fsdev_udc, 0, sizeof(struct fsdev_udc)); + g_fsdev_udc.pma_offset = USB_BTABLE_SIZE; + usbd_event_reset_handler(0); + /* start reading setup packet */ + PCD_SET_EP_RX_STATUS(USB, 0, USB_EP_RX_VALID); + USB->ISTR &= (uint16_t)(~USB_ISTR_RESET); + } + if (wIstr & USB_ISTR_PMAOVR) { + USB->ISTR &= (uint16_t)(~USB_ISTR_PMAOVR); + } + if (wIstr & USB_ISTR_ERR) { + USB->ISTR &= (uint16_t)(~USB_ISTR_ERR); + } + if (wIstr & USB_ISTR_WKUP) { + USB->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE); + USB->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); + + USB->ISTR &= (uint16_t)(~USB_ISTR_WKUP); + } + if (wIstr & USB_ISTR_SUSP) { + /* WA: To Clear Wakeup flag if raised with suspend signal */ + + /* Store Endpoint register */ + for (uint8_t i = 0U; i < 8U; i++) { + store_ep[i] = PCD_GET_ENDPOINT(USB, i); + } + + /* FORCE RESET */ + USB->CNTR |= (uint16_t)(USB_CNTR_FRES); + + /* CLEAR RESET */ + USB->CNTR &= (uint16_t)(~USB_CNTR_FRES); + + /* wait for reset flag in ISTR */ + while ((USB->ISTR & USB_ISTR_RESET) == 0U) { + } + + /* Clear Reset Flag */ + USB->ISTR &= (uint16_t)(~USB_ISTR_RESET); + /* Restore Registre */ + for (uint8_t i = 0U; i < 8U; i++) { + PCD_SET_ENDPOINT(USB, i, store_ep[i]); + } + + /* Force low-power mode in the macrocell */ + USB->CNTR |= (uint16_t)USB_CNTR_FSUSP; + + /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ + USB->ISTR &= (uint16_t)(~USB_ISTR_SUSP); + + USB->CNTR |= (uint16_t)USB_CNTR_LP_MODE; + } + if (wIstr & USB_ISTR_SOF) { + USB->ISTR &= (uint16_t)(~USB_ISTR_SOF); + } + if (wIstr & USB_ISTR_ESOF) { + USB->ISTR &= (uint16_t)(~USB_ISTR_ESOF); + } +} + +static void fsdev_write_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) +{ + uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; + uint32_t BaseAddr = (uint32_t)USBx; + uint32_t i, temp1, temp2; + __IO uint16_t *pdwVal; + uint8_t *pBuf = pbUsrBuf; + + pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); + + for (i = n; i != 0U; i--) { + temp1 = *pBuf; + pBuf++; + temp2 = temp1 | ((uint16_t)((uint16_t)*pBuf << 8)); + *pdwVal = (uint16_t)temp2; + pdwVal++; + +#if PMA_ACCESS > 1U + pdwVal++; +#endif + + pBuf++; + } +} + +/** + * @brief Copy data from packet memory area (PMA) to user memory buffer + * @param USBx USB peripheral instance register address. + * @param pbUsrBuf pointer to user memory area. + * @param wPMABufAddr address into PMA. + * @param wNBytes no. of bytes to be copied. + * @retval None + */ +static void fsdev_read_pma(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) +{ + uint32_t n = (uint32_t)wNBytes >> 1; + uint32_t BaseAddr = (uint32_t)USBx; + uint32_t i, temp; + __IO uint16_t *pdwVal; + uint8_t *pBuf = pbUsrBuf; + + pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); + + for (i = n; i != 0U; i--) { + temp = *(__IO uint16_t *)pdwVal; + pdwVal++; + *pBuf = (uint8_t)((temp >> 0) & 0xFFU); + pBuf++; + *pBuf = (uint8_t)((temp >> 8) & 0xFFU); + pBuf++; + +#if PMA_ACCESS > 1U + pdwVal++; +#endif + } + + if ((wNBytes % 2U) != 0U) { + temp = *pdwVal; + *pBuf = (uint8_t)((temp >> 0) & 0xFFU); + } +} diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/port/fsdev/usb_fsdev_reg.h b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/port/fsdev/usb_fsdev_reg.h similarity index 98% rename from stm32f0_cherryusb/3rdParty/CherryUSB/port/fsdev/usb_fsdev_reg.h rename to stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/port/fsdev/usb_fsdev_reg.h index 49da9ff..c67cf57 100644 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/port/fsdev/usb_fsdev_reg.h +++ b/stm32f072_usb_mouse_keyboard/Third_Party/CherryUSB/port/fsdev/usb_fsdev_reg.h @@ -1,1679 +1,1684 @@ -#ifndef __USB_FSDEV_REG_H__ -#define __USB_FSDEV_REG_H__ - -#define __IO volatile /*!< Defines 'read / write' permissions */ -/** - * @brief Universal Serial Bus Full Speed Device - */ - -typedef struct -{ - __IO uint16_t EP0R; /*!< USB Endpoint 0 register, Address offset: 0x00 */ - __IO uint16_t RESERVED0; /*!< Reserved */ - __IO uint16_t EP1R; /*!< USB Endpoint 1 register, Address offset: 0x04 */ - __IO uint16_t RESERVED1; /*!< Reserved */ - __IO uint16_t EP2R; /*!< USB Endpoint 2 register, Address offset: 0x08 */ - __IO uint16_t RESERVED2; /*!< Reserved */ - __IO uint16_t EP3R; /*!< USB Endpoint 3 register, Address offset: 0x0C */ - __IO uint16_t RESERVED3; /*!< Reserved */ - __IO uint16_t EP4R; /*!< USB Endpoint 4 register, Address offset: 0x10 */ - __IO uint16_t RESERVED4; /*!< Reserved */ - __IO uint16_t EP5R; /*!< USB Endpoint 5 register, Address offset: 0x14 */ - __IO uint16_t RESERVED5; /*!< Reserved */ - __IO uint16_t EP6R; /*!< USB Endpoint 6 register, Address offset: 0x18 */ - __IO uint16_t RESERVED6; /*!< Reserved */ - __IO uint16_t EP7R; /*!< USB Endpoint 7 register, Address offset: 0x1C */ - __IO uint16_t RESERVED7[17]; /*!< Reserved */ - __IO uint16_t CNTR; /*!< Control register, Address offset: 0x40 */ - __IO uint16_t RESERVED8; /*!< Reserved */ - __IO uint16_t ISTR; /*!< Interrupt status register, Address offset: 0x44 */ - __IO uint16_t RESERVED9; /*!< Reserved */ - __IO uint16_t FNR; /*!< Frame number register, Address offset: 0x48 */ - __IO uint16_t RESERVEDA; /*!< Reserved */ - __IO uint16_t DADDR; /*!< Device address register, Address offset: 0x4C */ - __IO uint16_t RESERVEDB; /*!< Reserved */ - __IO uint16_t BTABLE; /*!< Buffer Table address register, Address offset: 0x50 */ - __IO uint16_t RESERVEDC; /*!< Reserved */ - __IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ - __IO uint16_t RESERVEDD; /*!< Reserved */ - __IO uint16_t BCDR; /*!< Battery Charging detector register, Address offset: 0x58 */ - __IO uint16_t RESERVEDE; /*!< Reserved */ -} USB_TypeDef; - -/******************************************************************************/ -/* */ -/* USB Device FS */ -/* */ -/******************************************************************************/ - -/*!< Endpoint-specific registers */ -#define USB_EP0R USB_BASE /*!< Endpoint 0 register address */ -#define USB_EP1R (USB_BASE + 0x00000004) /*!< Endpoint 1 register address */ -#define USB_EP2R (USB_BASE + 0x00000008) /*!< Endpoint 2 register address */ -#define USB_EP3R (USB_BASE + 0x0000000C) /*!< Endpoint 3 register address */ -#define USB_EP4R (USB_BASE + 0x00000010) /*!< Endpoint 4 register address */ -#define USB_EP5R (USB_BASE + 0x00000014) /*!< Endpoint 5 register address */ -#define USB_EP6R (USB_BASE + 0x00000018) /*!< Endpoint 6 register address */ -#define USB_EP7R (USB_BASE + 0x0000001C) /*!< Endpoint 7 register address */ - -/* bit positions */ -#define USB_EP_CTR_RX_Pos (15U) -#define USB_EP_CTR_RX_Msk (0x1UL << USB_EP_CTR_RX_Pos) /*!< 0x00008000 */ -#define USB_EP_CTR_RX USB_EP_CTR_RX_Msk /*!< EndPoint Correct TRansfer RX */ -#define USB_EP_DTOG_RX_Pos (14U) -#define USB_EP_DTOG_RX_Msk (0x1UL << USB_EP_DTOG_RX_Pos) /*!< 0x00004000 */ -#define USB_EP_DTOG_RX USB_EP_DTOG_RX_Msk /*!< EndPoint Data TOGGLE RX */ -#define USB_EPRX_STAT_Pos (12U) -#define USB_EPRX_STAT_Msk (0x3UL << USB_EPRX_STAT_Pos) /*!< 0x00003000 */ -#define USB_EPRX_STAT USB_EPRX_STAT_Msk /*!< EndPoint RX STATus bit field */ -#define USB_EP_SETUP_Pos (11U) -#define USB_EP_SETUP_Msk (0x1UL << USB_EP_SETUP_Pos) /*!< 0x00000800 */ -#define USB_EP_SETUP USB_EP_SETUP_Msk /*!< EndPoint SETUP */ -#define USB_EP_T_FIELD_Pos (9U) -#define USB_EP_T_FIELD_Msk (0x3UL << USB_EP_T_FIELD_Pos) /*!< 0x00000600 */ -#define USB_EP_T_FIELD USB_EP_T_FIELD_Msk /*!< EndPoint TYPE */ -#define USB_EP_KIND_Pos (8U) -#define USB_EP_KIND_Msk (0x1UL << USB_EP_KIND_Pos) /*!< 0x00000100 */ -#define USB_EP_KIND USB_EP_KIND_Msk /*!< EndPoint KIND */ -#define USB_EP_CTR_TX_Pos (7U) -#define USB_EP_CTR_TX_Msk (0x1UL << USB_EP_CTR_TX_Pos) /*!< 0x00000080 */ -#define USB_EP_CTR_TX USB_EP_CTR_TX_Msk /*!< EndPoint Correct TRansfer TX */ -#define USB_EP_DTOG_TX_Pos (6U) -#define USB_EP_DTOG_TX_Msk (0x1UL << USB_EP_DTOG_TX_Pos) /*!< 0x00000040 */ -#define USB_EP_DTOG_TX USB_EP_DTOG_TX_Msk /*!< EndPoint Data TOGGLE TX */ -#define USB_EPTX_STAT_Pos (4U) -#define USB_EPTX_STAT_Msk (0x3UL << USB_EPTX_STAT_Pos) /*!< 0x00000030 */ -#define USB_EPTX_STAT USB_EPTX_STAT_Msk /*!< EndPoint TX STATus bit field */ -#define USB_EPADDR_FIELD_Pos (0U) -#define USB_EPADDR_FIELD_Msk (0xFUL << USB_EPADDR_FIELD_Pos) /*!< 0x0000000F */ -#define USB_EPADDR_FIELD USB_EPADDR_FIELD_Msk /*!< EndPoint ADDRess FIELD */ - -/* EndPoint REGister MASK (no toggle fields) */ -#define USB_EPREG_MASK (USB_EP_CTR_RX|USB_EP_SETUP|USB_EP_T_FIELD|USB_EP_KIND|USB_EP_CTR_TX|USB_EPADDR_FIELD) - /*!< EP_TYPE[1:0] EndPoint TYPE */ -#define USB_EP_TYPE_MASK_Pos (9U) -#define USB_EP_TYPE_MASK_Msk (0x3UL << USB_EP_TYPE_MASK_Pos) /*!< 0x00000600 */ -#define USB_EP_TYPE_MASK USB_EP_TYPE_MASK_Msk /*!< EndPoint TYPE Mask */ -#define USB_EP_BULK 0x00000000U /*!< EndPoint BULK */ -#define USB_EP_CONTROL 0x00000200U /*!< EndPoint CONTROL */ -#define USB_EP_ISOCHRONOUS 0x00000400U /*!< EndPoint ISOCHRONOUS */ -#define USB_EP_INTERRUPT 0x00000600U /*!< EndPoint INTERRUPT */ -#define USB_EP_T_MASK (~USB_EP_T_FIELD & USB_EPREG_MASK) - -#define USB_EPKIND_MASK (~USB_EP_KIND & USB_EPREG_MASK) /*!< EP_KIND EndPoint KIND */ - /*!< STAT_TX[1:0] STATus for TX transfer */ -#define USB_EP_TX_DIS 0x00000000U /*!< EndPoint TX DISabled */ -#define USB_EP_TX_STALL 0x00000010U /*!< EndPoint TX STALLed */ -#define USB_EP_TX_NAK 0x00000020U /*!< EndPoint TX NAKed */ -#define USB_EP_TX_VALID 0x00000030U /*!< EndPoint TX VALID */ -#define USB_EPTX_DTOG1 0x00000010U /*!< EndPoint TX Data TOGgle bit1 */ -#define USB_EPTX_DTOG2 0x00000020U /*!< EndPoint TX Data TOGgle bit2 */ -#define USB_EPTX_DTOGMASK (USB_EPTX_STAT|USB_EPREG_MASK) - /*!< STAT_RX[1:0] STATus for RX transfer */ -#define USB_EP_RX_DIS 0x00000000U /*!< EndPoint RX DISabled */ -#define USB_EP_RX_STALL 0x00001000U /*!< EndPoint RX STALLed */ -#define USB_EP_RX_NAK 0x00002000U /*!< EndPoint RX NAKed */ -#define USB_EP_RX_VALID 0x00003000U /*!< EndPoint RX VALID */ -#define USB_EPRX_DTOG1 0x00001000U /*!< EndPoint RX Data TOGgle bit1 */ -#define USB_EPRX_DTOG2 0x00002000U /*!< EndPoint RX Data TOGgle bit1 */ -#define USB_EPRX_DTOGMASK (USB_EPRX_STAT|USB_EPREG_MASK) - -/******************* Bit definition for USB_EP0R register *******************/ -#define USB_EP0R_EA_Pos (0U) -#define USB_EP0R_EA_Msk (0xFUL << USB_EP0R_EA_Pos) /*!< 0x0000000F */ -#define USB_EP0R_EA USB_EP0R_EA_Msk /*!< Endpoint Address */ - -#define USB_EP0R_STAT_TX_Pos (4U) -#define USB_EP0R_STAT_TX_Msk (0x3UL << USB_EP0R_STAT_TX_Pos) /*!< 0x00000030 */ -#define USB_EP0R_STAT_TX USB_EP0R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP0R_STAT_TX_0 (0x1UL << USB_EP0R_STAT_TX_Pos) /*!< 0x00000010 */ -#define USB_EP0R_STAT_TX_1 (0x2UL << USB_EP0R_STAT_TX_Pos) /*!< 0x00000020 */ - -#define USB_EP0R_DTOG_TX_Pos (6U) -#define USB_EP0R_DTOG_TX_Msk (0x1UL << USB_EP0R_DTOG_TX_Pos) /*!< 0x00000040 */ -#define USB_EP0R_DTOG_TX USB_EP0R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ -#define USB_EP0R_CTR_TX_Pos (7U) -#define USB_EP0R_CTR_TX_Msk (0x1UL << USB_EP0R_CTR_TX_Pos) /*!< 0x00000080 */ -#define USB_EP0R_CTR_TX USB_EP0R_CTR_TX_Msk /*!< Correct Transfer for transmission */ -#define USB_EP0R_EP_KIND_Pos (8U) -#define USB_EP0R_EP_KIND_Msk (0x1UL << USB_EP0R_EP_KIND_Pos) /*!< 0x00000100 */ -#define USB_EP0R_EP_KIND USB_EP0R_EP_KIND_Msk /*!< Endpoint Kind */ - -#define USB_EP0R_EP_TYPE_Pos (9U) -#define USB_EP0R_EP_TYPE_Msk (0x3UL << USB_EP0R_EP_TYPE_Pos) /*!< 0x00000600 */ -#define USB_EP0R_EP_TYPE USB_EP0R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP0R_EP_TYPE_0 (0x1UL << USB_EP0R_EP_TYPE_Pos) /*!< 0x00000200 */ -#define USB_EP0R_EP_TYPE_1 (0x2UL << USB_EP0R_EP_TYPE_Pos) /*!< 0x00000400 */ - -#define USB_EP0R_SETUP_Pos (11U) -#define USB_EP0R_SETUP_Msk (0x1UL << USB_EP0R_SETUP_Pos) /*!< 0x00000800 */ -#define USB_EP0R_SETUP USB_EP0R_SETUP_Msk /*!< Setup transaction completed */ - -#define USB_EP0R_STAT_RX_Pos (12U) -#define USB_EP0R_STAT_RX_Msk (0x3UL << USB_EP0R_STAT_RX_Pos) /*!< 0x00003000 */ -#define USB_EP0R_STAT_RX USB_EP0R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP0R_STAT_RX_0 (0x1UL << USB_EP0R_STAT_RX_Pos) /*!< 0x00001000 */ -#define USB_EP0R_STAT_RX_1 (0x2UL << USB_EP0R_STAT_RX_Pos) /*!< 0x00002000 */ - -#define USB_EP0R_DTOG_RX_Pos (14U) -#define USB_EP0R_DTOG_RX_Msk (0x1UL << USB_EP0R_DTOG_RX_Pos) /*!< 0x00004000 */ -#define USB_EP0R_DTOG_RX USB_EP0R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ -#define USB_EP0R_CTR_RX_Pos (15U) -#define USB_EP0R_CTR_RX_Msk (0x1UL << USB_EP0R_CTR_RX_Pos) /*!< 0x00008000 */ -#define USB_EP0R_CTR_RX USB_EP0R_CTR_RX_Msk /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP1R register *******************/ -#define USB_EP1R_EA_Pos (0U) -#define USB_EP1R_EA_Msk (0xFUL << USB_EP1R_EA_Pos) /*!< 0x0000000F */ -#define USB_EP1R_EA USB_EP1R_EA_Msk /*!< Endpoint Address */ - -#define USB_EP1R_STAT_TX_Pos (4U) -#define USB_EP1R_STAT_TX_Msk (0x3UL << USB_EP1R_STAT_TX_Pos) /*!< 0x00000030 */ -#define USB_EP1R_STAT_TX USB_EP1R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP1R_STAT_TX_0 (0x1UL << USB_EP1R_STAT_TX_Pos) /*!< 0x00000010 */ -#define USB_EP1R_STAT_TX_1 (0x2UL << USB_EP1R_STAT_TX_Pos) /*!< 0x00000020 */ - -#define USB_EP1R_DTOG_TX_Pos (6U) -#define USB_EP1R_DTOG_TX_Msk (0x1UL << USB_EP1R_DTOG_TX_Pos) /*!< 0x00000040 */ -#define USB_EP1R_DTOG_TX USB_EP1R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ -#define USB_EP1R_CTR_TX_Pos (7U) -#define USB_EP1R_CTR_TX_Msk (0x1UL << USB_EP1R_CTR_TX_Pos) /*!< 0x00000080 */ -#define USB_EP1R_CTR_TX USB_EP1R_CTR_TX_Msk /*!< Correct Transfer for transmission */ -#define USB_EP1R_EP_KIND_Pos (8U) -#define USB_EP1R_EP_KIND_Msk (0x1UL << USB_EP1R_EP_KIND_Pos) /*!< 0x00000100 */ -#define USB_EP1R_EP_KIND USB_EP1R_EP_KIND_Msk /*!< Endpoint Kind */ - -#define USB_EP1R_EP_TYPE_Pos (9U) -#define USB_EP1R_EP_TYPE_Msk (0x3UL << USB_EP1R_EP_TYPE_Pos) /*!< 0x00000600 */ -#define USB_EP1R_EP_TYPE USB_EP1R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP1R_EP_TYPE_0 (0x1UL << USB_EP1R_EP_TYPE_Pos) /*!< 0x00000200 */ -#define USB_EP1R_EP_TYPE_1 (0x2UL << USB_EP1R_EP_TYPE_Pos) /*!< 0x00000400 */ - -#define USB_EP1R_SETUP_Pos (11U) -#define USB_EP1R_SETUP_Msk (0x1UL << USB_EP1R_SETUP_Pos) /*!< 0x00000800 */ -#define USB_EP1R_SETUP USB_EP1R_SETUP_Msk /*!< Setup transaction completed */ - -#define USB_EP1R_STAT_RX_Pos (12U) -#define USB_EP1R_STAT_RX_Msk (0x3UL << USB_EP1R_STAT_RX_Pos) /*!< 0x00003000 */ -#define USB_EP1R_STAT_RX USB_EP1R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP1R_STAT_RX_0 (0x1UL << USB_EP1R_STAT_RX_Pos) /*!< 0x00001000 */ -#define USB_EP1R_STAT_RX_1 (0x2UL << USB_EP1R_STAT_RX_Pos) /*!< 0x00002000 */ - -#define USB_EP1R_DTOG_RX_Pos (14U) -#define USB_EP1R_DTOG_RX_Msk (0x1UL << USB_EP1R_DTOG_RX_Pos) /*!< 0x00004000 */ -#define USB_EP1R_DTOG_RX USB_EP1R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ -#define USB_EP1R_CTR_RX_Pos (15U) -#define USB_EP1R_CTR_RX_Msk (0x1UL << USB_EP1R_CTR_RX_Pos) /*!< 0x00008000 */ -#define USB_EP1R_CTR_RX USB_EP1R_CTR_RX_Msk /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP2R register *******************/ -#define USB_EP2R_EA_Pos (0U) -#define USB_EP2R_EA_Msk (0xFUL << USB_EP2R_EA_Pos) /*!< 0x0000000F */ -#define USB_EP2R_EA USB_EP2R_EA_Msk /*!< Endpoint Address */ - -#define USB_EP2R_STAT_TX_Pos (4U) -#define USB_EP2R_STAT_TX_Msk (0x3UL << USB_EP2R_STAT_TX_Pos) /*!< 0x00000030 */ -#define USB_EP2R_STAT_TX USB_EP2R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP2R_STAT_TX_0 (0x1UL << USB_EP2R_STAT_TX_Pos) /*!< 0x00000010 */ -#define USB_EP2R_STAT_TX_1 (0x2UL << USB_EP2R_STAT_TX_Pos) /*!< 0x00000020 */ - -#define USB_EP2R_DTOG_TX_Pos (6U) -#define USB_EP2R_DTOG_TX_Msk (0x1UL << USB_EP2R_DTOG_TX_Pos) /*!< 0x00000040 */ -#define USB_EP2R_DTOG_TX USB_EP2R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ -#define USB_EP2R_CTR_TX_Pos (7U) -#define USB_EP2R_CTR_TX_Msk (0x1UL << USB_EP2R_CTR_TX_Pos) /*!< 0x00000080 */ -#define USB_EP2R_CTR_TX USB_EP2R_CTR_TX_Msk /*!< Correct Transfer for transmission */ -#define USB_EP2R_EP_KIND_Pos (8U) -#define USB_EP2R_EP_KIND_Msk (0x1UL << USB_EP2R_EP_KIND_Pos) /*!< 0x00000100 */ -#define USB_EP2R_EP_KIND USB_EP2R_EP_KIND_Msk /*!< Endpoint Kind */ - -#define USB_EP2R_EP_TYPE_Pos (9U) -#define USB_EP2R_EP_TYPE_Msk (0x3UL << USB_EP2R_EP_TYPE_Pos) /*!< 0x00000600 */ -#define USB_EP2R_EP_TYPE USB_EP2R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP2R_EP_TYPE_0 (0x1UL << USB_EP2R_EP_TYPE_Pos) /*!< 0x00000200 */ -#define USB_EP2R_EP_TYPE_1 (0x2UL << USB_EP2R_EP_TYPE_Pos) /*!< 0x00000400 */ - -#define USB_EP2R_SETUP_Pos (11U) -#define USB_EP2R_SETUP_Msk (0x1UL << USB_EP2R_SETUP_Pos) /*!< 0x00000800 */ -#define USB_EP2R_SETUP USB_EP2R_SETUP_Msk /*!< Setup transaction completed */ - -#define USB_EP2R_STAT_RX_Pos (12U) -#define USB_EP2R_STAT_RX_Msk (0x3UL << USB_EP2R_STAT_RX_Pos) /*!< 0x00003000 */ -#define USB_EP2R_STAT_RX USB_EP2R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP2R_STAT_RX_0 (0x1UL << USB_EP2R_STAT_RX_Pos) /*!< 0x00001000 */ -#define USB_EP2R_STAT_RX_1 (0x2UL << USB_EP2R_STAT_RX_Pos) /*!< 0x00002000 */ - -#define USB_EP2R_DTOG_RX_Pos (14U) -#define USB_EP2R_DTOG_RX_Msk (0x1UL << USB_EP2R_DTOG_RX_Pos) /*!< 0x00004000 */ -#define USB_EP2R_DTOG_RX USB_EP2R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ -#define USB_EP2R_CTR_RX_Pos (15U) -#define USB_EP2R_CTR_RX_Msk (0x1UL << USB_EP2R_CTR_RX_Pos) /*!< 0x00008000 */ -#define USB_EP2R_CTR_RX USB_EP2R_CTR_RX_Msk /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP3R register *******************/ -#define USB_EP3R_EA_Pos (0U) -#define USB_EP3R_EA_Msk (0xFUL << USB_EP3R_EA_Pos) /*!< 0x0000000F */ -#define USB_EP3R_EA USB_EP3R_EA_Msk /*!< Endpoint Address */ - -#define USB_EP3R_STAT_TX_Pos (4U) -#define USB_EP3R_STAT_TX_Msk (0x3UL << USB_EP3R_STAT_TX_Pos) /*!< 0x00000030 */ -#define USB_EP3R_STAT_TX USB_EP3R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP3R_STAT_TX_0 (0x1UL << USB_EP3R_STAT_TX_Pos) /*!< 0x00000010 */ -#define USB_EP3R_STAT_TX_1 (0x2UL << USB_EP3R_STAT_TX_Pos) /*!< 0x00000020 */ - -#define USB_EP3R_DTOG_TX_Pos (6U) -#define USB_EP3R_DTOG_TX_Msk (0x1UL << USB_EP3R_DTOG_TX_Pos) /*!< 0x00000040 */ -#define USB_EP3R_DTOG_TX USB_EP3R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ -#define USB_EP3R_CTR_TX_Pos (7U) -#define USB_EP3R_CTR_TX_Msk (0x1UL << USB_EP3R_CTR_TX_Pos) /*!< 0x00000080 */ -#define USB_EP3R_CTR_TX USB_EP3R_CTR_TX_Msk /*!< Correct Transfer for transmission */ -#define USB_EP3R_EP_KIND_Pos (8U) -#define USB_EP3R_EP_KIND_Msk (0x1UL << USB_EP3R_EP_KIND_Pos) /*!< 0x00000100 */ -#define USB_EP3R_EP_KIND USB_EP3R_EP_KIND_Msk /*!< Endpoint Kind */ - -#define USB_EP3R_EP_TYPE_Pos (9U) -#define USB_EP3R_EP_TYPE_Msk (0x3UL << USB_EP3R_EP_TYPE_Pos) /*!< 0x00000600 */ -#define USB_EP3R_EP_TYPE USB_EP3R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP3R_EP_TYPE_0 (0x1UL << USB_EP3R_EP_TYPE_Pos) /*!< 0x00000200 */ -#define USB_EP3R_EP_TYPE_1 (0x2UL << USB_EP3R_EP_TYPE_Pos) /*!< 0x00000400 */ - -#define USB_EP3R_SETUP_Pos (11U) -#define USB_EP3R_SETUP_Msk (0x1UL << USB_EP3R_SETUP_Pos) /*!< 0x00000800 */ -#define USB_EP3R_SETUP USB_EP3R_SETUP_Msk /*!< Setup transaction completed */ - -#define USB_EP3R_STAT_RX_Pos (12U) -#define USB_EP3R_STAT_RX_Msk (0x3UL << USB_EP3R_STAT_RX_Pos) /*!< 0x00003000 */ -#define USB_EP3R_STAT_RX USB_EP3R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP3R_STAT_RX_0 (0x1UL << USB_EP3R_STAT_RX_Pos) /*!< 0x00001000 */ -#define USB_EP3R_STAT_RX_1 (0x2UL << USB_EP3R_STAT_RX_Pos) /*!< 0x00002000 */ - -#define USB_EP3R_DTOG_RX_Pos (14U) -#define USB_EP3R_DTOG_RX_Msk (0x1UL << USB_EP3R_DTOG_RX_Pos) /*!< 0x00004000 */ -#define USB_EP3R_DTOG_RX USB_EP3R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ -#define USB_EP3R_CTR_RX_Pos (15U) -#define USB_EP3R_CTR_RX_Msk (0x1UL << USB_EP3R_CTR_RX_Pos) /*!< 0x00008000 */ -#define USB_EP3R_CTR_RX USB_EP3R_CTR_RX_Msk /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP4R register *******************/ -#define USB_EP4R_EA_Pos (0U) -#define USB_EP4R_EA_Msk (0xFUL << USB_EP4R_EA_Pos) /*!< 0x0000000F */ -#define USB_EP4R_EA USB_EP4R_EA_Msk /*!< Endpoint Address */ - -#define USB_EP4R_STAT_TX_Pos (4U) -#define USB_EP4R_STAT_TX_Msk (0x3UL << USB_EP4R_STAT_TX_Pos) /*!< 0x00000030 */ -#define USB_EP4R_STAT_TX USB_EP4R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP4R_STAT_TX_0 (0x1UL << USB_EP4R_STAT_TX_Pos) /*!< 0x00000010 */ -#define USB_EP4R_STAT_TX_1 (0x2UL << USB_EP4R_STAT_TX_Pos) /*!< 0x00000020 */ - -#define USB_EP4R_DTOG_TX_Pos (6U) -#define USB_EP4R_DTOG_TX_Msk (0x1UL << USB_EP4R_DTOG_TX_Pos) /*!< 0x00000040 */ -#define USB_EP4R_DTOG_TX USB_EP4R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ -#define USB_EP4R_CTR_TX_Pos (7U) -#define USB_EP4R_CTR_TX_Msk (0x1UL << USB_EP4R_CTR_TX_Pos) /*!< 0x00000080 */ -#define USB_EP4R_CTR_TX USB_EP4R_CTR_TX_Msk /*!< Correct Transfer for transmission */ -#define USB_EP4R_EP_KIND_Pos (8U) -#define USB_EP4R_EP_KIND_Msk (0x1UL << USB_EP4R_EP_KIND_Pos) /*!< 0x00000100 */ -#define USB_EP4R_EP_KIND USB_EP4R_EP_KIND_Msk /*!< Endpoint Kind */ - -#define USB_EP4R_EP_TYPE_Pos (9U) -#define USB_EP4R_EP_TYPE_Msk (0x3UL << USB_EP4R_EP_TYPE_Pos) /*!< 0x00000600 */ -#define USB_EP4R_EP_TYPE USB_EP4R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP4R_EP_TYPE_0 (0x1UL << USB_EP4R_EP_TYPE_Pos) /*!< 0x00000200 */ -#define USB_EP4R_EP_TYPE_1 (0x2UL << USB_EP4R_EP_TYPE_Pos) /*!< 0x00000400 */ - -#define USB_EP4R_SETUP_Pos (11U) -#define USB_EP4R_SETUP_Msk (0x1UL << USB_EP4R_SETUP_Pos) /*!< 0x00000800 */ -#define USB_EP4R_SETUP USB_EP4R_SETUP_Msk /*!< Setup transaction completed */ - -#define USB_EP4R_STAT_RX_Pos (12U) -#define USB_EP4R_STAT_RX_Msk (0x3UL << USB_EP4R_STAT_RX_Pos) /*!< 0x00003000 */ -#define USB_EP4R_STAT_RX USB_EP4R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP4R_STAT_RX_0 (0x1UL << USB_EP4R_STAT_RX_Pos) /*!< 0x00001000 */ -#define USB_EP4R_STAT_RX_1 (0x2UL << USB_EP4R_STAT_RX_Pos) /*!< 0x00002000 */ - -#define USB_EP4R_DTOG_RX_Pos (14U) -#define USB_EP4R_DTOG_RX_Msk (0x1UL << USB_EP4R_DTOG_RX_Pos) /*!< 0x00004000 */ -#define USB_EP4R_DTOG_RX USB_EP4R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ -#define USB_EP4R_CTR_RX_Pos (15U) -#define USB_EP4R_CTR_RX_Msk (0x1UL << USB_EP4R_CTR_RX_Pos) /*!< 0x00008000 */ -#define USB_EP4R_CTR_RX USB_EP4R_CTR_RX_Msk /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP5R register *******************/ -#define USB_EP5R_EA_Pos (0U) -#define USB_EP5R_EA_Msk (0xFUL << USB_EP5R_EA_Pos) /*!< 0x0000000F */ -#define USB_EP5R_EA USB_EP5R_EA_Msk /*!< Endpoint Address */ - -#define USB_EP5R_STAT_TX_Pos (4U) -#define USB_EP5R_STAT_TX_Msk (0x3UL << USB_EP5R_STAT_TX_Pos) /*!< 0x00000030 */ -#define USB_EP5R_STAT_TX USB_EP5R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP5R_STAT_TX_0 (0x1UL << USB_EP5R_STAT_TX_Pos) /*!< 0x00000010 */ -#define USB_EP5R_STAT_TX_1 (0x2UL << USB_EP5R_STAT_TX_Pos) /*!< 0x00000020 */ - -#define USB_EP5R_DTOG_TX_Pos (6U) -#define USB_EP5R_DTOG_TX_Msk (0x1UL << USB_EP5R_DTOG_TX_Pos) /*!< 0x00000040 */ -#define USB_EP5R_DTOG_TX USB_EP5R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ -#define USB_EP5R_CTR_TX_Pos (7U) -#define USB_EP5R_CTR_TX_Msk (0x1UL << USB_EP5R_CTR_TX_Pos) /*!< 0x00000080 */ -#define USB_EP5R_CTR_TX USB_EP5R_CTR_TX_Msk /*!< Correct Transfer for transmission */ -#define USB_EP5R_EP_KIND_Pos (8U) -#define USB_EP5R_EP_KIND_Msk (0x1UL << USB_EP5R_EP_KIND_Pos) /*!< 0x00000100 */ -#define USB_EP5R_EP_KIND USB_EP5R_EP_KIND_Msk /*!< Endpoint Kind */ - -#define USB_EP5R_EP_TYPE_Pos (9U) -#define USB_EP5R_EP_TYPE_Msk (0x3UL << USB_EP5R_EP_TYPE_Pos) /*!< 0x00000600 */ -#define USB_EP5R_EP_TYPE USB_EP5R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP5R_EP_TYPE_0 (0x1UL << USB_EP5R_EP_TYPE_Pos) /*!< 0x00000200 */ -#define USB_EP5R_EP_TYPE_1 (0x2UL << USB_EP5R_EP_TYPE_Pos) /*!< 0x00000400 */ - -#define USB_EP5R_SETUP_Pos (11U) -#define USB_EP5R_SETUP_Msk (0x1UL << USB_EP5R_SETUP_Pos) /*!< 0x00000800 */ -#define USB_EP5R_SETUP USB_EP5R_SETUP_Msk /*!< Setup transaction completed */ - -#define USB_EP5R_STAT_RX_Pos (12U) -#define USB_EP5R_STAT_RX_Msk (0x3UL << USB_EP5R_STAT_RX_Pos) /*!< 0x00003000 */ -#define USB_EP5R_STAT_RX USB_EP5R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP5R_STAT_RX_0 (0x1UL << USB_EP5R_STAT_RX_Pos) /*!< 0x00001000 */ -#define USB_EP5R_STAT_RX_1 (0x2UL << USB_EP5R_STAT_RX_Pos) /*!< 0x00002000 */ - -#define USB_EP5R_DTOG_RX_Pos (14U) -#define USB_EP5R_DTOG_RX_Msk (0x1UL << USB_EP5R_DTOG_RX_Pos) /*!< 0x00004000 */ -#define USB_EP5R_DTOG_RX USB_EP5R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ -#define USB_EP5R_CTR_RX_Pos (15U) -#define USB_EP5R_CTR_RX_Msk (0x1UL << USB_EP5R_CTR_RX_Pos) /*!< 0x00008000 */ -#define USB_EP5R_CTR_RX USB_EP5R_CTR_RX_Msk /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP6R register *******************/ -#define USB_EP6R_EA_Pos (0U) -#define USB_EP6R_EA_Msk (0xFUL << USB_EP6R_EA_Pos) /*!< 0x0000000F */ -#define USB_EP6R_EA USB_EP6R_EA_Msk /*!< Endpoint Address */ - -#define USB_EP6R_STAT_TX_Pos (4U) -#define USB_EP6R_STAT_TX_Msk (0x3UL << USB_EP6R_STAT_TX_Pos) /*!< 0x00000030 */ -#define USB_EP6R_STAT_TX USB_EP6R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP6R_STAT_TX_0 (0x1UL << USB_EP6R_STAT_TX_Pos) /*!< 0x00000010 */ -#define USB_EP6R_STAT_TX_1 (0x2UL << USB_EP6R_STAT_TX_Pos) /*!< 0x00000020 */ - -#define USB_EP6R_DTOG_TX_Pos (6U) -#define USB_EP6R_DTOG_TX_Msk (0x1UL << USB_EP6R_DTOG_TX_Pos) /*!< 0x00000040 */ -#define USB_EP6R_DTOG_TX USB_EP6R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ -#define USB_EP6R_CTR_TX_Pos (7U) -#define USB_EP6R_CTR_TX_Msk (0x1UL << USB_EP6R_CTR_TX_Pos) /*!< 0x00000080 */ -#define USB_EP6R_CTR_TX USB_EP6R_CTR_TX_Msk /*!< Correct Transfer for transmission */ -#define USB_EP6R_EP_KIND_Pos (8U) -#define USB_EP6R_EP_KIND_Msk (0x1UL << USB_EP6R_EP_KIND_Pos) /*!< 0x00000100 */ -#define USB_EP6R_EP_KIND USB_EP6R_EP_KIND_Msk /*!< Endpoint Kind */ - -#define USB_EP6R_EP_TYPE_Pos (9U) -#define USB_EP6R_EP_TYPE_Msk (0x3UL << USB_EP6R_EP_TYPE_Pos) /*!< 0x00000600 */ -#define USB_EP6R_EP_TYPE USB_EP6R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP6R_EP_TYPE_0 (0x1UL << USB_EP6R_EP_TYPE_Pos) /*!< 0x00000200 */ -#define USB_EP6R_EP_TYPE_1 (0x2UL << USB_EP6R_EP_TYPE_Pos) /*!< 0x00000400 */ - -#define USB_EP6R_SETUP_Pos (11U) -#define USB_EP6R_SETUP_Msk (0x1UL << USB_EP6R_SETUP_Pos) /*!< 0x00000800 */ -#define USB_EP6R_SETUP USB_EP6R_SETUP_Msk /*!< Setup transaction completed */ - -#define USB_EP6R_STAT_RX_Pos (12U) -#define USB_EP6R_STAT_RX_Msk (0x3UL << USB_EP6R_STAT_RX_Pos) /*!< 0x00003000 */ -#define USB_EP6R_STAT_RX USB_EP6R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP6R_STAT_RX_0 (0x1UL << USB_EP6R_STAT_RX_Pos) /*!< 0x00001000 */ -#define USB_EP6R_STAT_RX_1 (0x2UL << USB_EP6R_STAT_RX_Pos) /*!< 0x00002000 */ - -#define USB_EP6R_DTOG_RX_Pos (14U) -#define USB_EP6R_DTOG_RX_Msk (0x1UL << USB_EP6R_DTOG_RX_Pos) /*!< 0x00004000 */ -#define USB_EP6R_DTOG_RX USB_EP6R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ -#define USB_EP6R_CTR_RX_Pos (15U) -#define USB_EP6R_CTR_RX_Msk (0x1UL << USB_EP6R_CTR_RX_Pos) /*!< 0x00008000 */ -#define USB_EP6R_CTR_RX USB_EP6R_CTR_RX_Msk /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP7R register *******************/ -#define USB_EP7R_EA_Pos (0U) -#define USB_EP7R_EA_Msk (0xFUL << USB_EP7R_EA_Pos) /*!< 0x0000000F */ -#define USB_EP7R_EA USB_EP7R_EA_Msk /*!< Endpoint Address */ - -#define USB_EP7R_STAT_TX_Pos (4U) -#define USB_EP7R_STAT_TX_Msk (0x3UL << USB_EP7R_STAT_TX_Pos) /*!< 0x00000030 */ -#define USB_EP7R_STAT_TX USB_EP7R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP7R_STAT_TX_0 (0x1UL << USB_EP7R_STAT_TX_Pos) /*!< 0x00000010 */ -#define USB_EP7R_STAT_TX_1 (0x2UL << USB_EP7R_STAT_TX_Pos) /*!< 0x00000020 */ - -#define USB_EP7R_DTOG_TX_Pos (6U) -#define USB_EP7R_DTOG_TX_Msk (0x1UL << USB_EP7R_DTOG_TX_Pos) /*!< 0x00000040 */ -#define USB_EP7R_DTOG_TX USB_EP7R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ -#define USB_EP7R_CTR_TX_Pos (7U) -#define USB_EP7R_CTR_TX_Msk (0x1UL << USB_EP7R_CTR_TX_Pos) /*!< 0x00000080 */ -#define USB_EP7R_CTR_TX USB_EP7R_CTR_TX_Msk /*!< Correct Transfer for transmission */ -#define USB_EP7R_EP_KIND_Pos (8U) -#define USB_EP7R_EP_KIND_Msk (0x1UL << USB_EP7R_EP_KIND_Pos) /*!< 0x00000100 */ -#define USB_EP7R_EP_KIND USB_EP7R_EP_KIND_Msk /*!< Endpoint Kind */ - -#define USB_EP7R_EP_TYPE_Pos (9U) -#define USB_EP7R_EP_TYPE_Msk (0x3UL << USB_EP7R_EP_TYPE_Pos) /*!< 0x00000600 */ -#define USB_EP7R_EP_TYPE USB_EP7R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP7R_EP_TYPE_0 (0x1UL << USB_EP7R_EP_TYPE_Pos) /*!< 0x00000200 */ -#define USB_EP7R_EP_TYPE_1 (0x2UL << USB_EP7R_EP_TYPE_Pos) /*!< 0x00000400 */ - -#define USB_EP7R_SETUP_Pos (11U) -#define USB_EP7R_SETUP_Msk (0x1UL << USB_EP7R_SETUP_Pos) /*!< 0x00000800 */ -#define USB_EP7R_SETUP USB_EP7R_SETUP_Msk /*!< Setup transaction completed */ - -#define USB_EP7R_STAT_RX_Pos (12U) -#define USB_EP7R_STAT_RX_Msk (0x3UL << USB_EP7R_STAT_RX_Pos) /*!< 0x00003000 */ -#define USB_EP7R_STAT_RX USB_EP7R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP7R_STAT_RX_0 (0x1UL << USB_EP7R_STAT_RX_Pos) /*!< 0x00001000 */ -#define USB_EP7R_STAT_RX_1 (0x2UL << USB_EP7R_STAT_RX_Pos) /*!< 0x00002000 */ - -#define USB_EP7R_DTOG_RX_Pos (14U) -#define USB_EP7R_DTOG_RX_Msk (0x1UL << USB_EP7R_DTOG_RX_Pos) /*!< 0x00004000 */ -#define USB_EP7R_DTOG_RX USB_EP7R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ -#define USB_EP7R_CTR_RX_Pos (15U) -#define USB_EP7R_CTR_RX_Msk (0x1UL << USB_EP7R_CTR_RX_Pos) /*!< 0x00008000 */ -#define USB_EP7R_CTR_RX USB_EP7R_CTR_RX_Msk /*!< Correct Transfer for reception */ - -/*!< Common registers */ -/******************* Bit definition for USB_CNTR register *******************/ -#define USB_CNTR_FRES_Pos (0U) -#define USB_CNTR_FRES_Msk (0x1UL << USB_CNTR_FRES_Pos) /*!< 0x00000001 */ -#define USB_CNTR_FRES USB_CNTR_FRES_Msk /*!< Force USB Reset */ -#define USB_CNTR_PDWN_Pos (1U) -#define USB_CNTR_PDWN_Msk (0x1UL << USB_CNTR_PDWN_Pos) /*!< 0x00000002 */ -#define USB_CNTR_PDWN USB_CNTR_PDWN_Msk /*!< Power down */ -#define USB_CNTR_LP_MODE_Pos (2U) -#define USB_CNTR_LP_MODE_Msk (0x1UL << USB_CNTR_LP_MODE_Pos) /*!< 0x00000004 */ -#define USB_CNTR_LP_MODE USB_CNTR_LP_MODE_Msk /*!< Low-power mode */ -#define USB_CNTR_FSUSP_Pos (3U) -#define USB_CNTR_FSUSP_Msk (0x1UL << USB_CNTR_FSUSP_Pos) /*!< 0x00000008 */ -#define USB_CNTR_FSUSP USB_CNTR_FSUSP_Msk /*!< Force suspend */ -#define USB_CNTR_RESUME_Pos (4U) -#define USB_CNTR_RESUME_Msk (0x1UL << USB_CNTR_RESUME_Pos) /*!< 0x00000010 */ -#define USB_CNTR_RESUME USB_CNTR_RESUME_Msk /*!< Resume request */ -#define USB_CNTR_ESOFM_Pos (8U) -#define USB_CNTR_ESOFM_Msk (0x1UL << USB_CNTR_ESOFM_Pos) /*!< 0x00000100 */ -#define USB_CNTR_ESOFM USB_CNTR_ESOFM_Msk /*!< Expected Start Of Frame Interrupt Mask */ -#define USB_CNTR_SOFM_Pos (9U) -#define USB_CNTR_SOFM_Msk (0x1UL << USB_CNTR_SOFM_Pos) /*!< 0x00000200 */ -#define USB_CNTR_SOFM USB_CNTR_SOFM_Msk /*!< Start Of Frame Interrupt Mask */ -#define USB_CNTR_RESETM_Pos (10U) -#define USB_CNTR_RESETM_Msk (0x1UL << USB_CNTR_RESETM_Pos) /*!< 0x00000400 */ -#define USB_CNTR_RESETM USB_CNTR_RESETM_Msk /*!< RESET Interrupt Mask */ -#define USB_CNTR_SUSPM_Pos (11U) -#define USB_CNTR_SUSPM_Msk (0x1UL << USB_CNTR_SUSPM_Pos) /*!< 0x00000800 */ -#define USB_CNTR_SUSPM USB_CNTR_SUSPM_Msk /*!< Suspend mode Interrupt Mask */ -#define USB_CNTR_WKUPM_Pos (12U) -#define USB_CNTR_WKUPM_Msk (0x1UL << USB_CNTR_WKUPM_Pos) /*!< 0x00001000 */ -#define USB_CNTR_WKUPM USB_CNTR_WKUPM_Msk /*!< Wakeup Interrupt Mask */ -#define USB_CNTR_ERRM_Pos (13U) -#define USB_CNTR_ERRM_Msk (0x1UL << USB_CNTR_ERRM_Pos) /*!< 0x00002000 */ -#define USB_CNTR_ERRM USB_CNTR_ERRM_Msk /*!< Error Interrupt Mask */ -#define USB_CNTR_PMAOVRM_Pos (14U) -#define USB_CNTR_PMAOVRM_Msk (0x1UL << USB_CNTR_PMAOVRM_Pos) /*!< 0x00004000 */ -#define USB_CNTR_PMAOVRM USB_CNTR_PMAOVRM_Msk /*!< Packet Memory Area Over / Underrun Interrupt Mask */ -#define USB_CNTR_CTRM_Pos (15U) -#define USB_CNTR_CTRM_Msk (0x1UL << USB_CNTR_CTRM_Pos) /*!< 0x00008000 */ -#define USB_CNTR_CTRM USB_CNTR_CTRM_Msk /*!< Correct Transfer Interrupt Mask */ - -/******************* Bit definition for USB_ISTR register *******************/ -#define USB_ISTR_EP_ID_Pos (0U) -#define USB_ISTR_EP_ID_Msk (0xFUL << USB_ISTR_EP_ID_Pos) /*!< 0x0000000F */ -#define USB_ISTR_EP_ID USB_ISTR_EP_ID_Msk /*!< Endpoint Identifier */ -#define USB_ISTR_DIR_Pos (4U) -#define USB_ISTR_DIR_Msk (0x1UL << USB_ISTR_DIR_Pos) /*!< 0x00000010 */ -#define USB_ISTR_DIR USB_ISTR_DIR_Msk /*!< Direction of transaction */ -#define USB_ISTR_ESOF_Pos (8U) -#define USB_ISTR_ESOF_Msk (0x1UL << USB_ISTR_ESOF_Pos) /*!< 0x00000100 */ -#define USB_ISTR_ESOF USB_ISTR_ESOF_Msk /*!< Expected Start Of Frame */ -#define USB_ISTR_SOF_Pos (9U) -#define USB_ISTR_SOF_Msk (0x1UL << USB_ISTR_SOF_Pos) /*!< 0x00000200 */ -#define USB_ISTR_SOF USB_ISTR_SOF_Msk /*!< Start Of Frame */ -#define USB_ISTR_RESET_Pos (10U) -#define USB_ISTR_RESET_Msk (0x1UL << USB_ISTR_RESET_Pos) /*!< 0x00000400 */ -#define USB_ISTR_RESET USB_ISTR_RESET_Msk /*!< USB RESET request */ -#define USB_ISTR_SUSP_Pos (11U) -#define USB_ISTR_SUSP_Msk (0x1UL << USB_ISTR_SUSP_Pos) /*!< 0x00000800 */ -#define USB_ISTR_SUSP USB_ISTR_SUSP_Msk /*!< Suspend mode request */ -#define USB_ISTR_WKUP_Pos (12U) -#define USB_ISTR_WKUP_Msk (0x1UL << USB_ISTR_WKUP_Pos) /*!< 0x00001000 */ -#define USB_ISTR_WKUP USB_ISTR_WKUP_Msk /*!< Wake up */ -#define USB_ISTR_ERR_Pos (13U) -#define USB_ISTR_ERR_Msk (0x1UL << USB_ISTR_ERR_Pos) /*!< 0x00002000 */ -#define USB_ISTR_ERR USB_ISTR_ERR_Msk /*!< Error */ -#define USB_ISTR_PMAOVR_Pos (14U) -#define USB_ISTR_PMAOVR_Msk (0x1UL << USB_ISTR_PMAOVR_Pos) /*!< 0x00004000 */ -#define USB_ISTR_PMAOVR USB_ISTR_PMAOVR_Msk /*!< Packet Memory Area Over / Underrun */ -#define USB_ISTR_CTR_Pos (15U) -#define USB_ISTR_CTR_Msk (0x1UL << USB_ISTR_CTR_Pos) /*!< 0x00008000 */ -#define USB_ISTR_CTR USB_ISTR_CTR_Msk /*!< Correct Transfer */ - -/******************* Bit definition for USB_FNR register ********************/ -#define USB_FNR_FN_Pos (0U) -#define USB_FNR_FN_Msk (0x7FFUL << USB_FNR_FN_Pos) /*!< 0x000007FF */ -#define USB_FNR_FN USB_FNR_FN_Msk /*!< Frame Number */ -#define USB_FNR_LSOF_Pos (11U) -#define USB_FNR_LSOF_Msk (0x3UL << USB_FNR_LSOF_Pos) /*!< 0x00001800 */ -#define USB_FNR_LSOF USB_FNR_LSOF_Msk /*!< Lost SOF */ -#define USB_FNR_LCK_Pos (13U) -#define USB_FNR_LCK_Msk (0x1UL << USB_FNR_LCK_Pos) /*!< 0x00002000 */ -#define USB_FNR_LCK USB_FNR_LCK_Msk /*!< Locked */ -#define USB_FNR_RXDM_Pos (14U) -#define USB_FNR_RXDM_Msk (0x1UL << USB_FNR_RXDM_Pos) /*!< 0x00004000 */ -#define USB_FNR_RXDM USB_FNR_RXDM_Msk /*!< Receive Data - Line Status */ -#define USB_FNR_RXDP_Pos (15U) -#define USB_FNR_RXDP_Msk (0x1UL << USB_FNR_RXDP_Pos) /*!< 0x00008000 */ -#define USB_FNR_RXDP USB_FNR_RXDP_Msk /*!< Receive Data + Line Status */ - -/****************** Bit definition for USB_DADDR register *******************/ -#define USB_DADDR_ADD_Pos (0U) -#define USB_DADDR_ADD_Msk (0x7FUL << USB_DADDR_ADD_Pos) /*!< 0x0000007F */ -#define USB_DADDR_ADD USB_DADDR_ADD_Msk /*!< ADD[6:0] bits (Device Address) */ -#define USB_DADDR_ADD0_Pos (0U) -#define USB_DADDR_ADD0_Msk (0x1UL << USB_DADDR_ADD0_Pos) /*!< 0x00000001 */ -#define USB_DADDR_ADD0 USB_DADDR_ADD0_Msk /*!< Bit 0 */ -#define USB_DADDR_ADD1_Pos (1U) -#define USB_DADDR_ADD1_Msk (0x1UL << USB_DADDR_ADD1_Pos) /*!< 0x00000002 */ -#define USB_DADDR_ADD1 USB_DADDR_ADD1_Msk /*!< Bit 1 */ -#define USB_DADDR_ADD2_Pos (2U) -#define USB_DADDR_ADD2_Msk (0x1UL << USB_DADDR_ADD2_Pos) /*!< 0x00000004 */ -#define USB_DADDR_ADD2 USB_DADDR_ADD2_Msk /*!< Bit 2 */ -#define USB_DADDR_ADD3_Pos (3U) -#define USB_DADDR_ADD3_Msk (0x1UL << USB_DADDR_ADD3_Pos) /*!< 0x00000008 */ -#define USB_DADDR_ADD3 USB_DADDR_ADD3_Msk /*!< Bit 3 */ -#define USB_DADDR_ADD4_Pos (4U) -#define USB_DADDR_ADD4_Msk (0x1UL << USB_DADDR_ADD4_Pos) /*!< 0x00000010 */ -#define USB_DADDR_ADD4 USB_DADDR_ADD4_Msk /*!< Bit 4 */ -#define USB_DADDR_ADD5_Pos (5U) -#define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */ -#define USB_DADDR_ADD5 USB_DADDR_ADD5_Msk /*!< Bit 5 */ -#define USB_DADDR_ADD6_Pos (6U) -#define USB_DADDR_ADD6_Msk (0x1UL << USB_DADDR_ADD6_Pos) /*!< 0x00000040 */ -#define USB_DADDR_ADD6 USB_DADDR_ADD6_Msk /*!< Bit 6 */ - -#define USB_DADDR_EF_Pos (7U) -#define USB_DADDR_EF_Msk (0x1UL << USB_DADDR_EF_Pos) /*!< 0x00000080 */ -#define USB_DADDR_EF USB_DADDR_EF_Msk /*!< Enable Function */ - -/****************** Bit definition for USB_BTABLE register ******************/ -#define USB_BTABLE_BTABLE_Pos (3U) -#define USB_BTABLE_BTABLE_Msk (0x1FFFUL << USB_BTABLE_BTABLE_Pos) /*!< 0x0000FFF8 */ -#define USB_BTABLE_BTABLE USB_BTABLE_BTABLE_Msk /*!< Buffer Table */ - -/****************** Bits definition for USB_BCDR register *******************/ -#define USB_BCDR_BCDEN ((uint16_t)0x0001U) /*!< Battery charging detector (BCD) enable */ -#define USB_BCDR_DCDEN ((uint16_t)0x0002U) /*!< Data contact detection (DCD) mode enable */ -#define USB_BCDR_PDEN ((uint16_t)0x0004U) /*!< Primary detection (PD) mode enable */ -#define USB_BCDR_SDEN ((uint16_t)0x0008U) /*!< Secondary detection (SD) mode enable */ -#define USB_BCDR_DCDET ((uint16_t)0x0010U) /*!< Data contact detection (DCD) status */ -#define USB_BCDR_PDET ((uint16_t)0x0020U) /*!< Primary detection (PD) status */ -#define USB_BCDR_SDET ((uint16_t)0x0040U) /*!< Secondary detection (SD) status */ -#define USB_BCDR_PS2DET ((uint16_t)0x0080U) /*!< PS2 port or proprietary charger detected */ -#define USB_BCDR_DPPU ((uint16_t)0x8000U) /*!< DP Pull-up Enable */ - -/******************* Bit definition for LPMCSR register *********************/ -#define USB_LPMCSR_LMPEN ((uint16_t)0x0001U) /*!< LPM support enable */ -#define USB_LPMCSR_LPMACK ((uint16_t)0x0002U) /*!< LPM Token acknowledge enable*/ -#define USB_LPMCSR_REMWAKE ((uint16_t)0x0008U) /*!< bRemoteWake value received with last ACKed LPM Token */ -#define USB_LPMCSR_BESL ((uint16_t)0x00F0U) /*!< BESL value received with last ACKed LPM Token */ - -/*!< Buffer descriptor table */ -/***************** Bit definition for USB_ADDR0_TX register *****************/ -#define USB_ADDR0_TX_ADDR0_TX_Pos (1U) -#define USB_ADDR0_TX_ADDR0_TX_Msk (0x7FFFUL << USB_ADDR0_TX_ADDR0_TX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR0_TX_ADDR0_TX USB_ADDR0_TX_ADDR0_TX_Msk /*!< Transmission Buffer Address 0 */ - -/***************** Bit definition for USB_ADDR1_TX register *****************/ -#define USB_ADDR1_TX_ADDR1_TX_Pos (1U) -#define USB_ADDR1_TX_ADDR1_TX_Msk (0x7FFFUL << USB_ADDR1_TX_ADDR1_TX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR1_TX_ADDR1_TX USB_ADDR1_TX_ADDR1_TX_Msk /*!< Transmission Buffer Address 1 */ - -/***************** Bit definition for USB_ADDR2_TX register *****************/ -#define USB_ADDR2_TX_ADDR2_TX_Pos (1U) -#define USB_ADDR2_TX_ADDR2_TX_Msk (0x7FFFUL << USB_ADDR2_TX_ADDR2_TX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR2_TX_ADDR2_TX USB_ADDR2_TX_ADDR2_TX_Msk /*!< Transmission Buffer Address 2 */ - -/***************** Bit definition for USB_ADDR3_TX register *****************/ -#define USB_ADDR3_TX_ADDR3_TX_Pos (1U) -#define USB_ADDR3_TX_ADDR3_TX_Msk (0x7FFFUL << USB_ADDR3_TX_ADDR3_TX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR3_TX_ADDR3_TX USB_ADDR3_TX_ADDR3_TX_Msk /*!< Transmission Buffer Address 3 */ - -/***************** Bit definition for USB_ADDR4_TX register *****************/ -#define USB_ADDR4_TX_ADDR4_TX_Pos (1U) -#define USB_ADDR4_TX_ADDR4_TX_Msk (0x7FFFUL << USB_ADDR4_TX_ADDR4_TX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR4_TX_ADDR4_TX USB_ADDR4_TX_ADDR4_TX_Msk /*!< Transmission Buffer Address 4 */ - -/***************** Bit definition for USB_ADDR5_TX register *****************/ -#define USB_ADDR5_TX_ADDR5_TX_Pos (1U) -#define USB_ADDR5_TX_ADDR5_TX_Msk (0x7FFFUL << USB_ADDR5_TX_ADDR5_TX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR5_TX_ADDR5_TX USB_ADDR5_TX_ADDR5_TX_Msk /*!< Transmission Buffer Address 5 */ - -/***************** Bit definition for USB_ADDR6_TX register *****************/ -#define USB_ADDR6_TX_ADDR6_TX_Pos (1U) -#define USB_ADDR6_TX_ADDR6_TX_Msk (0x7FFFUL << USB_ADDR6_TX_ADDR6_TX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR6_TX_ADDR6_TX USB_ADDR6_TX_ADDR6_TX_Msk /*!< Transmission Buffer Address 6 */ - -/***************** Bit definition for USB_ADDR7_TX register *****************/ -#define USB_ADDR7_TX_ADDR7_TX_Pos (1U) -#define USB_ADDR7_TX_ADDR7_TX_Msk (0x7FFFUL << USB_ADDR7_TX_ADDR7_TX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR7_TX_ADDR7_TX USB_ADDR7_TX_ADDR7_TX_Msk /*!< Transmission Buffer Address 7 */ - -/*----------------------------------------------------------------------------*/ - -/***************** Bit definition for USB_COUNT0_TX register ****************/ -#define USB_COUNT0_TX_COUNT0_TX_Pos (0U) -#define USB_COUNT0_TX_COUNT0_TX_Msk (0x3FFUL << USB_COUNT0_TX_COUNT0_TX_Pos) /*!< 0x000003FF */ -#define USB_COUNT0_TX_COUNT0_TX USB_COUNT0_TX_COUNT0_TX_Msk /*!< Transmission Byte Count 0 */ - -/***************** Bit definition for USB_COUNT1_TX register ****************/ -#define USB_COUNT1_TX_COUNT1_TX_Pos (0U) -#define USB_COUNT1_TX_COUNT1_TX_Msk (0x3FFUL << USB_COUNT1_TX_COUNT1_TX_Pos) /*!< 0x000003FF */ -#define USB_COUNT1_TX_COUNT1_TX USB_COUNT1_TX_COUNT1_TX_Msk /*!< Transmission Byte Count 1 */ - -/***************** Bit definition for USB_COUNT2_TX register ****************/ -#define USB_COUNT2_TX_COUNT2_TX_Pos (0U) -#define USB_COUNT2_TX_COUNT2_TX_Msk (0x3FFUL << USB_COUNT2_TX_COUNT2_TX_Pos) /*!< 0x000003FF */ -#define USB_COUNT2_TX_COUNT2_TX USB_COUNT2_TX_COUNT2_TX_Msk /*!< Transmission Byte Count 2 */ - -/***************** Bit definition for USB_COUNT3_TX register ****************/ -#define USB_COUNT3_TX_COUNT3_TX_Pos (0U) -#define USB_COUNT3_TX_COUNT3_TX_Msk (0x3FFUL << USB_COUNT3_TX_COUNT3_TX_Pos) /*!< 0x000003FF */ -#define USB_COUNT3_TX_COUNT3_TX USB_COUNT3_TX_COUNT3_TX_Msk /*!< Transmission Byte Count 3 */ - -/***************** Bit definition for USB_COUNT4_TX register ****************/ -#define USB_COUNT4_TX_COUNT4_TX_Pos (0U) -#define USB_COUNT4_TX_COUNT4_TX_Msk (0x3FFUL << USB_COUNT4_TX_COUNT4_TX_Pos) /*!< 0x000003FF */ -#define USB_COUNT4_TX_COUNT4_TX USB_COUNT4_TX_COUNT4_TX_Msk /*!< Transmission Byte Count 4 */ - -/***************** Bit definition for USB_COUNT5_TX register ****************/ -#define USB_COUNT5_TX_COUNT5_TX_Pos (0U) -#define USB_COUNT5_TX_COUNT5_TX_Msk (0x3FFUL << USB_COUNT5_TX_COUNT5_TX_Pos) /*!< 0x000003FF */ -#define USB_COUNT5_TX_COUNT5_TX USB_COUNT5_TX_COUNT5_TX_Msk /*!< Transmission Byte Count 5 */ - -/***************** Bit definition for USB_COUNT6_TX register ****************/ -#define USB_COUNT6_TX_COUNT6_TX_Pos (0U) -#define USB_COUNT6_TX_COUNT6_TX_Msk (0x3FFUL << USB_COUNT6_TX_COUNT6_TX_Pos) /*!< 0x000003FF */ -#define USB_COUNT6_TX_COUNT6_TX USB_COUNT6_TX_COUNT6_TX_Msk /*!< Transmission Byte Count 6 */ - -/***************** Bit definition for USB_COUNT7_TX register ****************/ -#define USB_COUNT7_TX_COUNT7_TX_Pos (0U) -#define USB_COUNT7_TX_COUNT7_TX_Msk (0x3FFUL << USB_COUNT7_TX_COUNT7_TX_Pos) /*!< 0x000003FF */ -#define USB_COUNT7_TX_COUNT7_TX USB_COUNT7_TX_COUNT7_TX_Msk /*!< Transmission Byte Count 7 */ - -/*----------------------------------------------------------------------------*/ - -/**************** Bit definition for USB_COUNT0_TX_0 register ***************/ -#define USB_COUNT0_TX_0_COUNT0_TX_0 0x000003FFU /*!< Transmission Byte Count 0 (low) */ - -/**************** Bit definition for USB_COUNT0_TX_1 register ***************/ -#define USB_COUNT0_TX_1_COUNT0_TX_1 0x03FF0000U /*!< Transmission Byte Count 0 (high) */ - -/**************** Bit definition for USB_COUNT1_TX_0 register ***************/ -#define USB_COUNT1_TX_0_COUNT1_TX_0 0x000003FFU /*!< Transmission Byte Count 1 (low) */ - -/**************** Bit definition for USB_COUNT1_TX_1 register ***************/ -#define USB_COUNT1_TX_1_COUNT1_TX_1 0x03FF0000U /*!< Transmission Byte Count 1 (high) */ - -/**************** Bit definition for USB_COUNT2_TX_0 register ***************/ -#define USB_COUNT2_TX_0_COUNT2_TX_0 0x000003FFU /*!< Transmission Byte Count 2 (low) */ - -/**************** Bit definition for USB_COUNT2_TX_1 register ***************/ -#define USB_COUNT2_TX_1_COUNT2_TX_1 0x03FF0000U /*!< Transmission Byte Count 2 (high) */ - -/**************** Bit definition for USB_COUNT3_TX_0 register ***************/ -#define USB_COUNT3_TX_0_COUNT3_TX_0 0x000003FFU /*!< Transmission Byte Count 3 (low) */ - -/**************** Bit definition for USB_COUNT3_TX_1 register ***************/ -#define USB_COUNT3_TX_1_COUNT3_TX_1 0x03FF0000U /*!< Transmission Byte Count 3 (high) */ - -/**************** Bit definition for USB_COUNT4_TX_0 register ***************/ -#define USB_COUNT4_TX_0_COUNT4_TX_0 0x000003FFU /*!< Transmission Byte Count 4 (low) */ - -/**************** Bit definition for USB_COUNT4_TX_1 register ***************/ -#define USB_COUNT4_TX_1_COUNT4_TX_1 0x03FF0000U /*!< Transmission Byte Count 4 (high) */ - -/**************** Bit definition for USB_COUNT5_TX_0 register ***************/ -#define USB_COUNT5_TX_0_COUNT5_TX_0 0x000003FFU /*!< Transmission Byte Count 5 (low) */ - -/**************** Bit definition for USB_COUNT5_TX_1 register ***************/ -#define USB_COUNT5_TX_1_COUNT5_TX_1 0x03FF0000U /*!< Transmission Byte Count 5 (high) */ - -/**************** Bit definition for USB_COUNT6_TX_0 register ***************/ -#define USB_COUNT6_TX_0_COUNT6_TX_0 0x000003FFU /*!< Transmission Byte Count 6 (low) */ - -/**************** Bit definition for USB_COUNT6_TX_1 register ***************/ -#define USB_COUNT6_TX_1_COUNT6_TX_1 0x03FF0000U /*!< Transmission Byte Count 6 (high) */ - -/**************** Bit definition for USB_COUNT7_TX_0 register ***************/ -#define USB_COUNT7_TX_0_COUNT7_TX_0 0x000003FFU /*!< Transmission Byte Count 7 (low) */ - -/**************** Bit definition for USB_COUNT7_TX_1 register ***************/ -#define USB_COUNT7_TX_1_COUNT7_TX_1 0x03FF0000U /*!< Transmission Byte Count 7 (high) */ - -/*----------------------------------------------------------------------------*/ - -/***************** Bit definition for USB_ADDR0_RX register *****************/ -#define USB_ADDR0_RX_ADDR0_RX_Pos (1U) -#define USB_ADDR0_RX_ADDR0_RX_Msk (0x7FFFUL << USB_ADDR0_RX_ADDR0_RX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR0_RX_ADDR0_RX USB_ADDR0_RX_ADDR0_RX_Msk /*!< Reception Buffer Address 0 */ - -/***************** Bit definition for USB_ADDR1_RX register *****************/ -#define USB_ADDR1_RX_ADDR1_RX_Pos (1U) -#define USB_ADDR1_RX_ADDR1_RX_Msk (0x7FFFUL << USB_ADDR1_RX_ADDR1_RX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR1_RX_ADDR1_RX USB_ADDR1_RX_ADDR1_RX_Msk /*!< Reception Buffer Address 1 */ - -/***************** Bit definition for USB_ADDR2_RX register *****************/ -#define USB_ADDR2_RX_ADDR2_RX_Pos (1U) -#define USB_ADDR2_RX_ADDR2_RX_Msk (0x7FFFUL << USB_ADDR2_RX_ADDR2_RX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR2_RX_ADDR2_RX USB_ADDR2_RX_ADDR2_RX_Msk /*!< Reception Buffer Address 2 */ - -/***************** Bit definition for USB_ADDR3_RX register *****************/ -#define USB_ADDR3_RX_ADDR3_RX_Pos (1U) -#define USB_ADDR3_RX_ADDR3_RX_Msk (0x7FFFUL << USB_ADDR3_RX_ADDR3_RX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR3_RX_ADDR3_RX USB_ADDR3_RX_ADDR3_RX_Msk /*!< Reception Buffer Address 3 */ - -/***************** Bit definition for USB_ADDR4_RX register *****************/ -#define USB_ADDR4_RX_ADDR4_RX_Pos (1U) -#define USB_ADDR4_RX_ADDR4_RX_Msk (0x7FFFUL << USB_ADDR4_RX_ADDR4_RX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR4_RX_ADDR4_RX USB_ADDR4_RX_ADDR4_RX_Msk /*!< Reception Buffer Address 4 */ - -/***************** Bit definition for USB_ADDR5_RX register *****************/ -#define USB_ADDR5_RX_ADDR5_RX_Pos (1U) -#define USB_ADDR5_RX_ADDR5_RX_Msk (0x7FFFUL << USB_ADDR5_RX_ADDR5_RX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR5_RX_ADDR5_RX USB_ADDR5_RX_ADDR5_RX_Msk /*!< Reception Buffer Address 5 */ - -/***************** Bit definition for USB_ADDR6_RX register *****************/ -#define USB_ADDR6_RX_ADDR6_RX_Pos (1U) -#define USB_ADDR6_RX_ADDR6_RX_Msk (0x7FFFUL << USB_ADDR6_RX_ADDR6_RX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR6_RX_ADDR6_RX USB_ADDR6_RX_ADDR6_RX_Msk /*!< Reception Buffer Address 6 */ - -/***************** Bit definition for USB_ADDR7_RX register *****************/ -#define USB_ADDR7_RX_ADDR7_RX_Pos (1U) -#define USB_ADDR7_RX_ADDR7_RX_Msk (0x7FFFUL << USB_ADDR7_RX_ADDR7_RX_Pos) /*!< 0x0000FFFE */ -#define USB_ADDR7_RX_ADDR7_RX USB_ADDR7_RX_ADDR7_RX_Msk /*!< Reception Buffer Address 7 */ - -/*----------------------------------------------------------------------------*/ - -/***************** Bit definition for USB_COUNT0_RX register ****************/ -#define USB_COUNT0_RX_COUNT0_RX_Pos (0U) -#define USB_COUNT0_RX_COUNT0_RX_Msk (0x3FFUL << USB_COUNT0_RX_COUNT0_RX_Pos) /*!< 0x000003FF */ -#define USB_COUNT0_RX_COUNT0_RX USB_COUNT0_RX_COUNT0_RX_Msk /*!< Reception Byte Count */ - -#define USB_COUNT0_RX_NUM_BLOCK_Pos (10U) -#define USB_COUNT0_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ -#define USB_COUNT0_RX_NUM_BLOCK USB_COUNT0_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT0_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ -#define USB_COUNT0_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ -#define USB_COUNT0_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ -#define USB_COUNT0_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ -#define USB_COUNT0_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ - -#define USB_COUNT0_RX_BLSIZE_Pos (15U) -#define USB_COUNT0_RX_BLSIZE_Msk (0x1UL << USB_COUNT0_RX_BLSIZE_Pos) /*!< 0x00008000 */ -#define USB_COUNT0_RX_BLSIZE USB_COUNT0_RX_BLSIZE_Msk /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT1_RX register ****************/ -#define USB_COUNT1_RX_COUNT1_RX_Pos (0U) -#define USB_COUNT1_RX_COUNT1_RX_Msk (0x3FFUL << USB_COUNT1_RX_COUNT1_RX_Pos) /*!< 0x000003FF */ -#define USB_COUNT1_RX_COUNT1_RX USB_COUNT1_RX_COUNT1_RX_Msk /*!< Reception Byte Count */ - -#define USB_COUNT1_RX_NUM_BLOCK_Pos (10U) -#define USB_COUNT1_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ -#define USB_COUNT1_RX_NUM_BLOCK USB_COUNT1_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT1_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ -#define USB_COUNT1_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ -#define USB_COUNT1_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ -#define USB_COUNT1_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ -#define USB_COUNT1_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ - -#define USB_COUNT1_RX_BLSIZE_Pos (15U) -#define USB_COUNT1_RX_BLSIZE_Msk (0x1UL << USB_COUNT1_RX_BLSIZE_Pos) /*!< 0x00008000 */ -#define USB_COUNT1_RX_BLSIZE USB_COUNT1_RX_BLSIZE_Msk /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT2_RX register ****************/ -#define USB_COUNT2_RX_COUNT2_RX_Pos (0U) -#define USB_COUNT2_RX_COUNT2_RX_Msk (0x3FFUL << USB_COUNT2_RX_COUNT2_RX_Pos) /*!< 0x000003FF */ -#define USB_COUNT2_RX_COUNT2_RX USB_COUNT2_RX_COUNT2_RX_Msk /*!< Reception Byte Count */ - -#define USB_COUNT2_RX_NUM_BLOCK_Pos (10U) -#define USB_COUNT2_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ -#define USB_COUNT2_RX_NUM_BLOCK USB_COUNT2_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT2_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ -#define USB_COUNT2_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ -#define USB_COUNT2_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ -#define USB_COUNT2_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ -#define USB_COUNT2_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ - -#define USB_COUNT2_RX_BLSIZE_Pos (15U) -#define USB_COUNT2_RX_BLSIZE_Msk (0x1UL << USB_COUNT2_RX_BLSIZE_Pos) /*!< 0x00008000 */ -#define USB_COUNT2_RX_BLSIZE USB_COUNT2_RX_BLSIZE_Msk /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT3_RX register ****************/ -#define USB_COUNT3_RX_COUNT3_RX_Pos (0U) -#define USB_COUNT3_RX_COUNT3_RX_Msk (0x3FFUL << USB_COUNT3_RX_COUNT3_RX_Pos) /*!< 0x000003FF */ -#define USB_COUNT3_RX_COUNT3_RX USB_COUNT3_RX_COUNT3_RX_Msk /*!< Reception Byte Count */ - -#define USB_COUNT3_RX_NUM_BLOCK_Pos (10U) -#define USB_COUNT3_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ -#define USB_COUNT3_RX_NUM_BLOCK USB_COUNT3_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT3_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ -#define USB_COUNT3_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ -#define USB_COUNT3_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ -#define USB_COUNT3_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ -#define USB_COUNT3_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ - -#define USB_COUNT3_RX_BLSIZE_Pos (15U) -#define USB_COUNT3_RX_BLSIZE_Msk (0x1UL << USB_COUNT3_RX_BLSIZE_Pos) /*!< 0x00008000 */ -#define USB_COUNT3_RX_BLSIZE USB_COUNT3_RX_BLSIZE_Msk /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT4_RX register ****************/ -#define USB_COUNT4_RX_COUNT4_RX_Pos (0U) -#define USB_COUNT4_RX_COUNT4_RX_Msk (0x3FFUL << USB_COUNT4_RX_COUNT4_RX_Pos) /*!< 0x000003FF */ -#define USB_COUNT4_RX_COUNT4_RX USB_COUNT4_RX_COUNT4_RX_Msk /*!< Reception Byte Count */ - -#define USB_COUNT4_RX_NUM_BLOCK_Pos (10U) -#define USB_COUNT4_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ -#define USB_COUNT4_RX_NUM_BLOCK USB_COUNT4_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT4_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ -#define USB_COUNT4_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ -#define USB_COUNT4_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ -#define USB_COUNT4_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ -#define USB_COUNT4_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ - -#define USB_COUNT4_RX_BLSIZE_Pos (15U) -#define USB_COUNT4_RX_BLSIZE_Msk (0x1UL << USB_COUNT4_RX_BLSIZE_Pos) /*!< 0x00008000 */ -#define USB_COUNT4_RX_BLSIZE USB_COUNT4_RX_BLSIZE_Msk /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT5_RX register ****************/ -#define USB_COUNT5_RX_COUNT5_RX_Pos (0U) -#define USB_COUNT5_RX_COUNT5_RX_Msk (0x3FFUL << USB_COUNT5_RX_COUNT5_RX_Pos) /*!< 0x000003FF */ -#define USB_COUNT5_RX_COUNT5_RX USB_COUNT5_RX_COUNT5_RX_Msk /*!< Reception Byte Count */ - -#define USB_COUNT5_RX_NUM_BLOCK_Pos (10U) -#define USB_COUNT5_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ -#define USB_COUNT5_RX_NUM_BLOCK USB_COUNT5_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT5_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ -#define USB_COUNT5_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ -#define USB_COUNT5_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ -#define USB_COUNT5_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ -#define USB_COUNT5_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ - -#define USB_COUNT5_RX_BLSIZE_Pos (15U) -#define USB_COUNT5_RX_BLSIZE_Msk (0x1UL << USB_COUNT5_RX_BLSIZE_Pos) /*!< 0x00008000 */ -#define USB_COUNT5_RX_BLSIZE USB_COUNT5_RX_BLSIZE_Msk /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT6_RX register ****************/ -#define USB_COUNT6_RX_COUNT6_RX_Pos (0U) -#define USB_COUNT6_RX_COUNT6_RX_Msk (0x3FFUL << USB_COUNT6_RX_COUNT6_RX_Pos) /*!< 0x000003FF */ -#define USB_COUNT6_RX_COUNT6_RX USB_COUNT6_RX_COUNT6_RX_Msk /*!< Reception Byte Count */ - -#define USB_COUNT6_RX_NUM_BLOCK_Pos (10U) -#define USB_COUNT6_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ -#define USB_COUNT6_RX_NUM_BLOCK USB_COUNT6_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT6_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ -#define USB_COUNT6_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ -#define USB_COUNT6_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ -#define USB_COUNT6_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ -#define USB_COUNT6_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ - -#define USB_COUNT6_RX_BLSIZE_Pos (15U) -#define USB_COUNT6_RX_BLSIZE_Msk (0x1UL << USB_COUNT6_RX_BLSIZE_Pos) /*!< 0x00008000 */ -#define USB_COUNT6_RX_BLSIZE USB_COUNT6_RX_BLSIZE_Msk /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT7_RX register ****************/ -#define USB_COUNT7_RX_COUNT7_RX_Pos (0U) -#define USB_COUNT7_RX_COUNT7_RX_Msk (0x3FFUL << USB_COUNT7_RX_COUNT7_RX_Pos) /*!< 0x000003FF */ -#define USB_COUNT7_RX_COUNT7_RX USB_COUNT7_RX_COUNT7_RX_Msk /*!< Reception Byte Count */ - -#define USB_COUNT7_RX_NUM_BLOCK_Pos (10U) -#define USB_COUNT7_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ -#define USB_COUNT7_RX_NUM_BLOCK USB_COUNT7_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT7_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ -#define USB_COUNT7_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ -#define USB_COUNT7_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ -#define USB_COUNT7_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ -#define USB_COUNT7_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ - -#define USB_COUNT7_RX_BLSIZE_Pos (15U) -#define USB_COUNT7_RX_BLSIZE_Msk (0x1UL << USB_COUNT7_RX_BLSIZE_Pos) /*!< 0x00008000 */ -#define USB_COUNT7_RX_BLSIZE USB_COUNT7_RX_BLSIZE_Msk /*!< BLock SIZE */ - -/*----------------------------------------------------------------------------*/ - -/**************** Bit definition for USB_COUNT0_RX_0 register ***************/ -#define USB_COUNT0_RX_0_COUNT0_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ - -#define USB_COUNT0_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ - -#define USB_COUNT0_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT0_RX_1 register ***************/ -#define USB_COUNT0_RX_1_COUNT0_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ - -#define USB_COUNT0_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 1 */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ - -#define USB_COUNT0_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT1_RX_0 register ***************/ -#define USB_COUNT1_RX_0_COUNT1_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ - -#define USB_COUNT1_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ - -#define USB_COUNT1_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT1_RX_1 register ***************/ -#define USB_COUNT1_RX_1_COUNT1_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ - -#define USB_COUNT1_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ - -#define USB_COUNT1_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT2_RX_0 register ***************/ -#define USB_COUNT2_RX_0_COUNT2_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ - -#define USB_COUNT2_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ - -#define USB_COUNT2_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT2_RX_1 register ***************/ -#define USB_COUNT2_RX_1_COUNT2_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ - -#define USB_COUNT2_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ - -#define USB_COUNT2_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT3_RX_0 register ***************/ -#define USB_COUNT3_RX_0_COUNT3_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ - -#define USB_COUNT3_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ - -#define USB_COUNT3_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT3_RX_1 register ***************/ -#define USB_COUNT3_RX_1_COUNT3_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ - -#define USB_COUNT3_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ - -#define USB_COUNT3_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT4_RX_0 register ***************/ -#define USB_COUNT4_RX_0_COUNT4_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ - -#define USB_COUNT4_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ - -#define USB_COUNT4_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT4_RX_1 register ***************/ -#define USB_COUNT4_RX_1_COUNT4_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ - -#define USB_COUNT4_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ - -#define USB_COUNT4_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT5_RX_0 register ***************/ -#define USB_COUNT5_RX_0_COUNT5_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ - -#define USB_COUNT5_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ - -#define USB_COUNT5_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT5_RX_1 register ***************/ -#define USB_COUNT5_RX_1_COUNT5_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ - -#define USB_COUNT5_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ - -#define USB_COUNT5_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ - -/*************** Bit definition for USB_COUNT6_RX_0 register ***************/ -#define USB_COUNT6_RX_0_COUNT6_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ - -#define USB_COUNT6_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ - -#define USB_COUNT6_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT6_RX_1 register ***************/ -#define USB_COUNT6_RX_1_COUNT6_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ - -#define USB_COUNT6_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ - -#define USB_COUNT6_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ - -/*************** Bit definition for USB_COUNT7_RX_0 register ****************/ -#define USB_COUNT7_RX_0_COUNT7_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ - -#define USB_COUNT7_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ - -#define USB_COUNT7_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ - -/*************** Bit definition for USB_COUNT7_RX_1 register ****************/ -#define USB_COUNT7_RX_1_COUNT7_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ - -#define USB_COUNT7_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ - -#define USB_COUNT7_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ - -/** - * @} - */ - -#define BTABLE_ADDRESS 0x000U - -#ifndef PMA_ACCESS -#define PMA_ACCESS 2U -#endif -/******************** Bit definition for USB_COUNTn_RX register *************/ -#define USB_CNTRX_NBLK_MSK (0x1FU << 10) -#define USB_CNTRX_BLSIZE (0x1U << 15) - -/* SetENDPOINT */ -#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) - -/* GetENDPOINT */ -#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) - -/** - * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wType Endpoint Type. - * @retval None - */ -#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) - -/** - * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval Endpoint Type - */ -#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) - -/** - * @brief free buffer used from the application realizing it to the line - * toggles bit SW_BUF in the double buffered endpoint register - * @param USBx USB device. - * @param bEpNum, bDir - * @retval None - */ -#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \ - do { \ - if ((bDir) == 0U) \ - { \ - /* OUT double buffered endpoint */ \ - PCD_TX_DTOG((USBx), (bEpNum)); \ - } \ - else if ((bDir) == 1U) \ - { \ - /* IN double buffered endpoint */ \ - PCD_RX_DTOG((USBx), (bEpNum)); \ - } \ - } while(0) - -/** - * @brief sets the status for tx transfer (bits STAT_TX[1:0]). - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wState new state - * @retval None - */ -#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ - /* toggle first bit ? */ \ - if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ - { \ - _wRegVal ^= USB_EPTX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ - { \ - _wRegVal ^= USB_EPTX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_SET_EP_TX_STATUS */ - -/** - * @brief sets the status for rx transfer (bits STAT_TX[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wState new state - * @retval None - */ -#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ - /* toggle first bit ? */ \ - if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ - { \ - _wRegVal ^= USB_EPRX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ - { \ - _wRegVal ^= USB_EPRX_DTOG2; \ - } \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_SET_EP_RX_STATUS */ - -/** - * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wStaterx new state. - * @param wStatetx new state. - * @retval None - */ -#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ - /* toggle first bit ? */ \ - if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ - { \ - _wRegVal ^= USB_EPRX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ - { \ - _wRegVal ^= USB_EPRX_DTOG2; \ - } \ - /* toggle first bit ? */ \ - if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ - { \ - _wRegVal ^= USB_EPTX_DTOG1; \ - } \ - /* toggle second bit ? */ \ - if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ - { \ - _wRegVal ^= USB_EPTX_DTOG2; \ - } \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_SET_EP_TXRX_STATUS */ - -/** - * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] - * /STAT_RX[1:0]) - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval status - */ -#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) -#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) - -/** - * @brief sets directly the VALID tx/rx-status into the endpoint register - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) -#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) - -/** - * @brief checks stall condition in an endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval TRUE = endpoint in stall condition. - */ -#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) -#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) - -/** - * @brief set & clear EP_KIND bit. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_KIND(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ - } while(0) /* PCD_SET_EP_KIND */ - -#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_CLEAR_EP_KIND */ - -/** - * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) -#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) - -/** - * @brief Sets/clears directly EP_KIND bit in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) -#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) - -/** - * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ - } while(0) /* PCD_CLEAR_RX_EP_CTR */ - -#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ - } while(0) /* PCD_CLEAR_TX_EP_CTR */ - -/** - * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_RX_DTOG(USBx, bEpNum) \ - do { \ - uint16_t _wEPVal; \ - \ - _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ - } while(0) /* PCD_RX_DTOG */ - -#define PCD_TX_DTOG(USBx, bEpNum) \ - do { \ - uint16_t _wEPVal; \ - \ - _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ - } while(0) /* PCD_TX_DTOG */ -/** - * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ - \ - if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ - { \ - PCD_RX_DTOG((USBx), (bEpNum)); \ - } \ - } while(0) /* PCD_CLEAR_RX_DTOG */ - -#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ - \ - if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ - { \ - PCD_TX_DTOG((USBx), (bEpNum)); \ - } \ - } while(0) /* PCD_CLEAR_TX_DTOG */ - -/** - * @brief Sets address in an endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param bAddr Address. - * @retval None - */ -#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ - do { \ - uint16_t _wRegVal; \ - \ - _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ - \ - PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ - } while(0) /* PCD_SET_EP_ADDRESS */ - -/** - * @brief Gets address in an endpoint register. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) - -#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) -#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) - -/** - * @brief sets address of the tx/rx buffer. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wAddr address to be set (must be word aligned). - * @retval None - */ -#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ - do { \ - __IO uint16_t *_wRegVal; \ - uint32_t _wRegBase = (uint32_t)USBx; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ - *_wRegVal = ((wAddr) >> 1) << 1; \ - } while(0) /* PCD_SET_EP_TX_ADDRESS */ - -#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ - do { \ - __IO uint16_t *_wRegVal; \ - uint32_t _wRegBase = (uint32_t)USBx; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ - *_wRegVal = ((wAddr) >> 1) << 1; \ - } while(0) /* PCD_SET_EP_RX_ADDRESS */ - -/** - * @brief Gets address of the tx/rx buffer. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval address of the buffer. - */ -#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) -#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) - -/** - * @brief Sets counter of rx buffer with no. of blocks. - * @param pdwReg Register pointer - * @param wCount Counter. - * @param wNBlocks no. of Blocks. - * @retval None - */ -#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ - do { \ - (wNBlocks) = (wCount) >> 5; \ - if (((wCount) & 0x1fU) == 0U) \ - { \ - (wNBlocks)--; \ - } \ - *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ - } while(0) /* PCD_CALC_BLK32 */ - -#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ - do { \ - (wNBlocks) = (wCount) >> 1; \ - if (((wCount) & 0x1U) != 0U) \ - { \ - (wNBlocks)++; \ - } \ - *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ - } while(0) /* PCD_CALC_BLK2 */ - -#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ - do { \ - uint32_t wNBlocks; \ - if ((wCount) == 0U) \ - { \ - *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ - *(pdwReg) |= USB_CNTRX_BLSIZE; \ - } \ - else if((wCount) <= 62U) \ - { \ - PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ - } \ - else \ - { \ - PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ - } \ - } while(0) /* PCD_SET_EP_CNT_RX_REG */ - -#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ - do { \ - uint32_t _wRegBase = (uint32_t)(USBx); \ - __IO uint16_t *pdwReg; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ - PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ - } while(0) - -/** - * @brief sets counter for the tx/rx buffer. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wCount Counter value. - * @retval None - */ -#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ - do { \ - uint32_t _wRegBase = (uint32_t)(USBx); \ - __IO uint16_t *_wRegVal; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ - *_wRegVal = (uint16_t)(wCount); \ - } while(0) - -#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ - do { \ - uint32_t _wRegBase = (uint32_t)(USBx); \ - __IO uint16_t *_wRegVal; \ - \ - _wRegBase += (uint32_t)(USBx)->BTABLE; \ - _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ - PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ - } while(0) - -/** - * @brief gets counter of the tx buffer. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval Counter value - */ -#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) -#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) - -/** - * @brief Sets buffer 0/1 address in a double buffer endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wBuf0Addr buffer 0 address. - * @retval Counter value - */ -#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ - do { \ - PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ - } while(0) /* PCD_SET_EP_DBUF0_ADDR */ - -#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ - do { \ - PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ - } while(0) /* PCD_SET_EP_DBUF1_ADDR */ - -/** - * @brief Sets addresses in a double buffer endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param wBuf0Addr: buffer 0 address. - * @param wBuf1Addr = buffer 1 address. - * @retval None - */ -#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ - do { \ - PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ - PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ - } while(0) /* PCD_SET_EP_DBUF_ADDR */ - -/** - * @brief Gets buffer 0/1 address of a double buffer endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) -#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) - -/** - * @brief Gets buffer 0/1 address of a double buffer endpoint. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @param bDir endpoint dir EP_DBUF_OUT = OUT - * EP_DBUF_IN = IN - * @param wCount: Counter value - * @retval None - */ -#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ - do { \ - if ((bDir) == 0U) \ - /* OUT endpoint */ \ - { \ - PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ - } \ - else \ - { \ - if ((bDir) == 1U) \ - { \ - /* IN endpoint */ \ - PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ - } \ - } \ - } while(0) /* SetEPDblBuf0Count*/ - -#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ - do { \ - uint32_t _wBase = (uint32_t)(USBx); \ - __IO uint16_t *_wEPRegVal; \ - \ - if ((bDir) == 0U) \ - { \ - /* OUT endpoint */ \ - PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ - } \ - else \ - { \ - if ((bDir) == 1U) \ - { \ - /* IN endpoint */ \ - _wBase += (uint32_t)(USBx)->BTABLE; \ - _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ - *_wEPRegVal = (uint16_t)(wCount); \ - } \ - } \ - } while(0) /* SetEPDblBuf1Count */ - -#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ - do { \ - PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ - PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ - } while(0) /* PCD_SET_EP_DBUF_CNT */ - -/** - * @brief Gets buffer 0/1 rx/tx counter for double buffering. - * @param USBx USB peripheral instance register address. - * @param bEpNum Endpoint Number. - * @retval None - */ -#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) -#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) - +/* + * Copyright (c) 2022, sakumisu + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef __USB_FSDEV_REG_H__ +#define __USB_FSDEV_REG_H__ + +#define __IO volatile /*!< Defines 'read / write' permissions */ +/** + * @brief Universal Serial Bus Full Speed Device + */ + +typedef struct +{ + __IO uint16_t EP0R; /*!< USB Endpoint 0 register, Address offset: 0x00 */ + __IO uint16_t RESERVED0; /*!< Reserved */ + __IO uint16_t EP1R; /*!< USB Endpoint 1 register, Address offset: 0x04 */ + __IO uint16_t RESERVED1; /*!< Reserved */ + __IO uint16_t EP2R; /*!< USB Endpoint 2 register, Address offset: 0x08 */ + __IO uint16_t RESERVED2; /*!< Reserved */ + __IO uint16_t EP3R; /*!< USB Endpoint 3 register, Address offset: 0x0C */ + __IO uint16_t RESERVED3; /*!< Reserved */ + __IO uint16_t EP4R; /*!< USB Endpoint 4 register, Address offset: 0x10 */ + __IO uint16_t RESERVED4; /*!< Reserved */ + __IO uint16_t EP5R; /*!< USB Endpoint 5 register, Address offset: 0x14 */ + __IO uint16_t RESERVED5; /*!< Reserved */ + __IO uint16_t EP6R; /*!< USB Endpoint 6 register, Address offset: 0x18 */ + __IO uint16_t RESERVED6; /*!< Reserved */ + __IO uint16_t EP7R; /*!< USB Endpoint 7 register, Address offset: 0x1C */ + __IO uint16_t RESERVED7[17]; /*!< Reserved */ + __IO uint16_t CNTR; /*!< Control register, Address offset: 0x40 */ + __IO uint16_t RESERVED8; /*!< Reserved */ + __IO uint16_t ISTR; /*!< Interrupt status register, Address offset: 0x44 */ + __IO uint16_t RESERVED9; /*!< Reserved */ + __IO uint16_t FNR; /*!< Frame number register, Address offset: 0x48 */ + __IO uint16_t RESERVEDA; /*!< Reserved */ + __IO uint16_t DADDR; /*!< Device address register, Address offset: 0x4C */ + __IO uint16_t RESERVEDB; /*!< Reserved */ + __IO uint16_t BTABLE; /*!< Buffer Table address register, Address offset: 0x50 */ + __IO uint16_t RESERVEDC; /*!< Reserved */ + __IO uint16_t LPMCSR; /*!< LPM Control and Status register, Address offset: 0x54 */ + __IO uint16_t RESERVEDD; /*!< Reserved */ + __IO uint16_t BCDR; /*!< Battery Charging detector register, Address offset: 0x58 */ + __IO uint16_t RESERVEDE; /*!< Reserved */ +} USB_TypeDef; + +/******************************************************************************/ +/* */ +/* USB Device FS */ +/* */ +/******************************************************************************/ + +/*!< Endpoint-specific registers */ +#define USB_EP0R USB_BASE /*!< Endpoint 0 register address */ +#define USB_EP1R (USB_BASE + 0x00000004) /*!< Endpoint 1 register address */ +#define USB_EP2R (USB_BASE + 0x00000008) /*!< Endpoint 2 register address */ +#define USB_EP3R (USB_BASE + 0x0000000C) /*!< Endpoint 3 register address */ +#define USB_EP4R (USB_BASE + 0x00000010) /*!< Endpoint 4 register address */ +#define USB_EP5R (USB_BASE + 0x00000014) /*!< Endpoint 5 register address */ +#define USB_EP6R (USB_BASE + 0x00000018) /*!< Endpoint 6 register address */ +#define USB_EP7R (USB_BASE + 0x0000001C) /*!< Endpoint 7 register address */ + +/* bit positions */ +#define USB_EP_CTR_RX_Pos (15U) +#define USB_EP_CTR_RX_Msk (0x1UL << USB_EP_CTR_RX_Pos) /*!< 0x00008000 */ +#define USB_EP_CTR_RX USB_EP_CTR_RX_Msk /*!< EndPoint Correct TRansfer RX */ +#define USB_EP_DTOG_RX_Pos (14U) +#define USB_EP_DTOG_RX_Msk (0x1UL << USB_EP_DTOG_RX_Pos) /*!< 0x00004000 */ +#define USB_EP_DTOG_RX USB_EP_DTOG_RX_Msk /*!< EndPoint Data TOGGLE RX */ +#define USB_EPRX_STAT_Pos (12U) +#define USB_EPRX_STAT_Msk (0x3UL << USB_EPRX_STAT_Pos) /*!< 0x00003000 */ +#define USB_EPRX_STAT USB_EPRX_STAT_Msk /*!< EndPoint RX STATus bit field */ +#define USB_EP_SETUP_Pos (11U) +#define USB_EP_SETUP_Msk (0x1UL << USB_EP_SETUP_Pos) /*!< 0x00000800 */ +#define USB_EP_SETUP USB_EP_SETUP_Msk /*!< EndPoint SETUP */ +#define USB_EP_T_FIELD_Pos (9U) +#define USB_EP_T_FIELD_Msk (0x3UL << USB_EP_T_FIELD_Pos) /*!< 0x00000600 */ +#define USB_EP_T_FIELD USB_EP_T_FIELD_Msk /*!< EndPoint TYPE */ +#define USB_EP_KIND_Pos (8U) +#define USB_EP_KIND_Msk (0x1UL << USB_EP_KIND_Pos) /*!< 0x00000100 */ +#define USB_EP_KIND USB_EP_KIND_Msk /*!< EndPoint KIND */ +#define USB_EP_CTR_TX_Pos (7U) +#define USB_EP_CTR_TX_Msk (0x1UL << USB_EP_CTR_TX_Pos) /*!< 0x00000080 */ +#define USB_EP_CTR_TX USB_EP_CTR_TX_Msk /*!< EndPoint Correct TRansfer TX */ +#define USB_EP_DTOG_TX_Pos (6U) +#define USB_EP_DTOG_TX_Msk (0x1UL << USB_EP_DTOG_TX_Pos) /*!< 0x00000040 */ +#define USB_EP_DTOG_TX USB_EP_DTOG_TX_Msk /*!< EndPoint Data TOGGLE TX */ +#define USB_EPTX_STAT_Pos (4U) +#define USB_EPTX_STAT_Msk (0x3UL << USB_EPTX_STAT_Pos) /*!< 0x00000030 */ +#define USB_EPTX_STAT USB_EPTX_STAT_Msk /*!< EndPoint TX STATus bit field */ +#define USB_EPADDR_FIELD_Pos (0U) +#define USB_EPADDR_FIELD_Msk (0xFUL << USB_EPADDR_FIELD_Pos) /*!< 0x0000000F */ +#define USB_EPADDR_FIELD USB_EPADDR_FIELD_Msk /*!< EndPoint ADDRess FIELD */ + +/* EndPoint REGister MASK (no toggle fields) */ +#define USB_EPREG_MASK (USB_EP_CTR_RX|USB_EP_SETUP|USB_EP_T_FIELD|USB_EP_KIND|USB_EP_CTR_TX|USB_EPADDR_FIELD) + /*!< EP_TYPE[1:0] EndPoint TYPE */ +#define USB_EP_TYPE_MASK_Pos (9U) +#define USB_EP_TYPE_MASK_Msk (0x3UL << USB_EP_TYPE_MASK_Pos) /*!< 0x00000600 */ +#define USB_EP_TYPE_MASK USB_EP_TYPE_MASK_Msk /*!< EndPoint TYPE Mask */ +#define USB_EP_BULK 0x00000000U /*!< EndPoint BULK */ +#define USB_EP_CONTROL 0x00000200U /*!< EndPoint CONTROL */ +#define USB_EP_ISOCHRONOUS 0x00000400U /*!< EndPoint ISOCHRONOUS */ +#define USB_EP_INTERRUPT 0x00000600U /*!< EndPoint INTERRUPT */ +#define USB_EP_T_MASK (~USB_EP_T_FIELD & USB_EPREG_MASK) + +#define USB_EPKIND_MASK (~USB_EP_KIND & USB_EPREG_MASK) /*!< EP_KIND EndPoint KIND */ + /*!< STAT_TX[1:0] STATus for TX transfer */ +#define USB_EP_TX_DIS 0x00000000U /*!< EndPoint TX DISabled */ +#define USB_EP_TX_STALL 0x00000010U /*!< EndPoint TX STALLed */ +#define USB_EP_TX_NAK 0x00000020U /*!< EndPoint TX NAKed */ +#define USB_EP_TX_VALID 0x00000030U /*!< EndPoint TX VALID */ +#define USB_EPTX_DTOG1 0x00000010U /*!< EndPoint TX Data TOGgle bit1 */ +#define USB_EPTX_DTOG2 0x00000020U /*!< EndPoint TX Data TOGgle bit2 */ +#define USB_EPTX_DTOGMASK (USB_EPTX_STAT|USB_EPREG_MASK) + /*!< STAT_RX[1:0] STATus for RX transfer */ +#define USB_EP_RX_DIS 0x00000000U /*!< EndPoint RX DISabled */ +#define USB_EP_RX_STALL 0x00001000U /*!< EndPoint RX STALLed */ +#define USB_EP_RX_NAK 0x00002000U /*!< EndPoint RX NAKed */ +#define USB_EP_RX_VALID 0x00003000U /*!< EndPoint RX VALID */ +#define USB_EPRX_DTOG1 0x00001000U /*!< EndPoint RX Data TOGgle bit1 */ +#define USB_EPRX_DTOG2 0x00002000U /*!< EndPoint RX Data TOGgle bit1 */ +#define USB_EPRX_DTOGMASK (USB_EPRX_STAT|USB_EPREG_MASK) + +/******************* Bit definition for USB_EP0R register *******************/ +#define USB_EP0R_EA_Pos (0U) +#define USB_EP0R_EA_Msk (0xFUL << USB_EP0R_EA_Pos) /*!< 0x0000000F */ +#define USB_EP0R_EA USB_EP0R_EA_Msk /*!< Endpoint Address */ + +#define USB_EP0R_STAT_TX_Pos (4U) +#define USB_EP0R_STAT_TX_Msk (0x3UL << USB_EP0R_STAT_TX_Pos) /*!< 0x00000030 */ +#define USB_EP0R_STAT_TX USB_EP0R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP0R_STAT_TX_0 (0x1UL << USB_EP0R_STAT_TX_Pos) /*!< 0x00000010 */ +#define USB_EP0R_STAT_TX_1 (0x2UL << USB_EP0R_STAT_TX_Pos) /*!< 0x00000020 */ + +#define USB_EP0R_DTOG_TX_Pos (6U) +#define USB_EP0R_DTOG_TX_Msk (0x1UL << USB_EP0R_DTOG_TX_Pos) /*!< 0x00000040 */ +#define USB_EP0R_DTOG_TX USB_EP0R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ +#define USB_EP0R_CTR_TX_Pos (7U) +#define USB_EP0R_CTR_TX_Msk (0x1UL << USB_EP0R_CTR_TX_Pos) /*!< 0x00000080 */ +#define USB_EP0R_CTR_TX USB_EP0R_CTR_TX_Msk /*!< Correct Transfer for transmission */ +#define USB_EP0R_EP_KIND_Pos (8U) +#define USB_EP0R_EP_KIND_Msk (0x1UL << USB_EP0R_EP_KIND_Pos) /*!< 0x00000100 */ +#define USB_EP0R_EP_KIND USB_EP0R_EP_KIND_Msk /*!< Endpoint Kind */ + +#define USB_EP0R_EP_TYPE_Pos (9U) +#define USB_EP0R_EP_TYPE_Msk (0x3UL << USB_EP0R_EP_TYPE_Pos) /*!< 0x00000600 */ +#define USB_EP0R_EP_TYPE USB_EP0R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP0R_EP_TYPE_0 (0x1UL << USB_EP0R_EP_TYPE_Pos) /*!< 0x00000200 */ +#define USB_EP0R_EP_TYPE_1 (0x2UL << USB_EP0R_EP_TYPE_Pos) /*!< 0x00000400 */ + +#define USB_EP0R_SETUP_Pos (11U) +#define USB_EP0R_SETUP_Msk (0x1UL << USB_EP0R_SETUP_Pos) /*!< 0x00000800 */ +#define USB_EP0R_SETUP USB_EP0R_SETUP_Msk /*!< Setup transaction completed */ + +#define USB_EP0R_STAT_RX_Pos (12U) +#define USB_EP0R_STAT_RX_Msk (0x3UL << USB_EP0R_STAT_RX_Pos) /*!< 0x00003000 */ +#define USB_EP0R_STAT_RX USB_EP0R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP0R_STAT_RX_0 (0x1UL << USB_EP0R_STAT_RX_Pos) /*!< 0x00001000 */ +#define USB_EP0R_STAT_RX_1 (0x2UL << USB_EP0R_STAT_RX_Pos) /*!< 0x00002000 */ + +#define USB_EP0R_DTOG_RX_Pos (14U) +#define USB_EP0R_DTOG_RX_Msk (0x1UL << USB_EP0R_DTOG_RX_Pos) /*!< 0x00004000 */ +#define USB_EP0R_DTOG_RX USB_EP0R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ +#define USB_EP0R_CTR_RX_Pos (15U) +#define USB_EP0R_CTR_RX_Msk (0x1UL << USB_EP0R_CTR_RX_Pos) /*!< 0x00008000 */ +#define USB_EP0R_CTR_RX USB_EP0R_CTR_RX_Msk /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP1R register *******************/ +#define USB_EP1R_EA_Pos (0U) +#define USB_EP1R_EA_Msk (0xFUL << USB_EP1R_EA_Pos) /*!< 0x0000000F */ +#define USB_EP1R_EA USB_EP1R_EA_Msk /*!< Endpoint Address */ + +#define USB_EP1R_STAT_TX_Pos (4U) +#define USB_EP1R_STAT_TX_Msk (0x3UL << USB_EP1R_STAT_TX_Pos) /*!< 0x00000030 */ +#define USB_EP1R_STAT_TX USB_EP1R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP1R_STAT_TX_0 (0x1UL << USB_EP1R_STAT_TX_Pos) /*!< 0x00000010 */ +#define USB_EP1R_STAT_TX_1 (0x2UL << USB_EP1R_STAT_TX_Pos) /*!< 0x00000020 */ + +#define USB_EP1R_DTOG_TX_Pos (6U) +#define USB_EP1R_DTOG_TX_Msk (0x1UL << USB_EP1R_DTOG_TX_Pos) /*!< 0x00000040 */ +#define USB_EP1R_DTOG_TX USB_EP1R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ +#define USB_EP1R_CTR_TX_Pos (7U) +#define USB_EP1R_CTR_TX_Msk (0x1UL << USB_EP1R_CTR_TX_Pos) /*!< 0x00000080 */ +#define USB_EP1R_CTR_TX USB_EP1R_CTR_TX_Msk /*!< Correct Transfer for transmission */ +#define USB_EP1R_EP_KIND_Pos (8U) +#define USB_EP1R_EP_KIND_Msk (0x1UL << USB_EP1R_EP_KIND_Pos) /*!< 0x00000100 */ +#define USB_EP1R_EP_KIND USB_EP1R_EP_KIND_Msk /*!< Endpoint Kind */ + +#define USB_EP1R_EP_TYPE_Pos (9U) +#define USB_EP1R_EP_TYPE_Msk (0x3UL << USB_EP1R_EP_TYPE_Pos) /*!< 0x00000600 */ +#define USB_EP1R_EP_TYPE USB_EP1R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP1R_EP_TYPE_0 (0x1UL << USB_EP1R_EP_TYPE_Pos) /*!< 0x00000200 */ +#define USB_EP1R_EP_TYPE_1 (0x2UL << USB_EP1R_EP_TYPE_Pos) /*!< 0x00000400 */ + +#define USB_EP1R_SETUP_Pos (11U) +#define USB_EP1R_SETUP_Msk (0x1UL << USB_EP1R_SETUP_Pos) /*!< 0x00000800 */ +#define USB_EP1R_SETUP USB_EP1R_SETUP_Msk /*!< Setup transaction completed */ + +#define USB_EP1R_STAT_RX_Pos (12U) +#define USB_EP1R_STAT_RX_Msk (0x3UL << USB_EP1R_STAT_RX_Pos) /*!< 0x00003000 */ +#define USB_EP1R_STAT_RX USB_EP1R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP1R_STAT_RX_0 (0x1UL << USB_EP1R_STAT_RX_Pos) /*!< 0x00001000 */ +#define USB_EP1R_STAT_RX_1 (0x2UL << USB_EP1R_STAT_RX_Pos) /*!< 0x00002000 */ + +#define USB_EP1R_DTOG_RX_Pos (14U) +#define USB_EP1R_DTOG_RX_Msk (0x1UL << USB_EP1R_DTOG_RX_Pos) /*!< 0x00004000 */ +#define USB_EP1R_DTOG_RX USB_EP1R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ +#define USB_EP1R_CTR_RX_Pos (15U) +#define USB_EP1R_CTR_RX_Msk (0x1UL << USB_EP1R_CTR_RX_Pos) /*!< 0x00008000 */ +#define USB_EP1R_CTR_RX USB_EP1R_CTR_RX_Msk /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP2R register *******************/ +#define USB_EP2R_EA_Pos (0U) +#define USB_EP2R_EA_Msk (0xFUL << USB_EP2R_EA_Pos) /*!< 0x0000000F */ +#define USB_EP2R_EA USB_EP2R_EA_Msk /*!< Endpoint Address */ + +#define USB_EP2R_STAT_TX_Pos (4U) +#define USB_EP2R_STAT_TX_Msk (0x3UL << USB_EP2R_STAT_TX_Pos) /*!< 0x00000030 */ +#define USB_EP2R_STAT_TX USB_EP2R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP2R_STAT_TX_0 (0x1UL << USB_EP2R_STAT_TX_Pos) /*!< 0x00000010 */ +#define USB_EP2R_STAT_TX_1 (0x2UL << USB_EP2R_STAT_TX_Pos) /*!< 0x00000020 */ + +#define USB_EP2R_DTOG_TX_Pos (6U) +#define USB_EP2R_DTOG_TX_Msk (0x1UL << USB_EP2R_DTOG_TX_Pos) /*!< 0x00000040 */ +#define USB_EP2R_DTOG_TX USB_EP2R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ +#define USB_EP2R_CTR_TX_Pos (7U) +#define USB_EP2R_CTR_TX_Msk (0x1UL << USB_EP2R_CTR_TX_Pos) /*!< 0x00000080 */ +#define USB_EP2R_CTR_TX USB_EP2R_CTR_TX_Msk /*!< Correct Transfer for transmission */ +#define USB_EP2R_EP_KIND_Pos (8U) +#define USB_EP2R_EP_KIND_Msk (0x1UL << USB_EP2R_EP_KIND_Pos) /*!< 0x00000100 */ +#define USB_EP2R_EP_KIND USB_EP2R_EP_KIND_Msk /*!< Endpoint Kind */ + +#define USB_EP2R_EP_TYPE_Pos (9U) +#define USB_EP2R_EP_TYPE_Msk (0x3UL << USB_EP2R_EP_TYPE_Pos) /*!< 0x00000600 */ +#define USB_EP2R_EP_TYPE USB_EP2R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP2R_EP_TYPE_0 (0x1UL << USB_EP2R_EP_TYPE_Pos) /*!< 0x00000200 */ +#define USB_EP2R_EP_TYPE_1 (0x2UL << USB_EP2R_EP_TYPE_Pos) /*!< 0x00000400 */ + +#define USB_EP2R_SETUP_Pos (11U) +#define USB_EP2R_SETUP_Msk (0x1UL << USB_EP2R_SETUP_Pos) /*!< 0x00000800 */ +#define USB_EP2R_SETUP USB_EP2R_SETUP_Msk /*!< Setup transaction completed */ + +#define USB_EP2R_STAT_RX_Pos (12U) +#define USB_EP2R_STAT_RX_Msk (0x3UL << USB_EP2R_STAT_RX_Pos) /*!< 0x00003000 */ +#define USB_EP2R_STAT_RX USB_EP2R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP2R_STAT_RX_0 (0x1UL << USB_EP2R_STAT_RX_Pos) /*!< 0x00001000 */ +#define USB_EP2R_STAT_RX_1 (0x2UL << USB_EP2R_STAT_RX_Pos) /*!< 0x00002000 */ + +#define USB_EP2R_DTOG_RX_Pos (14U) +#define USB_EP2R_DTOG_RX_Msk (0x1UL << USB_EP2R_DTOG_RX_Pos) /*!< 0x00004000 */ +#define USB_EP2R_DTOG_RX USB_EP2R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ +#define USB_EP2R_CTR_RX_Pos (15U) +#define USB_EP2R_CTR_RX_Msk (0x1UL << USB_EP2R_CTR_RX_Pos) /*!< 0x00008000 */ +#define USB_EP2R_CTR_RX USB_EP2R_CTR_RX_Msk /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP3R register *******************/ +#define USB_EP3R_EA_Pos (0U) +#define USB_EP3R_EA_Msk (0xFUL << USB_EP3R_EA_Pos) /*!< 0x0000000F */ +#define USB_EP3R_EA USB_EP3R_EA_Msk /*!< Endpoint Address */ + +#define USB_EP3R_STAT_TX_Pos (4U) +#define USB_EP3R_STAT_TX_Msk (0x3UL << USB_EP3R_STAT_TX_Pos) /*!< 0x00000030 */ +#define USB_EP3R_STAT_TX USB_EP3R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP3R_STAT_TX_0 (0x1UL << USB_EP3R_STAT_TX_Pos) /*!< 0x00000010 */ +#define USB_EP3R_STAT_TX_1 (0x2UL << USB_EP3R_STAT_TX_Pos) /*!< 0x00000020 */ + +#define USB_EP3R_DTOG_TX_Pos (6U) +#define USB_EP3R_DTOG_TX_Msk (0x1UL << USB_EP3R_DTOG_TX_Pos) /*!< 0x00000040 */ +#define USB_EP3R_DTOG_TX USB_EP3R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ +#define USB_EP3R_CTR_TX_Pos (7U) +#define USB_EP3R_CTR_TX_Msk (0x1UL << USB_EP3R_CTR_TX_Pos) /*!< 0x00000080 */ +#define USB_EP3R_CTR_TX USB_EP3R_CTR_TX_Msk /*!< Correct Transfer for transmission */ +#define USB_EP3R_EP_KIND_Pos (8U) +#define USB_EP3R_EP_KIND_Msk (0x1UL << USB_EP3R_EP_KIND_Pos) /*!< 0x00000100 */ +#define USB_EP3R_EP_KIND USB_EP3R_EP_KIND_Msk /*!< Endpoint Kind */ + +#define USB_EP3R_EP_TYPE_Pos (9U) +#define USB_EP3R_EP_TYPE_Msk (0x3UL << USB_EP3R_EP_TYPE_Pos) /*!< 0x00000600 */ +#define USB_EP3R_EP_TYPE USB_EP3R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP3R_EP_TYPE_0 (0x1UL << USB_EP3R_EP_TYPE_Pos) /*!< 0x00000200 */ +#define USB_EP3R_EP_TYPE_1 (0x2UL << USB_EP3R_EP_TYPE_Pos) /*!< 0x00000400 */ + +#define USB_EP3R_SETUP_Pos (11U) +#define USB_EP3R_SETUP_Msk (0x1UL << USB_EP3R_SETUP_Pos) /*!< 0x00000800 */ +#define USB_EP3R_SETUP USB_EP3R_SETUP_Msk /*!< Setup transaction completed */ + +#define USB_EP3R_STAT_RX_Pos (12U) +#define USB_EP3R_STAT_RX_Msk (0x3UL << USB_EP3R_STAT_RX_Pos) /*!< 0x00003000 */ +#define USB_EP3R_STAT_RX USB_EP3R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP3R_STAT_RX_0 (0x1UL << USB_EP3R_STAT_RX_Pos) /*!< 0x00001000 */ +#define USB_EP3R_STAT_RX_1 (0x2UL << USB_EP3R_STAT_RX_Pos) /*!< 0x00002000 */ + +#define USB_EP3R_DTOG_RX_Pos (14U) +#define USB_EP3R_DTOG_RX_Msk (0x1UL << USB_EP3R_DTOG_RX_Pos) /*!< 0x00004000 */ +#define USB_EP3R_DTOG_RX USB_EP3R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ +#define USB_EP3R_CTR_RX_Pos (15U) +#define USB_EP3R_CTR_RX_Msk (0x1UL << USB_EP3R_CTR_RX_Pos) /*!< 0x00008000 */ +#define USB_EP3R_CTR_RX USB_EP3R_CTR_RX_Msk /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP4R register *******************/ +#define USB_EP4R_EA_Pos (0U) +#define USB_EP4R_EA_Msk (0xFUL << USB_EP4R_EA_Pos) /*!< 0x0000000F */ +#define USB_EP4R_EA USB_EP4R_EA_Msk /*!< Endpoint Address */ + +#define USB_EP4R_STAT_TX_Pos (4U) +#define USB_EP4R_STAT_TX_Msk (0x3UL << USB_EP4R_STAT_TX_Pos) /*!< 0x00000030 */ +#define USB_EP4R_STAT_TX USB_EP4R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP4R_STAT_TX_0 (0x1UL << USB_EP4R_STAT_TX_Pos) /*!< 0x00000010 */ +#define USB_EP4R_STAT_TX_1 (0x2UL << USB_EP4R_STAT_TX_Pos) /*!< 0x00000020 */ + +#define USB_EP4R_DTOG_TX_Pos (6U) +#define USB_EP4R_DTOG_TX_Msk (0x1UL << USB_EP4R_DTOG_TX_Pos) /*!< 0x00000040 */ +#define USB_EP4R_DTOG_TX USB_EP4R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ +#define USB_EP4R_CTR_TX_Pos (7U) +#define USB_EP4R_CTR_TX_Msk (0x1UL << USB_EP4R_CTR_TX_Pos) /*!< 0x00000080 */ +#define USB_EP4R_CTR_TX USB_EP4R_CTR_TX_Msk /*!< Correct Transfer for transmission */ +#define USB_EP4R_EP_KIND_Pos (8U) +#define USB_EP4R_EP_KIND_Msk (0x1UL << USB_EP4R_EP_KIND_Pos) /*!< 0x00000100 */ +#define USB_EP4R_EP_KIND USB_EP4R_EP_KIND_Msk /*!< Endpoint Kind */ + +#define USB_EP4R_EP_TYPE_Pos (9U) +#define USB_EP4R_EP_TYPE_Msk (0x3UL << USB_EP4R_EP_TYPE_Pos) /*!< 0x00000600 */ +#define USB_EP4R_EP_TYPE USB_EP4R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP4R_EP_TYPE_0 (0x1UL << USB_EP4R_EP_TYPE_Pos) /*!< 0x00000200 */ +#define USB_EP4R_EP_TYPE_1 (0x2UL << USB_EP4R_EP_TYPE_Pos) /*!< 0x00000400 */ + +#define USB_EP4R_SETUP_Pos (11U) +#define USB_EP4R_SETUP_Msk (0x1UL << USB_EP4R_SETUP_Pos) /*!< 0x00000800 */ +#define USB_EP4R_SETUP USB_EP4R_SETUP_Msk /*!< Setup transaction completed */ + +#define USB_EP4R_STAT_RX_Pos (12U) +#define USB_EP4R_STAT_RX_Msk (0x3UL << USB_EP4R_STAT_RX_Pos) /*!< 0x00003000 */ +#define USB_EP4R_STAT_RX USB_EP4R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP4R_STAT_RX_0 (0x1UL << USB_EP4R_STAT_RX_Pos) /*!< 0x00001000 */ +#define USB_EP4R_STAT_RX_1 (0x2UL << USB_EP4R_STAT_RX_Pos) /*!< 0x00002000 */ + +#define USB_EP4R_DTOG_RX_Pos (14U) +#define USB_EP4R_DTOG_RX_Msk (0x1UL << USB_EP4R_DTOG_RX_Pos) /*!< 0x00004000 */ +#define USB_EP4R_DTOG_RX USB_EP4R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ +#define USB_EP4R_CTR_RX_Pos (15U) +#define USB_EP4R_CTR_RX_Msk (0x1UL << USB_EP4R_CTR_RX_Pos) /*!< 0x00008000 */ +#define USB_EP4R_CTR_RX USB_EP4R_CTR_RX_Msk /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP5R register *******************/ +#define USB_EP5R_EA_Pos (0U) +#define USB_EP5R_EA_Msk (0xFUL << USB_EP5R_EA_Pos) /*!< 0x0000000F */ +#define USB_EP5R_EA USB_EP5R_EA_Msk /*!< Endpoint Address */ + +#define USB_EP5R_STAT_TX_Pos (4U) +#define USB_EP5R_STAT_TX_Msk (0x3UL << USB_EP5R_STAT_TX_Pos) /*!< 0x00000030 */ +#define USB_EP5R_STAT_TX USB_EP5R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP5R_STAT_TX_0 (0x1UL << USB_EP5R_STAT_TX_Pos) /*!< 0x00000010 */ +#define USB_EP5R_STAT_TX_1 (0x2UL << USB_EP5R_STAT_TX_Pos) /*!< 0x00000020 */ + +#define USB_EP5R_DTOG_TX_Pos (6U) +#define USB_EP5R_DTOG_TX_Msk (0x1UL << USB_EP5R_DTOG_TX_Pos) /*!< 0x00000040 */ +#define USB_EP5R_DTOG_TX USB_EP5R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ +#define USB_EP5R_CTR_TX_Pos (7U) +#define USB_EP5R_CTR_TX_Msk (0x1UL << USB_EP5R_CTR_TX_Pos) /*!< 0x00000080 */ +#define USB_EP5R_CTR_TX USB_EP5R_CTR_TX_Msk /*!< Correct Transfer for transmission */ +#define USB_EP5R_EP_KIND_Pos (8U) +#define USB_EP5R_EP_KIND_Msk (0x1UL << USB_EP5R_EP_KIND_Pos) /*!< 0x00000100 */ +#define USB_EP5R_EP_KIND USB_EP5R_EP_KIND_Msk /*!< Endpoint Kind */ + +#define USB_EP5R_EP_TYPE_Pos (9U) +#define USB_EP5R_EP_TYPE_Msk (0x3UL << USB_EP5R_EP_TYPE_Pos) /*!< 0x00000600 */ +#define USB_EP5R_EP_TYPE USB_EP5R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP5R_EP_TYPE_0 (0x1UL << USB_EP5R_EP_TYPE_Pos) /*!< 0x00000200 */ +#define USB_EP5R_EP_TYPE_1 (0x2UL << USB_EP5R_EP_TYPE_Pos) /*!< 0x00000400 */ + +#define USB_EP5R_SETUP_Pos (11U) +#define USB_EP5R_SETUP_Msk (0x1UL << USB_EP5R_SETUP_Pos) /*!< 0x00000800 */ +#define USB_EP5R_SETUP USB_EP5R_SETUP_Msk /*!< Setup transaction completed */ + +#define USB_EP5R_STAT_RX_Pos (12U) +#define USB_EP5R_STAT_RX_Msk (0x3UL << USB_EP5R_STAT_RX_Pos) /*!< 0x00003000 */ +#define USB_EP5R_STAT_RX USB_EP5R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP5R_STAT_RX_0 (0x1UL << USB_EP5R_STAT_RX_Pos) /*!< 0x00001000 */ +#define USB_EP5R_STAT_RX_1 (0x2UL << USB_EP5R_STAT_RX_Pos) /*!< 0x00002000 */ + +#define USB_EP5R_DTOG_RX_Pos (14U) +#define USB_EP5R_DTOG_RX_Msk (0x1UL << USB_EP5R_DTOG_RX_Pos) /*!< 0x00004000 */ +#define USB_EP5R_DTOG_RX USB_EP5R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ +#define USB_EP5R_CTR_RX_Pos (15U) +#define USB_EP5R_CTR_RX_Msk (0x1UL << USB_EP5R_CTR_RX_Pos) /*!< 0x00008000 */ +#define USB_EP5R_CTR_RX USB_EP5R_CTR_RX_Msk /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP6R register *******************/ +#define USB_EP6R_EA_Pos (0U) +#define USB_EP6R_EA_Msk (0xFUL << USB_EP6R_EA_Pos) /*!< 0x0000000F */ +#define USB_EP6R_EA USB_EP6R_EA_Msk /*!< Endpoint Address */ + +#define USB_EP6R_STAT_TX_Pos (4U) +#define USB_EP6R_STAT_TX_Msk (0x3UL << USB_EP6R_STAT_TX_Pos) /*!< 0x00000030 */ +#define USB_EP6R_STAT_TX USB_EP6R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP6R_STAT_TX_0 (0x1UL << USB_EP6R_STAT_TX_Pos) /*!< 0x00000010 */ +#define USB_EP6R_STAT_TX_1 (0x2UL << USB_EP6R_STAT_TX_Pos) /*!< 0x00000020 */ + +#define USB_EP6R_DTOG_TX_Pos (6U) +#define USB_EP6R_DTOG_TX_Msk (0x1UL << USB_EP6R_DTOG_TX_Pos) /*!< 0x00000040 */ +#define USB_EP6R_DTOG_TX USB_EP6R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ +#define USB_EP6R_CTR_TX_Pos (7U) +#define USB_EP6R_CTR_TX_Msk (0x1UL << USB_EP6R_CTR_TX_Pos) /*!< 0x00000080 */ +#define USB_EP6R_CTR_TX USB_EP6R_CTR_TX_Msk /*!< Correct Transfer for transmission */ +#define USB_EP6R_EP_KIND_Pos (8U) +#define USB_EP6R_EP_KIND_Msk (0x1UL << USB_EP6R_EP_KIND_Pos) /*!< 0x00000100 */ +#define USB_EP6R_EP_KIND USB_EP6R_EP_KIND_Msk /*!< Endpoint Kind */ + +#define USB_EP6R_EP_TYPE_Pos (9U) +#define USB_EP6R_EP_TYPE_Msk (0x3UL << USB_EP6R_EP_TYPE_Pos) /*!< 0x00000600 */ +#define USB_EP6R_EP_TYPE USB_EP6R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP6R_EP_TYPE_0 (0x1UL << USB_EP6R_EP_TYPE_Pos) /*!< 0x00000200 */ +#define USB_EP6R_EP_TYPE_1 (0x2UL << USB_EP6R_EP_TYPE_Pos) /*!< 0x00000400 */ + +#define USB_EP6R_SETUP_Pos (11U) +#define USB_EP6R_SETUP_Msk (0x1UL << USB_EP6R_SETUP_Pos) /*!< 0x00000800 */ +#define USB_EP6R_SETUP USB_EP6R_SETUP_Msk /*!< Setup transaction completed */ + +#define USB_EP6R_STAT_RX_Pos (12U) +#define USB_EP6R_STAT_RX_Msk (0x3UL << USB_EP6R_STAT_RX_Pos) /*!< 0x00003000 */ +#define USB_EP6R_STAT_RX USB_EP6R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP6R_STAT_RX_0 (0x1UL << USB_EP6R_STAT_RX_Pos) /*!< 0x00001000 */ +#define USB_EP6R_STAT_RX_1 (0x2UL << USB_EP6R_STAT_RX_Pos) /*!< 0x00002000 */ + +#define USB_EP6R_DTOG_RX_Pos (14U) +#define USB_EP6R_DTOG_RX_Msk (0x1UL << USB_EP6R_DTOG_RX_Pos) /*!< 0x00004000 */ +#define USB_EP6R_DTOG_RX USB_EP6R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ +#define USB_EP6R_CTR_RX_Pos (15U) +#define USB_EP6R_CTR_RX_Msk (0x1UL << USB_EP6R_CTR_RX_Pos) /*!< 0x00008000 */ +#define USB_EP6R_CTR_RX USB_EP6R_CTR_RX_Msk /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP7R register *******************/ +#define USB_EP7R_EA_Pos (0U) +#define USB_EP7R_EA_Msk (0xFUL << USB_EP7R_EA_Pos) /*!< 0x0000000F */ +#define USB_EP7R_EA USB_EP7R_EA_Msk /*!< Endpoint Address */ + +#define USB_EP7R_STAT_TX_Pos (4U) +#define USB_EP7R_STAT_TX_Msk (0x3UL << USB_EP7R_STAT_TX_Pos) /*!< 0x00000030 */ +#define USB_EP7R_STAT_TX USB_EP7R_STAT_TX_Msk /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP7R_STAT_TX_0 (0x1UL << USB_EP7R_STAT_TX_Pos) /*!< 0x00000010 */ +#define USB_EP7R_STAT_TX_1 (0x2UL << USB_EP7R_STAT_TX_Pos) /*!< 0x00000020 */ + +#define USB_EP7R_DTOG_TX_Pos (6U) +#define USB_EP7R_DTOG_TX_Msk (0x1UL << USB_EP7R_DTOG_TX_Pos) /*!< 0x00000040 */ +#define USB_EP7R_DTOG_TX USB_EP7R_DTOG_TX_Msk /*!< Data Toggle, for transmission transfers */ +#define USB_EP7R_CTR_TX_Pos (7U) +#define USB_EP7R_CTR_TX_Msk (0x1UL << USB_EP7R_CTR_TX_Pos) /*!< 0x00000080 */ +#define USB_EP7R_CTR_TX USB_EP7R_CTR_TX_Msk /*!< Correct Transfer for transmission */ +#define USB_EP7R_EP_KIND_Pos (8U) +#define USB_EP7R_EP_KIND_Msk (0x1UL << USB_EP7R_EP_KIND_Pos) /*!< 0x00000100 */ +#define USB_EP7R_EP_KIND USB_EP7R_EP_KIND_Msk /*!< Endpoint Kind */ + +#define USB_EP7R_EP_TYPE_Pos (9U) +#define USB_EP7R_EP_TYPE_Msk (0x3UL << USB_EP7R_EP_TYPE_Pos) /*!< 0x00000600 */ +#define USB_EP7R_EP_TYPE USB_EP7R_EP_TYPE_Msk /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP7R_EP_TYPE_0 (0x1UL << USB_EP7R_EP_TYPE_Pos) /*!< 0x00000200 */ +#define USB_EP7R_EP_TYPE_1 (0x2UL << USB_EP7R_EP_TYPE_Pos) /*!< 0x00000400 */ + +#define USB_EP7R_SETUP_Pos (11U) +#define USB_EP7R_SETUP_Msk (0x1UL << USB_EP7R_SETUP_Pos) /*!< 0x00000800 */ +#define USB_EP7R_SETUP USB_EP7R_SETUP_Msk /*!< Setup transaction completed */ + +#define USB_EP7R_STAT_RX_Pos (12U) +#define USB_EP7R_STAT_RX_Msk (0x3UL << USB_EP7R_STAT_RX_Pos) /*!< 0x00003000 */ +#define USB_EP7R_STAT_RX USB_EP7R_STAT_RX_Msk /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP7R_STAT_RX_0 (0x1UL << USB_EP7R_STAT_RX_Pos) /*!< 0x00001000 */ +#define USB_EP7R_STAT_RX_1 (0x2UL << USB_EP7R_STAT_RX_Pos) /*!< 0x00002000 */ + +#define USB_EP7R_DTOG_RX_Pos (14U) +#define USB_EP7R_DTOG_RX_Msk (0x1UL << USB_EP7R_DTOG_RX_Pos) /*!< 0x00004000 */ +#define USB_EP7R_DTOG_RX USB_EP7R_DTOG_RX_Msk /*!< Data Toggle, for reception transfers */ +#define USB_EP7R_CTR_RX_Pos (15U) +#define USB_EP7R_CTR_RX_Msk (0x1UL << USB_EP7R_CTR_RX_Pos) /*!< 0x00008000 */ +#define USB_EP7R_CTR_RX USB_EP7R_CTR_RX_Msk /*!< Correct Transfer for reception */ + +/*!< Common registers */ +/******************* Bit definition for USB_CNTR register *******************/ +#define USB_CNTR_FRES_Pos (0U) +#define USB_CNTR_FRES_Msk (0x1UL << USB_CNTR_FRES_Pos) /*!< 0x00000001 */ +#define USB_CNTR_FRES USB_CNTR_FRES_Msk /*!< Force USB Reset */ +#define USB_CNTR_PDWN_Pos (1U) +#define USB_CNTR_PDWN_Msk (0x1UL << USB_CNTR_PDWN_Pos) /*!< 0x00000002 */ +#define USB_CNTR_PDWN USB_CNTR_PDWN_Msk /*!< Power down */ +#define USB_CNTR_LP_MODE_Pos (2U) +#define USB_CNTR_LP_MODE_Msk (0x1UL << USB_CNTR_LP_MODE_Pos) /*!< 0x00000004 */ +#define USB_CNTR_LP_MODE USB_CNTR_LP_MODE_Msk /*!< Low-power mode */ +#define USB_CNTR_FSUSP_Pos (3U) +#define USB_CNTR_FSUSP_Msk (0x1UL << USB_CNTR_FSUSP_Pos) /*!< 0x00000008 */ +#define USB_CNTR_FSUSP USB_CNTR_FSUSP_Msk /*!< Force suspend */ +#define USB_CNTR_RESUME_Pos (4U) +#define USB_CNTR_RESUME_Msk (0x1UL << USB_CNTR_RESUME_Pos) /*!< 0x00000010 */ +#define USB_CNTR_RESUME USB_CNTR_RESUME_Msk /*!< Resume request */ +#define USB_CNTR_ESOFM_Pos (8U) +#define USB_CNTR_ESOFM_Msk (0x1UL << USB_CNTR_ESOFM_Pos) /*!< 0x00000100 */ +#define USB_CNTR_ESOFM USB_CNTR_ESOFM_Msk /*!< Expected Start Of Frame Interrupt Mask */ +#define USB_CNTR_SOFM_Pos (9U) +#define USB_CNTR_SOFM_Msk (0x1UL << USB_CNTR_SOFM_Pos) /*!< 0x00000200 */ +#define USB_CNTR_SOFM USB_CNTR_SOFM_Msk /*!< Start Of Frame Interrupt Mask */ +#define USB_CNTR_RESETM_Pos (10U) +#define USB_CNTR_RESETM_Msk (0x1UL << USB_CNTR_RESETM_Pos) /*!< 0x00000400 */ +#define USB_CNTR_RESETM USB_CNTR_RESETM_Msk /*!< RESET Interrupt Mask */ +#define USB_CNTR_SUSPM_Pos (11U) +#define USB_CNTR_SUSPM_Msk (0x1UL << USB_CNTR_SUSPM_Pos) /*!< 0x00000800 */ +#define USB_CNTR_SUSPM USB_CNTR_SUSPM_Msk /*!< Suspend mode Interrupt Mask */ +#define USB_CNTR_WKUPM_Pos (12U) +#define USB_CNTR_WKUPM_Msk (0x1UL << USB_CNTR_WKUPM_Pos) /*!< 0x00001000 */ +#define USB_CNTR_WKUPM USB_CNTR_WKUPM_Msk /*!< Wakeup Interrupt Mask */ +#define USB_CNTR_ERRM_Pos (13U) +#define USB_CNTR_ERRM_Msk (0x1UL << USB_CNTR_ERRM_Pos) /*!< 0x00002000 */ +#define USB_CNTR_ERRM USB_CNTR_ERRM_Msk /*!< Error Interrupt Mask */ +#define USB_CNTR_PMAOVRM_Pos (14U) +#define USB_CNTR_PMAOVRM_Msk (0x1UL << USB_CNTR_PMAOVRM_Pos) /*!< 0x00004000 */ +#define USB_CNTR_PMAOVRM USB_CNTR_PMAOVRM_Msk /*!< Packet Memory Area Over / Underrun Interrupt Mask */ +#define USB_CNTR_CTRM_Pos (15U) +#define USB_CNTR_CTRM_Msk (0x1UL << USB_CNTR_CTRM_Pos) /*!< 0x00008000 */ +#define USB_CNTR_CTRM USB_CNTR_CTRM_Msk /*!< Correct Transfer Interrupt Mask */ + +/******************* Bit definition for USB_ISTR register *******************/ +#define USB_ISTR_EP_ID_Pos (0U) +#define USB_ISTR_EP_ID_Msk (0xFUL << USB_ISTR_EP_ID_Pos) /*!< 0x0000000F */ +#define USB_ISTR_EP_ID USB_ISTR_EP_ID_Msk /*!< Endpoint Identifier */ +#define USB_ISTR_DIR_Pos (4U) +#define USB_ISTR_DIR_Msk (0x1UL << USB_ISTR_DIR_Pos) /*!< 0x00000010 */ +#define USB_ISTR_DIR USB_ISTR_DIR_Msk /*!< Direction of transaction */ +#define USB_ISTR_ESOF_Pos (8U) +#define USB_ISTR_ESOF_Msk (0x1UL << USB_ISTR_ESOF_Pos) /*!< 0x00000100 */ +#define USB_ISTR_ESOF USB_ISTR_ESOF_Msk /*!< Expected Start Of Frame */ +#define USB_ISTR_SOF_Pos (9U) +#define USB_ISTR_SOF_Msk (0x1UL << USB_ISTR_SOF_Pos) /*!< 0x00000200 */ +#define USB_ISTR_SOF USB_ISTR_SOF_Msk /*!< Start Of Frame */ +#define USB_ISTR_RESET_Pos (10U) +#define USB_ISTR_RESET_Msk (0x1UL << USB_ISTR_RESET_Pos) /*!< 0x00000400 */ +#define USB_ISTR_RESET USB_ISTR_RESET_Msk /*!< USB RESET request */ +#define USB_ISTR_SUSP_Pos (11U) +#define USB_ISTR_SUSP_Msk (0x1UL << USB_ISTR_SUSP_Pos) /*!< 0x00000800 */ +#define USB_ISTR_SUSP USB_ISTR_SUSP_Msk /*!< Suspend mode request */ +#define USB_ISTR_WKUP_Pos (12U) +#define USB_ISTR_WKUP_Msk (0x1UL << USB_ISTR_WKUP_Pos) /*!< 0x00001000 */ +#define USB_ISTR_WKUP USB_ISTR_WKUP_Msk /*!< Wake up */ +#define USB_ISTR_ERR_Pos (13U) +#define USB_ISTR_ERR_Msk (0x1UL << USB_ISTR_ERR_Pos) /*!< 0x00002000 */ +#define USB_ISTR_ERR USB_ISTR_ERR_Msk /*!< Error */ +#define USB_ISTR_PMAOVR_Pos (14U) +#define USB_ISTR_PMAOVR_Msk (0x1UL << USB_ISTR_PMAOVR_Pos) /*!< 0x00004000 */ +#define USB_ISTR_PMAOVR USB_ISTR_PMAOVR_Msk /*!< Packet Memory Area Over / Underrun */ +#define USB_ISTR_CTR_Pos (15U) +#define USB_ISTR_CTR_Msk (0x1UL << USB_ISTR_CTR_Pos) /*!< 0x00008000 */ +#define USB_ISTR_CTR USB_ISTR_CTR_Msk /*!< Correct Transfer */ + +/******************* Bit definition for USB_FNR register ********************/ +#define USB_FNR_FN_Pos (0U) +#define USB_FNR_FN_Msk (0x7FFUL << USB_FNR_FN_Pos) /*!< 0x000007FF */ +#define USB_FNR_FN USB_FNR_FN_Msk /*!< Frame Number */ +#define USB_FNR_LSOF_Pos (11U) +#define USB_FNR_LSOF_Msk (0x3UL << USB_FNR_LSOF_Pos) /*!< 0x00001800 */ +#define USB_FNR_LSOF USB_FNR_LSOF_Msk /*!< Lost SOF */ +#define USB_FNR_LCK_Pos (13U) +#define USB_FNR_LCK_Msk (0x1UL << USB_FNR_LCK_Pos) /*!< 0x00002000 */ +#define USB_FNR_LCK USB_FNR_LCK_Msk /*!< Locked */ +#define USB_FNR_RXDM_Pos (14U) +#define USB_FNR_RXDM_Msk (0x1UL << USB_FNR_RXDM_Pos) /*!< 0x00004000 */ +#define USB_FNR_RXDM USB_FNR_RXDM_Msk /*!< Receive Data - Line Status */ +#define USB_FNR_RXDP_Pos (15U) +#define USB_FNR_RXDP_Msk (0x1UL << USB_FNR_RXDP_Pos) /*!< 0x00008000 */ +#define USB_FNR_RXDP USB_FNR_RXDP_Msk /*!< Receive Data + Line Status */ + +/****************** Bit definition for USB_DADDR register *******************/ +#define USB_DADDR_ADD_Pos (0U) +#define USB_DADDR_ADD_Msk (0x7FUL << USB_DADDR_ADD_Pos) /*!< 0x0000007F */ +#define USB_DADDR_ADD USB_DADDR_ADD_Msk /*!< ADD[6:0] bits (Device Address) */ +#define USB_DADDR_ADD0_Pos (0U) +#define USB_DADDR_ADD0_Msk (0x1UL << USB_DADDR_ADD0_Pos) /*!< 0x00000001 */ +#define USB_DADDR_ADD0 USB_DADDR_ADD0_Msk /*!< Bit 0 */ +#define USB_DADDR_ADD1_Pos (1U) +#define USB_DADDR_ADD1_Msk (0x1UL << USB_DADDR_ADD1_Pos) /*!< 0x00000002 */ +#define USB_DADDR_ADD1 USB_DADDR_ADD1_Msk /*!< Bit 1 */ +#define USB_DADDR_ADD2_Pos (2U) +#define USB_DADDR_ADD2_Msk (0x1UL << USB_DADDR_ADD2_Pos) /*!< 0x00000004 */ +#define USB_DADDR_ADD2 USB_DADDR_ADD2_Msk /*!< Bit 2 */ +#define USB_DADDR_ADD3_Pos (3U) +#define USB_DADDR_ADD3_Msk (0x1UL << USB_DADDR_ADD3_Pos) /*!< 0x00000008 */ +#define USB_DADDR_ADD3 USB_DADDR_ADD3_Msk /*!< Bit 3 */ +#define USB_DADDR_ADD4_Pos (4U) +#define USB_DADDR_ADD4_Msk (0x1UL << USB_DADDR_ADD4_Pos) /*!< 0x00000010 */ +#define USB_DADDR_ADD4 USB_DADDR_ADD4_Msk /*!< Bit 4 */ +#define USB_DADDR_ADD5_Pos (5U) +#define USB_DADDR_ADD5_Msk (0x1UL << USB_DADDR_ADD5_Pos) /*!< 0x00000020 */ +#define USB_DADDR_ADD5 USB_DADDR_ADD5_Msk /*!< Bit 5 */ +#define USB_DADDR_ADD6_Pos (6U) +#define USB_DADDR_ADD6_Msk (0x1UL << USB_DADDR_ADD6_Pos) /*!< 0x00000040 */ +#define USB_DADDR_ADD6 USB_DADDR_ADD6_Msk /*!< Bit 6 */ + +#define USB_DADDR_EF_Pos (7U) +#define USB_DADDR_EF_Msk (0x1UL << USB_DADDR_EF_Pos) /*!< 0x00000080 */ +#define USB_DADDR_EF USB_DADDR_EF_Msk /*!< Enable Function */ + +/****************** Bit definition for USB_BTABLE register ******************/ +#define USB_BTABLE_BTABLE_Pos (3U) +#define USB_BTABLE_BTABLE_Msk (0x1FFFUL << USB_BTABLE_BTABLE_Pos) /*!< 0x0000FFF8 */ +#define USB_BTABLE_BTABLE USB_BTABLE_BTABLE_Msk /*!< Buffer Table */ + +/****************** Bits definition for USB_BCDR register *******************/ +#define USB_BCDR_BCDEN ((uint16_t)0x0001U) /*!< Battery charging detector (BCD) enable */ +#define USB_BCDR_DCDEN ((uint16_t)0x0002U) /*!< Data contact detection (DCD) mode enable */ +#define USB_BCDR_PDEN ((uint16_t)0x0004U) /*!< Primary detection (PD) mode enable */ +#define USB_BCDR_SDEN ((uint16_t)0x0008U) /*!< Secondary detection (SD) mode enable */ +#define USB_BCDR_DCDET ((uint16_t)0x0010U) /*!< Data contact detection (DCD) status */ +#define USB_BCDR_PDET ((uint16_t)0x0020U) /*!< Primary detection (PD) status */ +#define USB_BCDR_SDET ((uint16_t)0x0040U) /*!< Secondary detection (SD) status */ +#define USB_BCDR_PS2DET ((uint16_t)0x0080U) /*!< PS2 port or proprietary charger detected */ +#define USB_BCDR_DPPU ((uint16_t)0x8000U) /*!< DP Pull-up Enable */ + +/******************* Bit definition for LPMCSR register *********************/ +#define USB_LPMCSR_LMPEN ((uint16_t)0x0001U) /*!< LPM support enable */ +#define USB_LPMCSR_LPMACK ((uint16_t)0x0002U) /*!< LPM Token acknowledge enable*/ +#define USB_LPMCSR_REMWAKE ((uint16_t)0x0008U) /*!< bRemoteWake value received with last ACKed LPM Token */ +#define USB_LPMCSR_BESL ((uint16_t)0x00F0U) /*!< BESL value received with last ACKed LPM Token */ + +/*!< Buffer descriptor table */ +/***************** Bit definition for USB_ADDR0_TX register *****************/ +#define USB_ADDR0_TX_ADDR0_TX_Pos (1U) +#define USB_ADDR0_TX_ADDR0_TX_Msk (0x7FFFUL << USB_ADDR0_TX_ADDR0_TX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR0_TX_ADDR0_TX USB_ADDR0_TX_ADDR0_TX_Msk /*!< Transmission Buffer Address 0 */ + +/***************** Bit definition for USB_ADDR1_TX register *****************/ +#define USB_ADDR1_TX_ADDR1_TX_Pos (1U) +#define USB_ADDR1_TX_ADDR1_TX_Msk (0x7FFFUL << USB_ADDR1_TX_ADDR1_TX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR1_TX_ADDR1_TX USB_ADDR1_TX_ADDR1_TX_Msk /*!< Transmission Buffer Address 1 */ + +/***************** Bit definition for USB_ADDR2_TX register *****************/ +#define USB_ADDR2_TX_ADDR2_TX_Pos (1U) +#define USB_ADDR2_TX_ADDR2_TX_Msk (0x7FFFUL << USB_ADDR2_TX_ADDR2_TX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR2_TX_ADDR2_TX USB_ADDR2_TX_ADDR2_TX_Msk /*!< Transmission Buffer Address 2 */ + +/***************** Bit definition for USB_ADDR3_TX register *****************/ +#define USB_ADDR3_TX_ADDR3_TX_Pos (1U) +#define USB_ADDR3_TX_ADDR3_TX_Msk (0x7FFFUL << USB_ADDR3_TX_ADDR3_TX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR3_TX_ADDR3_TX USB_ADDR3_TX_ADDR3_TX_Msk /*!< Transmission Buffer Address 3 */ + +/***************** Bit definition for USB_ADDR4_TX register *****************/ +#define USB_ADDR4_TX_ADDR4_TX_Pos (1U) +#define USB_ADDR4_TX_ADDR4_TX_Msk (0x7FFFUL << USB_ADDR4_TX_ADDR4_TX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR4_TX_ADDR4_TX USB_ADDR4_TX_ADDR4_TX_Msk /*!< Transmission Buffer Address 4 */ + +/***************** Bit definition for USB_ADDR5_TX register *****************/ +#define USB_ADDR5_TX_ADDR5_TX_Pos (1U) +#define USB_ADDR5_TX_ADDR5_TX_Msk (0x7FFFUL << USB_ADDR5_TX_ADDR5_TX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR5_TX_ADDR5_TX USB_ADDR5_TX_ADDR5_TX_Msk /*!< Transmission Buffer Address 5 */ + +/***************** Bit definition for USB_ADDR6_TX register *****************/ +#define USB_ADDR6_TX_ADDR6_TX_Pos (1U) +#define USB_ADDR6_TX_ADDR6_TX_Msk (0x7FFFUL << USB_ADDR6_TX_ADDR6_TX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR6_TX_ADDR6_TX USB_ADDR6_TX_ADDR6_TX_Msk /*!< Transmission Buffer Address 6 */ + +/***************** Bit definition for USB_ADDR7_TX register *****************/ +#define USB_ADDR7_TX_ADDR7_TX_Pos (1U) +#define USB_ADDR7_TX_ADDR7_TX_Msk (0x7FFFUL << USB_ADDR7_TX_ADDR7_TX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR7_TX_ADDR7_TX USB_ADDR7_TX_ADDR7_TX_Msk /*!< Transmission Buffer Address 7 */ + +/*----------------------------------------------------------------------------*/ + +/***************** Bit definition for USB_COUNT0_TX register ****************/ +#define USB_COUNT0_TX_COUNT0_TX_Pos (0U) +#define USB_COUNT0_TX_COUNT0_TX_Msk (0x3FFUL << USB_COUNT0_TX_COUNT0_TX_Pos) /*!< 0x000003FF */ +#define USB_COUNT0_TX_COUNT0_TX USB_COUNT0_TX_COUNT0_TX_Msk /*!< Transmission Byte Count 0 */ + +/***************** Bit definition for USB_COUNT1_TX register ****************/ +#define USB_COUNT1_TX_COUNT1_TX_Pos (0U) +#define USB_COUNT1_TX_COUNT1_TX_Msk (0x3FFUL << USB_COUNT1_TX_COUNT1_TX_Pos) /*!< 0x000003FF */ +#define USB_COUNT1_TX_COUNT1_TX USB_COUNT1_TX_COUNT1_TX_Msk /*!< Transmission Byte Count 1 */ + +/***************** Bit definition for USB_COUNT2_TX register ****************/ +#define USB_COUNT2_TX_COUNT2_TX_Pos (0U) +#define USB_COUNT2_TX_COUNT2_TX_Msk (0x3FFUL << USB_COUNT2_TX_COUNT2_TX_Pos) /*!< 0x000003FF */ +#define USB_COUNT2_TX_COUNT2_TX USB_COUNT2_TX_COUNT2_TX_Msk /*!< Transmission Byte Count 2 */ + +/***************** Bit definition for USB_COUNT3_TX register ****************/ +#define USB_COUNT3_TX_COUNT3_TX_Pos (0U) +#define USB_COUNT3_TX_COUNT3_TX_Msk (0x3FFUL << USB_COUNT3_TX_COUNT3_TX_Pos) /*!< 0x000003FF */ +#define USB_COUNT3_TX_COUNT3_TX USB_COUNT3_TX_COUNT3_TX_Msk /*!< Transmission Byte Count 3 */ + +/***************** Bit definition for USB_COUNT4_TX register ****************/ +#define USB_COUNT4_TX_COUNT4_TX_Pos (0U) +#define USB_COUNT4_TX_COUNT4_TX_Msk (0x3FFUL << USB_COUNT4_TX_COUNT4_TX_Pos) /*!< 0x000003FF */ +#define USB_COUNT4_TX_COUNT4_TX USB_COUNT4_TX_COUNT4_TX_Msk /*!< Transmission Byte Count 4 */ + +/***************** Bit definition for USB_COUNT5_TX register ****************/ +#define USB_COUNT5_TX_COUNT5_TX_Pos (0U) +#define USB_COUNT5_TX_COUNT5_TX_Msk (0x3FFUL << USB_COUNT5_TX_COUNT5_TX_Pos) /*!< 0x000003FF */ +#define USB_COUNT5_TX_COUNT5_TX USB_COUNT5_TX_COUNT5_TX_Msk /*!< Transmission Byte Count 5 */ + +/***************** Bit definition for USB_COUNT6_TX register ****************/ +#define USB_COUNT6_TX_COUNT6_TX_Pos (0U) +#define USB_COUNT6_TX_COUNT6_TX_Msk (0x3FFUL << USB_COUNT6_TX_COUNT6_TX_Pos) /*!< 0x000003FF */ +#define USB_COUNT6_TX_COUNT6_TX USB_COUNT6_TX_COUNT6_TX_Msk /*!< Transmission Byte Count 6 */ + +/***************** Bit definition for USB_COUNT7_TX register ****************/ +#define USB_COUNT7_TX_COUNT7_TX_Pos (0U) +#define USB_COUNT7_TX_COUNT7_TX_Msk (0x3FFUL << USB_COUNT7_TX_COUNT7_TX_Pos) /*!< 0x000003FF */ +#define USB_COUNT7_TX_COUNT7_TX USB_COUNT7_TX_COUNT7_TX_Msk /*!< Transmission Byte Count 7 */ + +/*----------------------------------------------------------------------------*/ + +/**************** Bit definition for USB_COUNT0_TX_0 register ***************/ +#define USB_COUNT0_TX_0_COUNT0_TX_0 0x000003FFU /*!< Transmission Byte Count 0 (low) */ + +/**************** Bit definition for USB_COUNT0_TX_1 register ***************/ +#define USB_COUNT0_TX_1_COUNT0_TX_1 0x03FF0000U /*!< Transmission Byte Count 0 (high) */ + +/**************** Bit definition for USB_COUNT1_TX_0 register ***************/ +#define USB_COUNT1_TX_0_COUNT1_TX_0 0x000003FFU /*!< Transmission Byte Count 1 (low) */ + +/**************** Bit definition for USB_COUNT1_TX_1 register ***************/ +#define USB_COUNT1_TX_1_COUNT1_TX_1 0x03FF0000U /*!< Transmission Byte Count 1 (high) */ + +/**************** Bit definition for USB_COUNT2_TX_0 register ***************/ +#define USB_COUNT2_TX_0_COUNT2_TX_0 0x000003FFU /*!< Transmission Byte Count 2 (low) */ + +/**************** Bit definition for USB_COUNT2_TX_1 register ***************/ +#define USB_COUNT2_TX_1_COUNT2_TX_1 0x03FF0000U /*!< Transmission Byte Count 2 (high) */ + +/**************** Bit definition for USB_COUNT3_TX_0 register ***************/ +#define USB_COUNT3_TX_0_COUNT3_TX_0 0x000003FFU /*!< Transmission Byte Count 3 (low) */ + +/**************** Bit definition for USB_COUNT3_TX_1 register ***************/ +#define USB_COUNT3_TX_1_COUNT3_TX_1 0x03FF0000U /*!< Transmission Byte Count 3 (high) */ + +/**************** Bit definition for USB_COUNT4_TX_0 register ***************/ +#define USB_COUNT4_TX_0_COUNT4_TX_0 0x000003FFU /*!< Transmission Byte Count 4 (low) */ + +/**************** Bit definition for USB_COUNT4_TX_1 register ***************/ +#define USB_COUNT4_TX_1_COUNT4_TX_1 0x03FF0000U /*!< Transmission Byte Count 4 (high) */ + +/**************** Bit definition for USB_COUNT5_TX_0 register ***************/ +#define USB_COUNT5_TX_0_COUNT5_TX_0 0x000003FFU /*!< Transmission Byte Count 5 (low) */ + +/**************** Bit definition for USB_COUNT5_TX_1 register ***************/ +#define USB_COUNT5_TX_1_COUNT5_TX_1 0x03FF0000U /*!< Transmission Byte Count 5 (high) */ + +/**************** Bit definition for USB_COUNT6_TX_0 register ***************/ +#define USB_COUNT6_TX_0_COUNT6_TX_0 0x000003FFU /*!< Transmission Byte Count 6 (low) */ + +/**************** Bit definition for USB_COUNT6_TX_1 register ***************/ +#define USB_COUNT6_TX_1_COUNT6_TX_1 0x03FF0000U /*!< Transmission Byte Count 6 (high) */ + +/**************** Bit definition for USB_COUNT7_TX_0 register ***************/ +#define USB_COUNT7_TX_0_COUNT7_TX_0 0x000003FFU /*!< Transmission Byte Count 7 (low) */ + +/**************** Bit definition for USB_COUNT7_TX_1 register ***************/ +#define USB_COUNT7_TX_1_COUNT7_TX_1 0x03FF0000U /*!< Transmission Byte Count 7 (high) */ + +/*----------------------------------------------------------------------------*/ + +/***************** Bit definition for USB_ADDR0_RX register *****************/ +#define USB_ADDR0_RX_ADDR0_RX_Pos (1U) +#define USB_ADDR0_RX_ADDR0_RX_Msk (0x7FFFUL << USB_ADDR0_RX_ADDR0_RX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR0_RX_ADDR0_RX USB_ADDR0_RX_ADDR0_RX_Msk /*!< Reception Buffer Address 0 */ + +/***************** Bit definition for USB_ADDR1_RX register *****************/ +#define USB_ADDR1_RX_ADDR1_RX_Pos (1U) +#define USB_ADDR1_RX_ADDR1_RX_Msk (0x7FFFUL << USB_ADDR1_RX_ADDR1_RX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR1_RX_ADDR1_RX USB_ADDR1_RX_ADDR1_RX_Msk /*!< Reception Buffer Address 1 */ + +/***************** Bit definition for USB_ADDR2_RX register *****************/ +#define USB_ADDR2_RX_ADDR2_RX_Pos (1U) +#define USB_ADDR2_RX_ADDR2_RX_Msk (0x7FFFUL << USB_ADDR2_RX_ADDR2_RX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR2_RX_ADDR2_RX USB_ADDR2_RX_ADDR2_RX_Msk /*!< Reception Buffer Address 2 */ + +/***************** Bit definition for USB_ADDR3_RX register *****************/ +#define USB_ADDR3_RX_ADDR3_RX_Pos (1U) +#define USB_ADDR3_RX_ADDR3_RX_Msk (0x7FFFUL << USB_ADDR3_RX_ADDR3_RX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR3_RX_ADDR3_RX USB_ADDR3_RX_ADDR3_RX_Msk /*!< Reception Buffer Address 3 */ + +/***************** Bit definition for USB_ADDR4_RX register *****************/ +#define USB_ADDR4_RX_ADDR4_RX_Pos (1U) +#define USB_ADDR4_RX_ADDR4_RX_Msk (0x7FFFUL << USB_ADDR4_RX_ADDR4_RX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR4_RX_ADDR4_RX USB_ADDR4_RX_ADDR4_RX_Msk /*!< Reception Buffer Address 4 */ + +/***************** Bit definition for USB_ADDR5_RX register *****************/ +#define USB_ADDR5_RX_ADDR5_RX_Pos (1U) +#define USB_ADDR5_RX_ADDR5_RX_Msk (0x7FFFUL << USB_ADDR5_RX_ADDR5_RX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR5_RX_ADDR5_RX USB_ADDR5_RX_ADDR5_RX_Msk /*!< Reception Buffer Address 5 */ + +/***************** Bit definition for USB_ADDR6_RX register *****************/ +#define USB_ADDR6_RX_ADDR6_RX_Pos (1U) +#define USB_ADDR6_RX_ADDR6_RX_Msk (0x7FFFUL << USB_ADDR6_RX_ADDR6_RX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR6_RX_ADDR6_RX USB_ADDR6_RX_ADDR6_RX_Msk /*!< Reception Buffer Address 6 */ + +/***************** Bit definition for USB_ADDR7_RX register *****************/ +#define USB_ADDR7_RX_ADDR7_RX_Pos (1U) +#define USB_ADDR7_RX_ADDR7_RX_Msk (0x7FFFUL << USB_ADDR7_RX_ADDR7_RX_Pos) /*!< 0x0000FFFE */ +#define USB_ADDR7_RX_ADDR7_RX USB_ADDR7_RX_ADDR7_RX_Msk /*!< Reception Buffer Address 7 */ + +/*----------------------------------------------------------------------------*/ + +/***************** Bit definition for USB_COUNT0_RX register ****************/ +#define USB_COUNT0_RX_COUNT0_RX_Pos (0U) +#define USB_COUNT0_RX_COUNT0_RX_Msk (0x3FFUL << USB_COUNT0_RX_COUNT0_RX_Pos) /*!< 0x000003FF */ +#define USB_COUNT0_RX_COUNT0_RX USB_COUNT0_RX_COUNT0_RX_Msk /*!< Reception Byte Count */ + +#define USB_COUNT0_RX_NUM_BLOCK_Pos (10U) +#define USB_COUNT0_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ +#define USB_COUNT0_RX_NUM_BLOCK USB_COUNT0_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT0_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ +#define USB_COUNT0_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ +#define USB_COUNT0_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ +#define USB_COUNT0_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ +#define USB_COUNT0_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT0_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ + +#define USB_COUNT0_RX_BLSIZE_Pos (15U) +#define USB_COUNT0_RX_BLSIZE_Msk (0x1UL << USB_COUNT0_RX_BLSIZE_Pos) /*!< 0x00008000 */ +#define USB_COUNT0_RX_BLSIZE USB_COUNT0_RX_BLSIZE_Msk /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT1_RX register ****************/ +#define USB_COUNT1_RX_COUNT1_RX_Pos (0U) +#define USB_COUNT1_RX_COUNT1_RX_Msk (0x3FFUL << USB_COUNT1_RX_COUNT1_RX_Pos) /*!< 0x000003FF */ +#define USB_COUNT1_RX_COUNT1_RX USB_COUNT1_RX_COUNT1_RX_Msk /*!< Reception Byte Count */ + +#define USB_COUNT1_RX_NUM_BLOCK_Pos (10U) +#define USB_COUNT1_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ +#define USB_COUNT1_RX_NUM_BLOCK USB_COUNT1_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT1_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ +#define USB_COUNT1_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ +#define USB_COUNT1_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ +#define USB_COUNT1_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ +#define USB_COUNT1_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT1_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ + +#define USB_COUNT1_RX_BLSIZE_Pos (15U) +#define USB_COUNT1_RX_BLSIZE_Msk (0x1UL << USB_COUNT1_RX_BLSIZE_Pos) /*!< 0x00008000 */ +#define USB_COUNT1_RX_BLSIZE USB_COUNT1_RX_BLSIZE_Msk /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT2_RX register ****************/ +#define USB_COUNT2_RX_COUNT2_RX_Pos (0U) +#define USB_COUNT2_RX_COUNT2_RX_Msk (0x3FFUL << USB_COUNT2_RX_COUNT2_RX_Pos) /*!< 0x000003FF */ +#define USB_COUNT2_RX_COUNT2_RX USB_COUNT2_RX_COUNT2_RX_Msk /*!< Reception Byte Count */ + +#define USB_COUNT2_RX_NUM_BLOCK_Pos (10U) +#define USB_COUNT2_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ +#define USB_COUNT2_RX_NUM_BLOCK USB_COUNT2_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT2_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ +#define USB_COUNT2_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ +#define USB_COUNT2_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ +#define USB_COUNT2_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ +#define USB_COUNT2_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT2_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ + +#define USB_COUNT2_RX_BLSIZE_Pos (15U) +#define USB_COUNT2_RX_BLSIZE_Msk (0x1UL << USB_COUNT2_RX_BLSIZE_Pos) /*!< 0x00008000 */ +#define USB_COUNT2_RX_BLSIZE USB_COUNT2_RX_BLSIZE_Msk /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT3_RX register ****************/ +#define USB_COUNT3_RX_COUNT3_RX_Pos (0U) +#define USB_COUNT3_RX_COUNT3_RX_Msk (0x3FFUL << USB_COUNT3_RX_COUNT3_RX_Pos) /*!< 0x000003FF */ +#define USB_COUNT3_RX_COUNT3_RX USB_COUNT3_RX_COUNT3_RX_Msk /*!< Reception Byte Count */ + +#define USB_COUNT3_RX_NUM_BLOCK_Pos (10U) +#define USB_COUNT3_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ +#define USB_COUNT3_RX_NUM_BLOCK USB_COUNT3_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT3_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ +#define USB_COUNT3_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ +#define USB_COUNT3_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ +#define USB_COUNT3_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ +#define USB_COUNT3_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT3_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ + +#define USB_COUNT3_RX_BLSIZE_Pos (15U) +#define USB_COUNT3_RX_BLSIZE_Msk (0x1UL << USB_COUNT3_RX_BLSIZE_Pos) /*!< 0x00008000 */ +#define USB_COUNT3_RX_BLSIZE USB_COUNT3_RX_BLSIZE_Msk /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT4_RX register ****************/ +#define USB_COUNT4_RX_COUNT4_RX_Pos (0U) +#define USB_COUNT4_RX_COUNT4_RX_Msk (0x3FFUL << USB_COUNT4_RX_COUNT4_RX_Pos) /*!< 0x000003FF */ +#define USB_COUNT4_RX_COUNT4_RX USB_COUNT4_RX_COUNT4_RX_Msk /*!< Reception Byte Count */ + +#define USB_COUNT4_RX_NUM_BLOCK_Pos (10U) +#define USB_COUNT4_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ +#define USB_COUNT4_RX_NUM_BLOCK USB_COUNT4_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT4_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ +#define USB_COUNT4_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ +#define USB_COUNT4_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ +#define USB_COUNT4_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ +#define USB_COUNT4_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT4_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ + +#define USB_COUNT4_RX_BLSIZE_Pos (15U) +#define USB_COUNT4_RX_BLSIZE_Msk (0x1UL << USB_COUNT4_RX_BLSIZE_Pos) /*!< 0x00008000 */ +#define USB_COUNT4_RX_BLSIZE USB_COUNT4_RX_BLSIZE_Msk /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT5_RX register ****************/ +#define USB_COUNT5_RX_COUNT5_RX_Pos (0U) +#define USB_COUNT5_RX_COUNT5_RX_Msk (0x3FFUL << USB_COUNT5_RX_COUNT5_RX_Pos) /*!< 0x000003FF */ +#define USB_COUNT5_RX_COUNT5_RX USB_COUNT5_RX_COUNT5_RX_Msk /*!< Reception Byte Count */ + +#define USB_COUNT5_RX_NUM_BLOCK_Pos (10U) +#define USB_COUNT5_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ +#define USB_COUNT5_RX_NUM_BLOCK USB_COUNT5_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT5_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ +#define USB_COUNT5_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ +#define USB_COUNT5_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ +#define USB_COUNT5_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ +#define USB_COUNT5_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT5_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ + +#define USB_COUNT5_RX_BLSIZE_Pos (15U) +#define USB_COUNT5_RX_BLSIZE_Msk (0x1UL << USB_COUNT5_RX_BLSIZE_Pos) /*!< 0x00008000 */ +#define USB_COUNT5_RX_BLSIZE USB_COUNT5_RX_BLSIZE_Msk /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT6_RX register ****************/ +#define USB_COUNT6_RX_COUNT6_RX_Pos (0U) +#define USB_COUNT6_RX_COUNT6_RX_Msk (0x3FFUL << USB_COUNT6_RX_COUNT6_RX_Pos) /*!< 0x000003FF */ +#define USB_COUNT6_RX_COUNT6_RX USB_COUNT6_RX_COUNT6_RX_Msk /*!< Reception Byte Count */ + +#define USB_COUNT6_RX_NUM_BLOCK_Pos (10U) +#define USB_COUNT6_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ +#define USB_COUNT6_RX_NUM_BLOCK USB_COUNT6_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT6_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ +#define USB_COUNT6_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ +#define USB_COUNT6_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ +#define USB_COUNT6_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ +#define USB_COUNT6_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT6_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ + +#define USB_COUNT6_RX_BLSIZE_Pos (15U) +#define USB_COUNT6_RX_BLSIZE_Msk (0x1UL << USB_COUNT6_RX_BLSIZE_Pos) /*!< 0x00008000 */ +#define USB_COUNT6_RX_BLSIZE USB_COUNT6_RX_BLSIZE_Msk /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT7_RX register ****************/ +#define USB_COUNT7_RX_COUNT7_RX_Pos (0U) +#define USB_COUNT7_RX_COUNT7_RX_Msk (0x3FFUL << USB_COUNT7_RX_COUNT7_RX_Pos) /*!< 0x000003FF */ +#define USB_COUNT7_RX_COUNT7_RX USB_COUNT7_RX_COUNT7_RX_Msk /*!< Reception Byte Count */ + +#define USB_COUNT7_RX_NUM_BLOCK_Pos (10U) +#define USB_COUNT7_RX_NUM_BLOCK_Msk (0x1FUL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00007C00 */ +#define USB_COUNT7_RX_NUM_BLOCK USB_COUNT7_RX_NUM_BLOCK_Msk /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT7_RX_NUM_BLOCK_0 (0x01UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00000400 */ +#define USB_COUNT7_RX_NUM_BLOCK_1 (0x02UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00000800 */ +#define USB_COUNT7_RX_NUM_BLOCK_2 (0x04UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00001000 */ +#define USB_COUNT7_RX_NUM_BLOCK_3 (0x08UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00002000 */ +#define USB_COUNT7_RX_NUM_BLOCK_4 (0x10UL << USB_COUNT7_RX_NUM_BLOCK_Pos) /*!< 0x00004000 */ + +#define USB_COUNT7_RX_BLSIZE_Pos (15U) +#define USB_COUNT7_RX_BLSIZE_Msk (0x1UL << USB_COUNT7_RX_BLSIZE_Pos) /*!< 0x00008000 */ +#define USB_COUNT7_RX_BLSIZE USB_COUNT7_RX_BLSIZE_Msk /*!< BLock SIZE */ + +/*----------------------------------------------------------------------------*/ + +/**************** Bit definition for USB_COUNT0_RX_0 register ***************/ +#define USB_COUNT0_RX_0_COUNT0_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ + +#define USB_COUNT0_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ + +#define USB_COUNT0_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT0_RX_1 register ***************/ +#define USB_COUNT0_RX_1_COUNT0_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ + +#define USB_COUNT0_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 1 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ + +#define USB_COUNT0_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT1_RX_0 register ***************/ +#define USB_COUNT1_RX_0_COUNT1_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ + +#define USB_COUNT1_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ + +#define USB_COUNT1_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT1_RX_1 register ***************/ +#define USB_COUNT1_RX_1_COUNT1_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ + +#define USB_COUNT1_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ + +#define USB_COUNT1_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT2_RX_0 register ***************/ +#define USB_COUNT2_RX_0_COUNT2_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ + +#define USB_COUNT2_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ + +#define USB_COUNT2_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT2_RX_1 register ***************/ +#define USB_COUNT2_RX_1_COUNT2_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ + +#define USB_COUNT2_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ + +#define USB_COUNT2_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT3_RX_0 register ***************/ +#define USB_COUNT3_RX_0_COUNT3_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ + +#define USB_COUNT3_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ + +#define USB_COUNT3_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT3_RX_1 register ***************/ +#define USB_COUNT3_RX_1_COUNT3_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ + +#define USB_COUNT3_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ + +#define USB_COUNT3_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT4_RX_0 register ***************/ +#define USB_COUNT4_RX_0_COUNT4_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ + +#define USB_COUNT4_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ + +#define USB_COUNT4_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT4_RX_1 register ***************/ +#define USB_COUNT4_RX_1_COUNT4_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ + +#define USB_COUNT4_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ + +#define USB_COUNT4_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT5_RX_0 register ***************/ +#define USB_COUNT5_RX_0_COUNT5_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ + +#define USB_COUNT5_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ + +#define USB_COUNT5_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT5_RX_1 register ***************/ +#define USB_COUNT5_RX_1_COUNT5_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ + +#define USB_COUNT5_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ + +#define USB_COUNT5_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ + +/*************** Bit definition for USB_COUNT6_RX_0 register ***************/ +#define USB_COUNT6_RX_0_COUNT6_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ + +#define USB_COUNT6_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ + +#define USB_COUNT6_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT6_RX_1 register ***************/ +#define USB_COUNT6_RX_1_COUNT6_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ + +#define USB_COUNT6_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ + +#define USB_COUNT6_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ + +/*************** Bit definition for USB_COUNT7_RX_0 register ****************/ +#define USB_COUNT7_RX_0_COUNT7_RX_0 0x000003FFU /*!< Reception Byte Count (low) */ + +#define USB_COUNT7_RX_0_NUM_BLOCK_0 0x00007C00U /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_0 0x00000400U /*!< Bit 0 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_1 0x00000800U /*!< Bit 1 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_2 0x00001000U /*!< Bit 2 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_3 0x00002000U /*!< Bit 3 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_4 0x00004000U /*!< Bit 4 */ + +#define USB_COUNT7_RX_0_BLSIZE_0 0x00008000U /*!< BLock SIZE (low) */ + +/*************** Bit definition for USB_COUNT7_RX_1 register ****************/ +#define USB_COUNT7_RX_1_COUNT7_RX_1 0x03FF0000U /*!< Reception Byte Count (high) */ + +#define USB_COUNT7_RX_1_NUM_BLOCK_1 0x7C000000U /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_0 0x04000000U /*!< Bit 0 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_1 0x08000000U /*!< Bit 1 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_2 0x10000000U /*!< Bit 2 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_3 0x20000000U /*!< Bit 3 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_4 0x40000000U /*!< Bit 4 */ + +#define USB_COUNT7_RX_1_BLSIZE_1 0x80000000U /*!< BLock SIZE (high) */ + +/** + * @} + */ + +#define BTABLE_ADDRESS 0x000U + +#ifndef PMA_ACCESS +#define PMA_ACCESS 2U +#endif +/******************** Bit definition for USB_COUNTn_RX register *************/ +#define USB_CNTRX_NBLK_MSK (0x1FU << 10) +#define USB_CNTRX_BLSIZE (0x1U << 15) + +/* SetENDPOINT */ +#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) + +/* GetENDPOINT */ +#define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) + +/** + * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wType Endpoint Type. + * @retval None + */ +#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) + +/** + * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval Endpoint Type + */ +#define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) + +/** + * @brief free buffer used from the application realizing it to the line + * toggles bit SW_BUF in the double buffered endpoint register + * @param USBx USB device. + * @param bEpNum, bDir + * @retval None + */ +#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \ + do { \ + if ((bDir) == 0U) \ + { \ + /* OUT double buffered endpoint */ \ + PCD_TX_DTOG((USBx), (bEpNum)); \ + } \ + else if ((bDir) == 1U) \ + { \ + /* IN double buffered endpoint */ \ + PCD_RX_DTOG((USBx), (bEpNum)); \ + } \ + } while(0) + +/** + * @brief sets the status for tx transfer (bits STAT_TX[1:0]). + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wState new state + * @retval None + */ +#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ + /* toggle first bit ? */ \ + if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ + { \ + _wRegVal ^= USB_EPTX_DTOG1; \ + } \ + /* toggle second bit ? */ \ + if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ + { \ + _wRegVal ^= USB_EPTX_DTOG2; \ + } \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ + } while(0) /* PCD_SET_EP_TX_STATUS */ + +/** + * @brief sets the status for rx transfer (bits STAT_TX[1:0]) + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wState new state + * @retval None + */ +#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ + /* toggle first bit ? */ \ + if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ + { \ + _wRegVal ^= USB_EPRX_DTOG1; \ + } \ + /* toggle second bit ? */ \ + if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ + { \ + _wRegVal ^= USB_EPRX_DTOG2; \ + } \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ + } while(0) /* PCD_SET_EP_RX_STATUS */ + +/** + * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wStaterx new state. + * @param wStatetx new state. + * @retval None + */ +#define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ + /* toggle first bit ? */ \ + if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ + { \ + _wRegVal ^= USB_EPRX_DTOG1; \ + } \ + /* toggle second bit ? */ \ + if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ + { \ + _wRegVal ^= USB_EPRX_DTOG2; \ + } \ + /* toggle first bit ? */ \ + if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ + { \ + _wRegVal ^= USB_EPTX_DTOG1; \ + } \ + /* toggle second bit ? */ \ + if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ + { \ + _wRegVal ^= USB_EPTX_DTOG2; \ + } \ + \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ + } while(0) /* PCD_SET_EP_TXRX_STATUS */ + +/** + * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] + * /STAT_RX[1:0]) + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval status + */ +#define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) +#define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) + +/** + * @brief sets directly the VALID tx/rx-status into the endpoint register + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) +#define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) + +/** + * @brief checks stall condition in an endpoint. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval TRUE = endpoint in stall condition. + */ +#define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) == USB_EP_TX_STALL) +#define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) == USB_EP_RX_STALL) + +/** + * @brief set & clear EP_KIND bit. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_SET_EP_KIND(USBx, bEpNum) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ + \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ + } while(0) /* PCD_SET_EP_KIND */ + +#define PCD_CLEAR_EP_KIND(USBx, bEpNum) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ + \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ + } while(0) /* PCD_CLEAR_EP_KIND */ + +/** + * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) +#define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) + +/** + * @brief Sets/clears directly EP_KIND bit in the endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) +#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) + +/** + * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ + \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \ + } while(0) /* PCD_CLEAR_RX_EP_CTR */ + +#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ + \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \ + } while(0) /* PCD_CLEAR_TX_EP_CTR */ + +/** + * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_RX_DTOG(USBx, bEpNum) \ + do { \ + uint16_t _wEPVal; \ + \ + _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ + \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ + } while(0) /* PCD_RX_DTOG */ + +#define PCD_TX_DTOG(USBx, bEpNum) \ + do { \ + uint16_t _wEPVal; \ + \ + _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ + \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ + } while(0) /* PCD_TX_DTOG */ +/** + * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ + \ + if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ + { \ + PCD_RX_DTOG((USBx), (bEpNum)); \ + } \ + } while(0) /* PCD_CLEAR_RX_DTOG */ + +#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ + \ + if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ + { \ + PCD_TX_DTOG((USBx), (bEpNum)); \ + } \ + } while(0) /* PCD_CLEAR_TX_DTOG */ + +/** + * @brief Sets address in an endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param bAddr Address. + * @retval None + */ +#define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) \ + do { \ + uint16_t _wRegVal; \ + \ + _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ + \ + PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ + } while(0) /* PCD_SET_EP_ADDRESS */ + +/** + * @brief Gets address in an endpoint register. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) + +#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) +#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) + +/** + * @brief sets address of the tx/rx buffer. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wAddr address to be set (must be word aligned). + * @retval None + */ +#define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) \ + do { \ + __IO uint16_t *_wRegVal; \ + uint32_t _wRegBase = (uint32_t)USBx; \ + \ + _wRegBase += (uint32_t)(USBx)->BTABLE; \ + _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ + *_wRegVal = ((wAddr) >> 1) << 1; \ + } while(0) /* PCD_SET_EP_TX_ADDRESS */ + +#define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) \ + do { \ + __IO uint16_t *_wRegVal; \ + uint32_t _wRegBase = (uint32_t)USBx; \ + \ + _wRegBase += (uint32_t)(USBx)->BTABLE; \ + _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ + *_wRegVal = ((wAddr) >> 1) << 1; \ + } while(0) /* PCD_SET_EP_RX_ADDRESS */ + +/** + * @brief Gets address of the tx/rx buffer. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval address of the buffer. + */ +#define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) +#define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) + +/** + * @brief Sets counter of rx buffer with no. of blocks. + * @param pdwReg Register pointer + * @param wCount Counter. + * @param wNBlocks no. of Blocks. + * @retval None + */ +#define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) \ + do { \ + (wNBlocks) = (wCount) >> 5; \ + if (((wCount) & 0x1fU) == 0U) \ + { \ + (wNBlocks)--; \ + } \ + *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \ + } while(0) /* PCD_CALC_BLK32 */ + +#define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) \ + do { \ + (wNBlocks) = (wCount) >> 1; \ + if (((wCount) & 0x1U) != 0U) \ + { \ + (wNBlocks)++; \ + } \ + *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ + } while(0) /* PCD_CALC_BLK2 */ + +#define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ + do { \ + uint32_t wNBlocks; \ + if ((wCount) == 0U) \ + { \ + *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ + *(pdwReg) |= USB_CNTRX_BLSIZE; \ + } \ + else if((wCount) <= 62U) \ + { \ + PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ + } \ + else \ + { \ + PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ + } \ + } while(0) /* PCD_SET_EP_CNT_RX_REG */ + +#define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) \ + do { \ + uint32_t _wRegBase = (uint32_t)(USBx); \ + __IO uint16_t *pdwReg; \ + \ + _wRegBase += (uint32_t)(USBx)->BTABLE; \ + pdwReg = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ + PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ + } while(0) + +/** + * @brief sets counter for the tx/rx buffer. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wCount Counter value. + * @retval None + */ +#define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) \ + do { \ + uint32_t _wRegBase = (uint32_t)(USBx); \ + __IO uint16_t *_wRegVal; \ + \ + _wRegBase += (uint32_t)(USBx)->BTABLE; \ + _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ + *_wRegVal = (uint16_t)(wCount); \ + } while(0) + +#define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) \ + do { \ + uint32_t _wRegBase = (uint32_t)(USBx); \ + __IO uint16_t *_wRegVal; \ + \ + _wRegBase += (uint32_t)(USBx)->BTABLE; \ + _wRegVal = (__IO uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ + PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ + } while(0) + +/** + * @brief gets counter of the tx buffer. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval Counter value + */ +#define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) +#define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) + +/** + * @brief Sets buffer 0/1 address in a double buffer endpoint. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wBuf0Addr buffer 0 address. + * @retval Counter value + */ +#define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) \ + do { \ + PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ + } while(0) /* PCD_SET_EP_DBUF0_ADDR */ + +#define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) \ + do { \ + PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ + } while(0) /* PCD_SET_EP_DBUF1_ADDR */ + +/** + * @brief Sets addresses in a double buffer endpoint. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param wBuf0Addr: buffer 0 address. + * @param wBuf1Addr = buffer 1 address. + * @retval None + */ +#define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) \ + do { \ + PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ + PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ + } while(0) /* PCD_SET_EP_DBUF_ADDR */ + +/** + * @brief Gets buffer 0/1 address of a double buffer endpoint. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) +#define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) + +/** + * @brief Gets buffer 0/1 address of a double buffer endpoint. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @param bDir endpoint dir EP_DBUF_OUT = OUT + * EP_DBUF_IN = IN + * @param wCount: Counter value + * @retval None + */ +#define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) \ + do { \ + if ((bDir) == 0U) \ + /* OUT endpoint */ \ + { \ + PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ + } \ + else \ + { \ + if ((bDir) == 1U) \ + { \ + /* IN endpoint */ \ + PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ + } \ + } \ + } while(0) /* SetEPDblBuf0Count*/ + +#define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) \ + do { \ + uint32_t _wBase = (uint32_t)(USBx); \ + __IO uint16_t *_wEPRegVal; \ + \ + if ((bDir) == 0U) \ + { \ + /* OUT endpoint */ \ + PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ + } \ + else \ + { \ + if ((bDir) == 1U) \ + { \ + /* IN endpoint */ \ + _wBase += (uint32_t)(USBx)->BTABLE; \ + _wEPRegVal = (__IO uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ + *_wEPRegVal = (uint16_t)(wCount); \ + } \ + } \ + } while(0) /* SetEPDblBuf1Count */ + +#define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) \ + do { \ + PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ + PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ + } while(0) /* PCD_SET_EP_DBUF_CNT */ + +/** + * @brief Gets buffer 0/1 rx/tx counter for double buffering. + * @param USBx USB peripheral instance register address. + * @param bEpNum Endpoint Number. + * @retval None + */ +#define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) +#define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) + #endif \ No newline at end of file diff --git a/stm32f0_cherryusb/stm32f0_cherryusb.ioc b/stm32f072_usb_mouse_keyboard/stm32f072_usb_mouse_keyboard.ioc similarity index 94% rename from stm32f0_cherryusb/stm32f0_cherryusb.ioc rename to stm32f072_usb_mouse_keyboard/stm32f072_usb_mouse_keyboard.ioc index 39ff988..dd78a67 100644 --- a/stm32f0_cherryusb/stm32f0_cherryusb.ioc +++ b/stm32f072_usb_mouse_keyboard/stm32f072_usb_mouse_keyboard.ioc @@ -45,8 +45,8 @@ Mcu.PinsNb=26 Mcu.ThirdPartyNb=0 Mcu.UserConstants=BSP_KEY_SCAN_TIM,$$_TIM6_IP_HANDLE_$$;BSP_KEY_SCAN_INTERVAL_MS,10 Mcu.UserName=STM32F072C8Tx -MxCube.Version=6.11.1 -MxDb.Version=DB.6.0.111 +MxCube.Version=6.12.1 +MxDb.Version=DB.6.0.121 NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false @@ -194,7 +194,7 @@ ProjectManager.CustomerFirmwarePackage= ProjectManager.DefaultFWLocation=true ProjectManager.DeletePrevious=true ProjectManager.DeviceId=STM32F072C8Tx -ProjectManager.FirmwarePackage=STM32Cube FW_F0 V1.11.4 +ProjectManager.FirmwarePackage=STM32Cube FW_F0 V1.11.5 ProjectManager.FreePins=false ProjectManager.HalAssertFull=false ProjectManager.HeapSize=0x200 @@ -205,8 +205,8 @@ ProjectManager.MainLocation=Core/Src ProjectManager.NoMain=false ProjectManager.PreviousToolchain=STM32CubeIDE ProjectManager.ProjectBuild=false -ProjectManager.ProjectFileName=stm32f0_cherryusb.ioc -ProjectManager.ProjectName=stm32f0_cherryusb +ProjectManager.ProjectFileName=stm32f072_usb_mouse_keyboard.ioc +ProjectManager.ProjectName=stm32f072_usb_mouse_keyboard ProjectManager.ProjectStructure= ProjectManager.RegisterCallBack= ProjectManager.StackSize=0x800 diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_hc.h b/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_hc.h deleted file mode 100644 index 32272c4..0000000 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_hc.h +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USB_HC_H -#define USB_HC_H - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -typedef void (*usbh_complete_callback_t)(void *arg, int nbytes); - -struct usbh_bus; - -/** - * @brief USB Iso Configuration. - * - * Structure containing the USB Iso configuration. - */ -struct usbh_iso_frame_packet { - uint8_t *transfer_buffer; - uint32_t transfer_buffer_length; - uint32_t actual_length; - int errorcode; -}; - -/** - * @brief USB Urb Configuration. - * - * Structure containing the USB Urb configuration. - */ -struct usbh_urb { - void *hcpriv; - struct usbh_hubport *hport; - struct usb_endpoint_descriptor *ep; - uint8_t data_toggle; - uint8_t interval; - struct usb_setup_packet *setup; - uint8_t *transfer_buffer; - uint32_t transfer_buffer_length; - int transfer_flags; - uint32_t actual_length; - uint32_t timeout; - int errorcode; - uint32_t num_of_iso_packets; - uint32_t start_frame; - usbh_complete_callback_t complete; - void *arg; -#if defined(__ICCARM__) || defined(__ICCRISCV__) || defined(__ICCRX__) - struct usbh_iso_frame_packet *iso_packet; -#else - struct usbh_iso_frame_packet iso_packet[0]; -#endif -}; - -/** - * @brief usb host controller hardware init. - * - * @return On success will return 0, and others indicate fail. - */ -int usb_hc_init(struct usbh_bus *bus); - -/** - * @brief usb host controller hardware deinit. - * - * @return On success will return 0, and others indicate fail. - */ -int usb_hc_deinit(struct usbh_bus *bus); - -/** - * @brief Get frame number. - * - * @return frame number. - */ -uint16_t usbh_get_frame_number(struct usbh_bus *bus); -/** - * @brief control roothub. - * - * @param setup setup request buffer. - * @param buf buf for reading response or write data. - * @return On success will return 0, and others indicate fail. - */ -int usbh_roothub_control(struct usbh_bus *bus, struct usb_setup_packet *setup, uint8_t *buf); - -/** - * @brief Submit a usb transfer request to an endpoint. - * - * If timeout is not zero, this function will be in poll transfer mode, - * otherwise will be in async transfer mode. - * - * @param urb Usb request block. - * @return On success will return 0, and others indicate fail. - */ -int usbh_submit_urb(struct usbh_urb *urb); - -/** - * @brief Cancel a transfer request. - * - * This function will call When calls usbh_submit_urb and return -USB_ERR_TIMEOUT or -USB_ERR_SHUTDOWN. - * - * @param urb Usb request block. - * @return On success will return 0, and others indicate fail. - */ -int usbh_kill_urb(struct usbh_urb *urb); - -#ifdef __cplusplus -} -#endif - -#endif /* USB_HC_H */ diff --git a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_osal.h b/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_osal.h deleted file mode 100644 index 16115d1..0000000 --- a/stm32f0_cherryusb/3rdParty/CherryUSB/common/usb_osal.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef USB_OSAL_H -#define USB_OSAL_H - -#include -#include -#include - -#define USB_OSAL_WAITING_FOREVER (0xFFFFFFFFU) - -typedef void *usb_osal_thread_t; -typedef void *usb_osal_sem_t; -typedef void *usb_osal_mutex_t; -typedef void *usb_osal_mq_t; -typedef void (*usb_thread_entry_t)(void *argument); -typedef void (*usb_timer_handler_t)(void *argument); -struct usb_osal_timer { - usb_timer_handler_t handler; - void *argument; - void *timer; -}; - -/* - * Task with smaller priority value indicates higher task priority -*/ -usb_osal_thread_t usb_osal_thread_create(const char *name, uint32_t stack_size, uint32_t prio, usb_thread_entry_t entry, void *args); -void usb_osal_thread_delete(usb_osal_thread_t thread); - -usb_osal_sem_t usb_osal_sem_create(uint32_t initial_count); -void usb_osal_sem_delete(usb_osal_sem_t sem); -int usb_osal_sem_take(usb_osal_sem_t sem, uint32_t timeout); -int usb_osal_sem_give(usb_osal_sem_t sem); -void usb_osal_sem_reset(usb_osal_sem_t sem); - -usb_osal_mutex_t usb_osal_mutex_create(void); -void usb_osal_mutex_delete(usb_osal_mutex_t mutex); -int usb_osal_mutex_take(usb_osal_mutex_t mutex); -int usb_osal_mutex_give(usb_osal_mutex_t mutex); - -usb_osal_mq_t usb_osal_mq_create(uint32_t max_msgs); -void usb_osal_mq_delete(usb_osal_mq_t mq); -int usb_osal_mq_send(usb_osal_mq_t mq, uintptr_t addr); -int usb_osal_mq_recv(usb_osal_mq_t mq, uintptr_t *addr, uint32_t timeout); - -struct usb_osal_timer *usb_osal_timer_create(const char *name, uint32_t timeout_ms, usb_timer_handler_t handler, void *argument, bool is_period); -void usb_osal_timer_delete(struct usb_osal_timer *timer); -void usb_osal_timer_start(struct usb_osal_timer *timer); -void usb_osal_timer_stop(struct usb_osal_timer *timer); - -size_t usb_osal_enter_critical_section(void); -void usb_osal_leave_critical_section(size_t flag); - -void usb_osal_msleep(uint32_t delay); - -#endif /* USB_OSAL_H */ diff --git a/stm32f0_cherryusb/Core/Inc/usb_config.h b/stm32f0_cherryusb/Core/Inc/usb_config.h deleted file mode 100644 index b633abb..0000000 --- a/stm32f0_cherryusb/Core/Inc/usb_config.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2022, sakumisu - * - * SPDX-License-Identifier: Apache-2.0 - */ -#ifndef CHERRYUSB_CONFIG_H -#define CHERRYUSB_CONFIG_H - -#define CHERRYUSB_VERSION 0x010200 -#define CHERRYUSB_VERSION_STR "v1.2.0" - -/* ================ USB common Configuration ================ */ - -#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__) - -#define usb_malloc(size) malloc(size) -#define usb_free(ptr) free(ptr) - -#ifndef CONFIG_USB_DBG_LEVEL -#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO -#endif - -/* Enable print with color */ -#define CONFIG_USB_PRINTF_COLOR_ENABLE - -/* data align size when use dma */ -#ifndef CONFIG_USB_ALIGN_SIZE -#define CONFIG_USB_ALIGN_SIZE 4 -#endif - -/* attribute data into no cache ram */ -#define USB_NOCACHE_RAM_SECTION __attribute__((section(".noncacheable"))) - -/* ================= USB Device Stack Configuration ================ */ - -/* Ep0 in and out transfer buffer */ -#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN -#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 256 -#endif - -/* Setup packet log for debug */ -// #define CONFIG_USBDEV_SETUP_LOG_PRINT - -/* Send ep0 in data from user buffer instead of copying into ep0 reqdata - * Please note that user buffer must be aligned with CONFIG_USB_ALIGN_SIZE -*/ -// #define CONFIG_USBDEV_EP0_INDATA_NO_COPY - -/* Check if the input descriptor is correct */ -// #define CONFIG_USBDEV_DESC_CHECK - -/* Enable test mode */ -// #define CONFIG_USBDEV_TEST_MODE - -/* ================ USB Device Port Configuration ================*/ - -#ifndef CONFIG_USBDEV_MAX_BUS -#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip -#endif - -#ifndef CONFIG_USBDEV_EP_NUM -#define CONFIG_USBDEV_EP_NUM 8 -#endif - -/* ---------------- FSDEV Configuration ---------------- */ -#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 1 // maybe 1 or 2, many chips may have a difference - -#endif